blob: 516dc7022bd74a46a9187019ba37618f9aeb2b00 [file] [log] [blame]
Greg Kroah-Hartmanb2441312017-11-01 15:07:57 +01001# SPDX-License-Identifier: GPL-2.0
Linus Torvalds1da177e2005-04-16 15:20:36 -07002config MIPS
3 bool
4 default y
Yury Norov942fa982018-05-16 11:18:49 +03005 select ARCH_32BIT_OFF_T if !64BIT
Paul Burtonea6a3732018-11-07 23:14:09 +00006 select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT
Mathieu Desnoyers8690bbc2024-02-15 09:46:32 -05007 select ARCH_HAS_CPU_CACHE_ALIASING
Thomas Gleixner7f066a22023-06-14 01:39:32 +02008 select ARCH_HAS_CPU_FINALIZE_INIT
Kees Cookb847bd62022-03-09 14:09:39 -08009 select ARCH_HAS_CURRENT_STACK_POINTER if !CC_IS_CLANG || CLANG_VERSION >= 140000
Florian Fainellidfad83c2021-03-30 20:22:07 -070010 select ARCH_HAS_DEBUG_VIRTUAL if !64BIT
Alexander Lobakin34c01e42020-01-22 13:58:51 +030011 select ARCH_HAS_FORTIFY_SOURCE
12 select ARCH_HAS_KCOV
Tiezhu Yang66633ab2021-03-25 20:50:01 +080013 select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE if !EVA
Alexander Lobakin34c01e42020-01-22 13:58:51 +030014 select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI)
Arnd Bergmanne6226992021-05-17 09:22:34 +020015 select ARCH_HAS_STRNCPY_FROM_USER
16 select ARCH_HAS_STRNLEN_USER
Matt Redfearn12597982017-05-15 10:46:35 +010017 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
Kees Cook918327e2024-01-28 10:45:29 -080018 select ARCH_HAS_UBSAN
Xingxing Su8b3165e2020-12-03 15:22:51 +080019 select ARCH_HAS_GCOV_PROFILE_ALL
Nick Desaulniersc55944c2021-04-07 10:35:43 -070020 select ARCH_KEEP_MEMBLOCK
Ralf Baechle1ee36302015-09-29 12:19:48 +020021 select ARCH_USE_BUILTIN_BSWAP
Matt Redfearn12597982017-05-15 10:46:35 +010022 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
Anshuman Khandualdce44562021-04-29 22:55:15 -070023 select ARCH_USE_MEMTEST
Paul Burton25da4e92017-06-09 17:26:42 -070024 select ARCH_USE_QUEUED_RWLOCKS
Paul Burton0b17c962017-06-09 17:26:43 -070025 select ARCH_USE_QUEUED_SPINLOCKS
Anshuman Khandual855f9a82021-05-04 18:38:13 -070026 select ARCH_SUPPORTS_HUGETLBFS if CPU_SUPPORTS_HUGEPAGES
Alexandre Ghiti9035bd22019-09-23 15:39:18 -070027 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
Matt Redfearn12597982017-05-15 10:46:35 +010028 select ARCH_WANT_IPC_PARSE_VERSION
Alexander Lobakind3a4e0f2021-01-10 11:57:01 +000029 select ARCH_WANT_LD_ORPHAN_WARN
Shile Zhang10916702019-12-04 08:46:31 +080030 select BUILDTIME_TABLE_SORT
Matt Redfearn12597982017-05-15 10:46:35 +010031 select CLONE_BACKWARDS
Paul Burton57eeaced2018-11-08 23:44:55 +000032 select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1)
Matt Redfearn12597982017-05-15 10:46:35 +010033 select CPU_PM if CPU_IDLE
34 select GENERIC_ATOMIC64 if !64BIT
Matt Redfearn12597982017-05-15 10:46:35 +010035 select GENERIC_CMOS_UPDATE
36 select GENERIC_CPU_AUTOPROBE
Vincenzo Frascino24640f22019-06-21 10:52:46 +010037 select GENERIC_GETTIMEOFDAY
Paul Burtonb962aeb2018-08-29 14:54:00 -070038 select GENERIC_IOMAP
Matt Redfearn12597982017-05-15 10:46:35 +010039 select GENERIC_IRQ_PROBE
40 select GENERIC_IRQ_SHOW
Christoph Hellwig6630a8e2018-11-15 20:05:37 +010041 select GENERIC_ISA_DMA if EISA
Antony Pavlov740129b2018-04-11 08:50:19 +010042 select GENERIC_LIB_ASHLDI3
43 select GENERIC_LIB_ASHRDI3
44 select GENERIC_LIB_CMPDI2
45 select GENERIC_LIB_LSHRDI3
46 select GENERIC_LIB_UCMPDI2
Matt Redfearn12597982017-05-15 10:46:35 +010047 select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
48 select GENERIC_SMP_IDLE_THREAD
Jiaxun Yang975fd3c2023-05-21 23:31:23 +010049 select GENERIC_IDLE_POLL_SETUP
Matt Redfearn12597982017-05-15 10:46:35 +010050 select GENERIC_TIME_VSYSCALL
Peter Zijlstra6ca297d2022-10-21 14:51:44 +020051 select GUP_GET_PXX_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT
Niklas Schnellefcbfe812023-03-23 17:33:52 +010052 select HAS_IOPORT if !NO_IOPORT_MAP || ISA
Paul Burton906d4412018-08-20 15:36:18 -070053 select HAVE_ARCH_COMPILER_H
Matt Redfearn12597982017-05-15 10:46:35 +010054 select HAVE_ARCH_JUMP_LABEL
Arnd Bergmann42b20992021-01-22 12:02:51 +010055 select HAVE_ARCH_KGDB if MIPS_FP_SUPPORT
Matt Redfearn109c32f2016-11-24 17:32:45 +000056 select HAVE_ARCH_MMAP_RND_BITS if MMU
57 select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT
Markos Chandras490b0042014-01-22 14:40:04 +000058 select HAVE_ARCH_SECCOMP_FILTER
Ralf Baechlec0ff3c52012-08-17 08:22:04 +020059 select HAVE_ARCH_TRACEHOOK
Daniel Silsby45e03e62019-07-15 17:40:01 -040060 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES
Masahiro Yamada2ff2b7e2019-08-19 14:54:20 +090061 select HAVE_ASM_MODVERSIONS
Frederic Weisbecker24a9c5412022-06-08 16:40:24 +020062 select HAVE_CONTEXT_TRACKING_USER
Frederic Weisbecker490f5612020-01-27 16:41:52 +010063 select HAVE_TIF_NOHZ
Wu Zhangjin64575f92010-10-27 18:59:09 +080064 select HAVE_C_RECORDMCOUNT
Matt Redfearn12597982017-05-15 10:46:35 +010065 select HAVE_DEBUG_KMEMLEAK
66 select HAVE_DEBUG_STACKOVERFLOW
Matt Redfearn12597982017-05-15 10:46:35 +010067 select HAVE_DMA_CONTIGUOUS
68 select HAVE_DYNAMIC_FTRACE
Jiaxun Yang7364d60c2023-02-28 11:33:05 +000069 select HAVE_EBPF_JIT if !CPU_MICROMIPS
Matt Redfearn12597982017-05-15 10:46:35 +010070 select HAVE_EXIT_THREAD
Christoph Hellwig67a929e2019-07-11 20:57:14 -070071 select HAVE_FAST_GUP
Matt Redfearn12597982017-05-15 10:46:35 +010072 select HAVE_FTRACE_MCOUNT_RECORD
Wu Zhangjin29c5d342009-11-20 20:34:34 +080073 select HAVE_FUNCTION_GRAPH_TRACER
Matt Redfearn12597982017-05-15 10:46:35 +010074 select HAVE_FUNCTION_TRACER
Alexander Lobakin34c01e42020-01-22 13:58:51 +030075 select HAVE_GCC_PLUGINS
76 select HAVE_GENERIC_VDSO
Hassan Naveedb3a428b2018-10-29 18:27:41 -070077 select HAVE_IOREMAP_PROT
Matt Redfearn12597982017-05-15 10:46:35 +010078 select HAVE_IRQ_EXIT_ON_IRQ_STACK
79 select HAVE_IRQ_TIME_ACCOUNTING
David Daneyc1bf2072010-08-03 11:22:20 -070080 select HAVE_KPROBES
81 select HAVE_KRETPROBES
Paul Burtonc0436b52018-11-21 21:56:36 +000082 select HAVE_LD_DEAD_CODE_DATA_ELIMINATION
David Howells786d35d2012-09-28 14:31:03 +093083 select HAVE_MOD_ARCH_SPECIFIC
Petr Mladek42a0bb32016-05-20 17:00:33 -070084 select HAVE_NMI
Arnd Bergmannba89f9c2024-02-23 23:18:37 +010085 select HAVE_PAGE_SIZE_4KB if !CPU_LOONGSON2EF && !CPU_LOONGSON64
86 select HAVE_PAGE_SIZE_16KB if !CPU_R3000
87 select HAVE_PAGE_SIZE_64KB if !CPU_R3000
Matt Redfearn12597982017-05-15 10:46:35 +010088 select HAVE_PERF_EVENTS
Tiezhu Yang1ddc96b2021-02-04 11:35:22 +080089 select HAVE_PERF_REGS
90 select HAVE_PERF_USER_STACK_DUMP
Marcin Nowakowski08bccf42016-09-02 10:13:21 +020091 select HAVE_REGS_AND_STACK_ACCESS_API
Paul Burton9ea141a2018-06-14 10:13:53 -070092 select HAVE_RSEQ
Hassan Naveed16c0f032019-11-15 23:44:49 +000093 select HAVE_SPARSE_SYSCALL_NR
Masahiro Yamadad148eac2018-06-14 19:36:45 +090094 select HAVE_STACKPROTECTOR
Matt Redfearn12597982017-05-15 10:46:35 +010095 select HAVE_SYSCALL_TRACEPOINTS
Ben Hutchingsa3f14312017-10-04 03:46:14 +010096 select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP
Matt Redfearn12597982017-05-15 10:46:35 +010097 select IRQ_FORCED_THREADING
Christoph Hellwig6630a8e2018-11-15 20:05:37 +010098 select ISA if EISA
Ben Hutchings4bce37a2023-06-22 18:47:40 +020099 select LOCK_MM_AND_FIND_VMA
Matt Redfearn12597982017-05-15 10:46:35 +0100100 select MODULES_USE_ELF_REL if MODULES
Alexander Lobakin34c01e42020-01-22 13:58:51 +0300101 select MODULES_USE_ELF_RELA if MODULES && 64BIT
Matt Redfearn12597982017-05-15 10:46:35 +0100102 select PERF_USE_VMALLOC
Thomas Gleixner981aa1d2020-09-28 12:13:07 +0200103 select PCI_MSI_ARCH_FALLBACKS if PCI_MSI
Arnd Bergmann05a0a342018-08-28 16:26:30 +0200104 select RTC_LIB
Matt Redfearn12597982017-05-15 10:46:35 +0100105 select SYSCTL_EXCEPTION_TRACE
Masahiro Yamada4aae6832021-07-31 14:22:32 +0900106 select TRACE_IRQFLAGS_SUPPORT
Al Viro0bb87f02020-06-14 00:18:12 -0400107 select ARCH_HAS_ELFCORE_COMPAT
Nemanja Rakovice0a8b932022-01-31 11:17:09 +0100108 select HAVE_ARCH_KCSAN if 64BIT
Linus Torvalds1da177e2005-04-16 15:20:36 -0700109
Christoph Hellwigd3991572020-04-16 17:00:07 +0200110config MIPS_FIXUP_BIGPHYS_ADDR
111 bool
112
Paul Cercueilc434b9f2020-09-06 21:29:25 +0200113config MIPS_GENERIC
114 bool
115
Gregory CLEMENT80f2e4c2024-02-16 18:42:21 +0100116config MACH_GENERIC_CORE
117 bool
118
Paul Cercueilf0f4a752020-09-06 21:29:31 +0200119config MACH_INGENIC
120 bool
121 select SYS_SUPPORTS_32BIT_KERNEL
122 select SYS_SUPPORTS_LITTLE_ENDIAN
123 select SYS_SUPPORTS_ZBOOT
Paul Cercueilf0f4a752020-09-06 21:29:31 +0200124 select DMA_NONCOHERENT
125 select IRQ_MIPS_CPU
126 select PINCTRL
127 select GPIOLIB
128 select COMMON_CLK
129 select GENERIC_IRQ_CHIP
130 select BUILTIN_DTB if MIPS_NO_APPENDED_DTB
131 select USE_OF
132 select CPU_SUPPORTS_CPUFREQ
133 select MIPS_EXTERNAL_TIMER
134
Linus Torvalds1da177e2005-04-16 15:20:36 -0700135menu "Machine selection"
136
Ralf Baechle5e83d432005-10-29 19:32:41 +0100137choice
138 prompt "System type"
Paul Cercueilc434b9f2020-09-06 21:29:25 +0200139 default MIPS_GENERIC_KERNEL
Linus Torvalds1da177e2005-04-16 15:20:36 -0700140
Paul Cercueilc434b9f2020-09-06 21:29:25 +0200141config MIPS_GENERIC_KERNEL
Paul Burtoneed0eab2016-10-05 18:18:20 +0100142 bool "Generic board-agnostic MIPS kernel"
Paul Cercueilc434b9f2020-09-06 21:29:25 +0200143 select MIPS_GENERIC
Paul Burtoneed0eab2016-10-05 18:18:20 +0100144 select BOOT_RAW
145 select BUILTIN_DTB
146 select CEVT_R4K
147 select CLKSRC_MIPS_GIC
148 select COMMON_CLK
Paul Burtoneed0eab2016-10-05 18:18:20 +0100149 select CPU_MIPSR2_IRQ_EI
Alexander Lobakin34c01e42020-01-22 13:58:51 +0300150 select CPU_MIPSR2_IRQ_VI
Paul Burtoneed0eab2016-10-05 18:18:20 +0100151 select CSRC_R4K
Christoph Hellwig4e066442021-02-10 10:56:41 +0100152 select DMA_NONCOHERENT
Christoph Hellwigeb01d422018-11-15 20:05:32 +0100153 select HAVE_PCI
Paul Burtoneed0eab2016-10-05 18:18:20 +0100154 select IRQ_MIPS_CPU
Gregory CLEMENT80f2e4c2024-02-16 18:42:21 +0100155 select MACH_GENERIC_CORE
Paul Burton0211d492018-07-27 18:23:21 -0700156 select MIPS_AUTO_PFN_OFFSET
Paul Burtoneed0eab2016-10-05 18:18:20 +0100157 select MIPS_CPU_SCACHE
158 select MIPS_GIC
159 select MIPS_L1_CACHE_SHIFT_7
160 select NO_EXCEPT_FILL
161 select PCI_DRIVERS_GENERIC
Paul Burtoneed0eab2016-10-05 18:18:20 +0100162 select SMP_UP if SMP
Matt Redfearna3078e52017-01-23 14:08:13 +0000163 select SWAP_IO_SPACE
Paul Burtoneed0eab2016-10-05 18:18:20 +0100164 select SYS_HAS_CPU_MIPS32_R1
165 select SYS_HAS_CPU_MIPS32_R2
Jiaxun Yangfb6700c2023-05-29 14:52:45 +0100166 select SYS_HAS_CPU_MIPS32_R5
Paul Burtoneed0eab2016-10-05 18:18:20 +0100167 select SYS_HAS_CPU_MIPS32_R6
168 select SYS_HAS_CPU_MIPS64_R1
169 select SYS_HAS_CPU_MIPS64_R2
Jiaxun Yangfb6700c2023-05-29 14:52:45 +0100170 select SYS_HAS_CPU_MIPS64_R5
Paul Burtoneed0eab2016-10-05 18:18:20 +0100171 select SYS_HAS_CPU_MIPS64_R6
172 select SYS_SUPPORTS_32BIT_KERNEL
173 select SYS_SUPPORTS_64BIT_KERNEL
174 select SYS_SUPPORTS_BIG_ENDIAN
175 select SYS_SUPPORTS_HIGHMEM
176 select SYS_SUPPORTS_LITTLE_ENDIAN
177 select SYS_SUPPORTS_MICROMIPS
Paul Burtoneed0eab2016-10-05 18:18:20 +0100178 select SYS_SUPPORTS_MIPS16
Alexander Lobakin34c01e42020-01-22 13:58:51 +0300179 select SYS_SUPPORTS_MIPS_CPS
Paul Burtoneed0eab2016-10-05 18:18:20 +0100180 select SYS_SUPPORTS_MULTITHREADING
181 select SYS_SUPPORTS_RELOCATABLE
182 select SYS_SUPPORTS_SMARTMIPS
Paul Cercueilc3e2ee62020-09-06 21:29:29 +0200183 select SYS_SUPPORTS_ZBOOT
Alexander Lobakin34c01e42020-01-22 13:58:51 +0300184 select UHI_BOOT
Corentin Labbe2e6522c2018-01-17 19:56:38 +0100185 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
186 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
187 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
188 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
189 select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
190 select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
Paul Burtoneed0eab2016-10-05 18:18:20 +0100191 select USE_OF
192 help
193 Select this to build a kernel which aims to support multiple boards,
194 generally using a flattened device tree passed from the bootloader
195 using the boot protocol defined in the UHI (Unified Hosting
196 Interface) specification.
197
Manuel Lauss42a4f172010-07-15 21:45:04 +0200198config MIPS_ALCHEMY
Yoichi Yuasac3543e22007-05-11 20:44:30 +0900199 bool "Alchemy processor based machines"
Christoph Hellwigd4a451d2018-04-03 16:24:20 +0200200 select PHYS_ADDR_T_64BIT
Ralf Baechlef772cdb2012-11-30 17:27:27 +0100201 select CEVT_R4K
Steven J. Hilld7ea3352012-11-14 23:34:17 -0600202 select CSRC_R4K
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200203 select IRQ_MIPS_CPU
Christoph Hellwiga86497d2021-02-10 10:56:40 +0100204 select DMA_NONCOHERENT # Au1000,1500,1100 aren't, rest is
Christoph Hellwigd3991572020-04-16 17:00:07 +0200205 select MIPS_FIXUP_BIGPHYS_ADDR if PCI
Manuel Lauss42a4f172010-07-15 21:45:04 +0200206 select SYS_HAS_CPU_MIPS32_R1
207 select SYS_SUPPORTS_32BIT_KERNEL
208 select SYS_SUPPORTS_APM_EMULATION
Linus Walleijd30a2b42016-04-19 11:23:22 +0200209 select GPIOLIB
Wu Zhangjin1b93b3c2009-10-14 18:12:16 +0800210 select SYS_SUPPORTS_ZBOOT
Manuel Lauss47440222014-07-23 16:36:48 +0200211 select COMMON_CLK
Linus Torvalds1da177e2005-04-16 15:20:36 -0700212
Sergey Ryazanov43cc7392014-10-29 03:18:38 +0400213config ATH25
214 bool "Atheros AR231x/AR531x SoC support"
215 select CEVT_R4K
216 select CSRC_R4K
217 select DMA_NONCOHERENT
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200218 select IRQ_MIPS_CPU
Sergey Ryazanov1753e742014-10-29 03:18:41 +0400219 select IRQ_DOMAIN
Sergey Ryazanov43cc7392014-10-29 03:18:38 +0400220 select SYS_HAS_CPU_MIPS32_R1
221 select SYS_SUPPORTS_BIG_ENDIAN
222 select SYS_SUPPORTS_32BIT_KERNEL
Sergey Ryazanov8aaa7272014-10-29 03:18:42 +0400223 select SYS_HAS_EARLY_PRINTK
Sergey Ryazanov43cc7392014-10-29 03:18:38 +0400224 help
225 Support for Atheros AR231x and Atheros AR531x based boards
226
Gabor Juhosd4a67d92011-01-04 21:28:14 +0100227config ATH79
228 bool "Atheros AR71XX/AR724X/AR913X based boards"
Alban Bedelff591a92015-08-03 19:23:52 +0200229 select ARCH_HAS_RESET_CONTROLLER
Gabor Juhosd4a67d92011-01-04 21:28:14 +0100230 select BOOT_RAW
231 select CEVT_R4K
232 select CSRC_R4K
233 select DMA_NONCOHERENT
Linus Walleijd30a2b42016-04-19 11:23:22 +0200234 select GPIOLIB
John Crispina08227a2018-07-20 13:58:20 +0200235 select PINCTRL
Alban Bedel411520a2015-04-19 14:30:04 +0200236 select COMMON_CLK
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200237 select IRQ_MIPS_CPU
Gabor Juhosd4a67d92011-01-04 21:28:14 +0100238 select SYS_HAS_CPU_MIPS32_R2
239 select SYS_HAS_EARLY_PRINTK
240 select SYS_SUPPORTS_32BIT_KERNEL
241 select SYS_SUPPORTS_BIG_ENDIAN
Ralf Baechle377cb1b2014-04-29 01:49:24 +0200242 select SYS_SUPPORTS_MIPS16
Alban Bedelb3f0a252016-01-26 09:38:29 +0100243 select SYS_SUPPORTS_ZBOOT_UART_PROM
Alban Bedel03c8c402015-05-31 01:52:25 +0200244 select USE_OF
Alban Bedel53d473f2018-03-24 23:47:22 +0100245 select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM
Gabor Juhosd4a67d92011-01-04 21:28:14 +0100246 help
247 Support for the Atheros AR71XX/AR724X/AR913X SoCs.
248
Kevin Cernekee5f2d4452014-12-25 09:49:00 -0800249config BMIPS_GENERIC
250 bool "Broadcom Generic BMIPS kernel"
Álvaro Fernández Rojas29906e12020-06-17 12:50:33 +0200251 select ARCH_HAS_RESET_CONTROLLER
Christoph Hellwigd59098a2018-06-15 13:08:52 +0200252 select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
Kevin Cernekeed666cd02014-10-20 21:28:05 -0700253 select BOOT_RAW
254 select NO_EXCEPT_FILL
255 select USE_OF
256 select CEVT_R4K
257 select CSRC_R4K
258 select SYNC_R4K
259 select COMMON_CLK
Simon Arlottc7c42ec2015-11-22 14:30:14 +0000260 select BCM6345_L1_IRQ
Kevin Cernekee60b858f2014-12-25 09:49:17 -0800261 select BCM7038_L1_IRQ
262 select BCM7120_L2_IRQ
263 select BRCMSTB_L2_IRQ
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200264 select IRQ_MIPS_CPU
Kevin Cernekee60b858f2014-12-25 09:49:17 -0800265 select DMA_NONCOHERENT
Kevin Cernekeed666cd02014-10-20 21:28:05 -0700266 select SYS_SUPPORTS_32BIT_KERNEL
Kevin Cernekee60b858f2014-12-25 09:49:17 -0800267 select SYS_SUPPORTS_LITTLE_ENDIAN
Kevin Cernekeed666cd02014-10-20 21:28:05 -0700268 select SYS_SUPPORTS_BIG_ENDIAN
269 select SYS_SUPPORTS_HIGHMEM
Kevin Cernekee60b858f2014-12-25 09:49:17 -0800270 select SYS_HAS_CPU_BMIPS32_3300
271 select SYS_HAS_CPU_BMIPS4350
272 select SYS_HAS_CPU_BMIPS4380
Kevin Cernekeed666cd02014-10-20 21:28:05 -0700273 select SYS_HAS_CPU_BMIPS5000
274 select SWAP_IO_SPACE
Kevin Cernekee60b858f2014-12-25 09:49:17 -0800275 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
276 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
277 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
278 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
Justin Chen4dc47042017-05-24 10:55:16 -0700279 select HARDIRQS_SW_RESEND
Florian Fainelli1d987052021-11-08 11:24:31 -0800280 select HAVE_PCI
281 select PCI_DRIVERS_GENERIC
Florian Fainelli466ab2e2022-07-15 14:37:47 -0700282 select FW_CFE
Kevin Cernekeed666cd02014-10-20 21:28:05 -0700283 help
Kevin Cernekee5f2d4452014-12-25 09:49:00 -0800284 Build a generic DT-based kernel image that boots on select
285 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
286 box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
287 must be set appropriately for your board.
Kevin Cernekeed666cd02014-10-20 21:28:05 -0700288
Aurelien Jarno1c0c13e2007-09-25 15:40:12 +0200289config BCM47XX
Florian Fainellic6193662010-03-25 11:42:41 +0100290 bool "Broadcom BCM47XX based boards"
Hauke Mehrtensfe08f8c2012-12-26 20:06:17 +0000291 select BOOT_RAW
Ralf Baechle42f77542007-10-18 17:48:11 +0100292 select CEVT_R4K
Ralf Baechle940f6b42007-11-24 22:33:28 +0000293 select CSRC_R4K
Aurelien Jarno1c0c13e2007-09-25 15:40:12 +0200294 select DMA_NONCOHERENT
Christoph Hellwigeb01d422018-11-15 20:05:32 +0100295 select HAVE_PCI
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200296 select IRQ_MIPS_CPU
Markos Chandras314878d2013-07-23 15:40:37 +0100297 select SYS_HAS_CPU_MIPS32_R1
Hauke Mehrtensdd54ded2012-12-26 20:06:18 +0000298 select NO_EXCEPT_FILL
Aurelien Jarno1c0c13e2007-09-25 15:40:12 +0200299 select SYS_SUPPORTS_32BIT_KERNEL
300 select SYS_SUPPORTS_LITTLE_ENDIAN
Ralf Baechle377cb1b2014-04-29 01:49:24 +0200301 select SYS_SUPPORTS_MIPS16
Aaro Koskinen65078312018-01-17 00:21:44 +0200302 select SYS_SUPPORTS_ZBOOT
Aurelien Jarno25e5fb92007-09-25 15:41:24 +0200303 select SYS_HAS_EARLY_PRINTK
Ralf Baechlee6086552014-03-26 21:40:25 +0100304 select USE_GENERIC_EARLY_PRINTK_8250
Rafał Miłeckic949c0b2014-06-17 16:36:50 +0200305 select GPIOLIB
306 select LEDS_GPIO_REGISTER
Rafał Miłeckif6e734a2015-06-10 23:05:08 +0200307 select BCM47XX_NVRAM
Rafał Miłecki2ab71a02016-01-25 09:50:29 +0100308 select BCM47XX_SPROM
Matt Redfearndfe00492017-11-14 17:16:27 +0000309 select BCM47XX_SSB if !BCM47XX_BCMA
Aurelien Jarno1c0c13e2007-09-25 15:40:12 +0200310 help
Enrico Weigelt, metux IT consult371a4152019-03-11 16:54:27 +0100311 Support for BCM47XX based boards
Aurelien Jarno1c0c13e2007-09-25 15:40:12 +0200312
Maxime Bizone7300d02009-08-18 13:23:37 +0100313config BCM63XX
314 bool "Broadcom BCM63XX based boards"
Florian Fainelliae8de612013-06-18 16:55:39 +0000315 select BOOT_RAW
Maxime Bizone7300d02009-08-18 13:23:37 +0100316 select CEVT_R4K
317 select CSRC_R4K
Jonas Gorskifc264022014-07-08 16:26:13 +0200318 select SYNC_R4K
Maxime Bizone7300d02009-08-18 13:23:37 +0100319 select DMA_NONCOHERENT
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200320 select IRQ_MIPS_CPU
Maxime Bizone7300d02009-08-18 13:23:37 +0100321 select SYS_SUPPORTS_32BIT_KERNEL
322 select SYS_SUPPORTS_BIG_ENDIAN
323 select SYS_HAS_EARLY_PRINTK
Randy Dunlap5eeaafc2021-11-06 08:49:11 -0700324 select SYS_HAS_CPU_BMIPS32_3300
325 select SYS_HAS_CPU_BMIPS4350
326 select SYS_HAS_CPU_BMIPS4380
Maxime Bizone7300d02009-08-18 13:23:37 +0100327 select SWAP_IO_SPACE
Linus Walleijd30a2b42016-04-19 11:23:22 +0200328 select GPIOLIB
Florian Fainelliaf2418b2014-01-14 09:54:40 -0800329 select MIPS_L1_CACHE_SHIFT_4
Stephen Boydbbd7ffd2020-04-08 23:44:13 -0700330 select HAVE_LEGACY_CLK
Maxime Bizone7300d02009-08-18 13:23:37 +0100331 help
Enrico Weigelt, metux IT consult371a4152019-03-11 16:54:27 +0100332 Support for BCM63XX based boards
Maxime Bizone7300d02009-08-18 13:23:37 +0100333
Linus Torvalds1da177e2005-04-16 15:20:36 -0700334config MIPS_COBALT
Martin Michlmayr3fa986f2006-05-09 23:34:53 +0200335 bool "Cobalt Server"
Ralf Baechle42f77542007-10-18 17:48:11 +0100336 select CEVT_R4K
Ralf Baechle940f6b42007-11-24 22:33:28 +0000337 select CSRC_R4K
Yoichi Yuasa1097c6a2007-10-22 19:43:15 +0900338 select CEVT_GT641XX
Linus Torvalds1da177e2005-04-16 15:20:36 -0700339 select DMA_NONCOHERENT
Christoph Hellwigeb01d422018-11-15 20:05:32 +0100340 select FORCE_PCI
Ralf Baechled865bea2007-10-11 23:46:10 +0100341 select I8253
Linus Torvalds1da177e2005-04-16 15:20:36 -0700342 select I8259
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200343 select IRQ_MIPS_CPU
Yoichi Yuasad5ab1a62007-09-13 23:51:26 +0900344 select IRQ_GT641XX
Yoichi Yuasa252161e2007-03-14 21:51:26 +0900345 select PCI_GT64XXX_PCI0
Ralf Baechle7cf80532005-10-20 22:33:09 +0100346 select SYS_HAS_CPU_NEVADA
Yoichi Yuasa0a22e0d2007-03-02 12:42:33 +0900347 select SYS_HAS_EARLY_PRINTK
Yoichi Yuasaed5ba2f2005-09-03 15:56:21 -0700348 select SYS_SUPPORTS_32BIT_KERNEL
Florian Fainelli0e8774b2008-01-15 19:42:57 +0100349 select SYS_SUPPORTS_64BIT_KERNEL
Ralf Baechle5e83d432005-10-29 19:32:41 +0100350 select SYS_SUPPORTS_LITTLE_ENDIAN
Ralf Baechlee6086552014-03-26 21:40:25 +0100351 select USE_GENERIC_EARLY_PRINTK_8250
Linus Torvalds1da177e2005-04-16 15:20:36 -0700352
353config MACH_DECSTATION
Martin Michlmayr3fa986f2006-05-09 23:34:53 +0200354 bool "DECstations"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700355 select BOOT_ELF32
Yoichi Yuasa6457d9f2008-04-25 12:11:44 +0900356 select CEVT_DS1287
Maciej W. Rozycki81d10ba2014-04-06 21:46:05 +0100357 select CEVT_R4K if CPU_R4X00
Yoichi Yuasa42474172008-04-24 09:48:40 +0900358 select CSRC_IOASIC
Maciej W. Rozycki81d10ba2014-04-06 21:46:05 +0100359 select CSRC_R4K if CPU_R4X00
Maciej W. Rozycki20d60d92007-10-23 12:43:11 +0100360 select CPU_DADDI_WORKAROUNDS if 64BIT
361 select CPU_R4000_WORKAROUNDS if 64BIT
362 select CPU_R4400_WORKAROUNDS if 64BIT
Linus Torvalds1da177e2005-04-16 15:20:36 -0700363 select DMA_NONCOHERENT
Uwe Kleine-Königce816fa2014-04-07 15:39:19 -0700364 select NO_IOPORT_MAP
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200365 select IRQ_MIPS_CPU
Ralf Baechle7cf80532005-10-20 22:33:09 +0100366 select SYS_HAS_CPU_R3000
367 select SYS_HAS_CPU_R4X00
Yoichi Yuasaed5ba2f2005-09-03 15:56:21 -0700368 select SYS_SUPPORTS_32BIT_KERNEL
Kees Cook7d607172013-01-16 18:53:19 -0800369 select SYS_SUPPORTS_64BIT_KERNEL
Ralf Baechle5e83d432005-10-29 19:32:41 +0100370 select SYS_SUPPORTS_LITTLE_ENDIAN
Atsushi Nemoto1723b4a2006-06-20 00:19:13 +0900371 select SYS_SUPPORTS_128HZ
372 select SYS_SUPPORTS_256HZ
373 select SYS_SUPPORTS_1024HZ
Florian Fainelli930beb52014-01-14 09:54:38 -0800374 select MIPS_L1_CACHE_SHIFT_4
Ralf Baechle5e83d432005-10-29 19:32:41 +0100375 help
Linus Torvalds1da177e2005-04-16 15:20:36 -0700376 This enables support for DEC's MIPS based workstations. For details
377 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
378 DECstation porting pages on <http://decstation.unix-ag.org/>.
379
380 If you have one of the following DECstation Models you definitely
381 want to choose R4xx0 for the CPU Type:
382
Ralf Baechle93088162007-08-29 14:21:45 +0100383 DECstation 5000/50
384 DECstation 5000/150
385 DECstation 5000/260
386 DECsystem 5900/260
Linus Torvalds1da177e2005-04-16 15:20:36 -0700387
388 otherwise choose R3000.
389
Ralf Baechle5e83d432005-10-29 19:32:41 +0100390config MACH_JAZZ
Martin Michlmayr3fa986f2006-05-09 23:34:53 +0200391 bool "Jazz family of machines"
Thomas Bogendoerfer39b2d752019-10-09 15:27:14 +0200392 select ARC_MEMORY
393 select ARC_PROMLIB
Ralf Baechlea211a0822018-02-05 15:37:43 +0100394 select ARCH_MIGHT_HAVE_PC_PARPORT
Ralf Baechle7a407aa2018-02-05 16:40:00 +0100395 select ARCH_MIGHT_HAVE_PC_SERIO
Christoph Hellwig2f9237d2020-07-08 09:30:00 +0200396 select DMA_OPS
Ralf Baechle0e2794b2012-11-15 20:48:50 +0100397 select FW_ARC
398 select FW_ARC32
Ralf Baechle5e83d432005-10-29 19:32:41 +0100399 select ARCH_MAY_HAVE_PC_FDC
Ralf Baechle42f77542007-10-18 17:48:11 +0100400 select CEVT_R4K
Ralf Baechle940f6b42007-11-24 22:33:28 +0000401 select CSRC_R4K
Thomas Bogendoerfere2defae2007-12-02 13:00:32 +0100402 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
Ralf Baechle5e83d432005-10-29 19:32:41 +0100403 select GENERIC_ISA_DMA
Ralf Baechle8a118c32011-06-01 19:05:10 +0100404 select HAVE_PCSPKR_PLATFORM
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200405 select IRQ_MIPS_CPU
Ralf Baechled865bea2007-10-11 23:46:10 +0100406 select I8253
Ralf Baechle5e83d432005-10-29 19:32:41 +0100407 select I8259
408 select ISA
Ralf Baechle7cf80532005-10-20 22:33:09 +0100409 select SYS_HAS_CPU_R4X00
Ralf Baechle5e83d432005-10-29 19:32:41 +0100410 select SYS_SUPPORTS_32BIT_KERNEL
Kees Cook7d607172013-01-16 18:53:19 -0800411 select SYS_SUPPORTS_64BIT_KERNEL
Atsushi Nemoto1723b4a2006-06-20 00:19:13 +0900412 select SYS_SUPPORTS_100HZ
Arnd Bergmannaadfe4b2021-01-22 12:02:50 +0100413 select SYS_SUPPORTS_LITTLE_ENDIAN
Linus Torvalds1da177e2005-04-16 15:20:36 -0700414 help
Enrico Weigelt, metux IT consult371a4152019-03-11 16:54:27 +0100415 This a family of machines based on the MIPS R4030 chipset which was
416 used by several vendors to build RISC/os and Windows NT workstations.
417 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
418 Olivetti M700-10 workstations.
Ralf Baechle5e83d432005-10-29 19:32:41 +0100419
Paul Cercueilf0f4a752020-09-06 21:29:31 +0200420config MACH_INGENIC_SOC
Paul Burtonde361e82015-05-24 16:11:13 +0100421 bool "Ingenic SoC based machines"
Paul Cercueilf0f4a752020-09-06 21:29:31 +0200422 select MIPS_GENERIC
423 select MACH_INGENIC
Gregory CLEMENT80f2e4c2024-02-16 18:42:21 +0100424 select MACH_GENERIC_CORE
Lluís Batlle i Rossellf9c9aff2012-03-30 16:48:05 +0200425 select SYS_SUPPORTS_ZBOOT_UART16550
Paul Cercueileb384932021-05-30 18:17:59 +0100426 select CPU_SUPPORTS_CPUFREQ
427 select MIPS_EXTERNAL_TIMER
Lars-Peter Clausen5ebabe52010-06-19 04:08:19 +0000428
John Crispin171bb2f2011-03-30 09:27:47 +0200429config LANTIQ
430 bool "Lantiq based platforms"
431 select DMA_NONCOHERENT
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200432 select IRQ_MIPS_CPU
John Crispin171bb2f2011-03-30 09:27:47 +0200433 select CEVT_R4K
434 select CSRC_R4K
Sander Vanheuleb74cc632023-01-15 13:19:22 +0100435 select NO_EXCEPT_FILL
John Crispin171bb2f2011-03-30 09:27:47 +0200436 select SYS_HAS_CPU_MIPS32_R1
437 select SYS_HAS_CPU_MIPS32_R2
438 select SYS_SUPPORTS_BIG_ENDIAN
439 select SYS_SUPPORTS_32BIT_KERNEL
Ralf Baechle377cb1b2014-04-29 01:49:24 +0200440 select SYS_SUPPORTS_MIPS16
John Crispin171bb2f2011-03-30 09:27:47 +0200441 select SYS_SUPPORTS_MULTITHREADING
James Hoganf35764e2018-01-15 20:54:35 +0000442 select SYS_SUPPORTS_VPE_LOADER
John Crispin171bb2f2011-03-30 09:27:47 +0200443 select SYS_HAS_EARLY_PRINTK
Linus Walleijd30a2b42016-04-19 11:23:22 +0200444 select GPIOLIB
John Crispin171bb2f2011-03-30 09:27:47 +0200445 select SWAP_IO_SPACE
446 select BOOT_RAW
Stephen Boydbbd7ffd2020-04-08 23:44:13 -0700447 select HAVE_LEGACY_CLK
John Crispina0392222012-04-13 20:56:13 +0200448 select USE_OF
John Crispin3f8c50c2012-08-28 12:44:59 +0200449 select PINCTRL
450 select PINCTRL_LANTIQ
John Crispinc5307812013-09-03 13:18:12 +0200451 select ARCH_HAS_RESET_CONTROLLER
452 select RESET_CONTROLLER
John Crispin171bb2f2011-03-30 09:27:47 +0200453
Huacai Chen30ad29b2015-04-21 10:00:35 +0800454config MACH_LOONGSON32
Huacai Chencaed1d12019-11-04 14:11:21 +0800455 bool "Loongson 32-bit family of machines"
Wu Zhangjinc7e8c662010-01-04 17:16:46 +0800456 select SYS_SUPPORTS_ZBOOT
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900457 help
Huacai Chen30ad29b2015-04-21 10:00:35 +0800458 This enables support for the Loongson-1 family of machines.
Wu Zhangjin85749d22009-07-02 23:26:45 +0800459
Huacai Chen30ad29b2015-04-21 10:00:35 +0800460 Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
461 the Institute of Computing Technology (ICT), Chinese Academy of
462 Sciences (CAS).
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900463
Jiaxun Yang71e2f4d2019-10-20 22:43:14 +0800464config MACH_LOONGSON2EF
465 bool "Loongson-2E/F family of machines"
Kelvin Cheungca585cf2012-07-25 16:17:24 +0200466 select SYS_SUPPORTS_ZBOOT
467 help
Jiaxun Yang71e2f4d2019-10-20 22:43:14 +0800468 This enables the support of early Loongson-2E/F family of machines.
Kelvin Cheungca585cf2012-07-25 16:17:24 +0200469
Jiaxun Yang71e2f4d2019-10-20 22:43:14 +0800470config MACH_LOONGSON64
Huacai Chencaed1d12019-11-04 14:11:21 +0800471 bool "Loongson 64-bit family of machines"
Jiaxun Yangedc03782023-11-07 11:15:19 +0000472 select ARCH_DMA_DEFAULT_COHERENT
Jiaxun Yang6fbde6b2019-10-20 23:01:36 +0800473 select ARCH_SPARSEMEM_ENABLE
474 select ARCH_MIGHT_HAVE_PC_PARPORT
475 select ARCH_MIGHT_HAVE_PC_SERIO
476 select GENERIC_ISA_DMA_SUPPORT_BROKEN
477 select BOOT_ELF32
478 select BOARD_SCACHE
479 select CSRC_R4K
480 select CEVT_R4K
Jiaxun Yang6fbde6b2019-10-20 23:01:36 +0800481 select FORCE_PCI
482 select ISA
483 select I8259
484 select IRQ_MIPS_CPU
Jiaxun Yang7d6d2832020-05-27 14:34:34 +0800485 select NO_EXCEPT_FILL
Tiezhu Yang5125bfe2020-03-31 15:00:06 +0800486 select NR_CPUS_DEFAULT_64
Jiaxun Yang6fbde6b2019-10-20 23:01:36 +0800487 select USE_GENERIC_EARLY_PRINTK_8250
Jiaxun Yang6423e592020-05-26 17:21:16 +0800488 select PCI_DRIVERS_GENERIC
Jiaxun Yang6fbde6b2019-10-20 23:01:36 +0800489 select SYS_HAS_CPU_LOONGSON64
490 select SYS_HAS_EARLY_PRINTK
491 select SYS_SUPPORTS_SMP
492 select SYS_SUPPORTS_HOTPLUG_CPU
493 select SYS_SUPPORTS_NUMA
494 select SYS_SUPPORTS_64BIT_KERNEL
495 select SYS_SUPPORTS_HIGHMEM
496 select SYS_SUPPORTS_LITTLE_ENDIAN
Jiaxun Yang71e2f4d2019-10-20 22:43:14 +0800497 select SYS_SUPPORTS_ZBOOT
Jinyang Hea307a4c2020-11-25 18:07:46 +0800498 select SYS_SUPPORTS_RELOCATABLE
Jiaxun Yang6fbde6b2019-10-20 23:01:36 +0800499 select ZONE_DMA32
Jiaxun Yang87fcfa72020-03-25 11:55:02 +0800500 select COMMON_CLK
501 select USE_OF
502 select BUILTIN_DTB
Huacai Chen39c14852020-07-29 14:58:37 +0800503 select PCI_HOST_GENERIC
Feiyang Chenf8f9f212022-03-19 17:40:02 +0800504 select HAVE_ARCH_NODEDATA_EXTENSION if NUMA
Jiaxun Yang71e2f4d2019-10-20 22:43:14 +0800505 help
Huacai Chencaed1d12019-11-04 14:11:21 +0800506 This enables the support of Loongson-2/3 family of machines.
507
508 Loongson-2 and Loongson-3 are 64-bit general-purpose processors with
509 GS264/GS464/GS464E/GS464V microarchitecture (except old Loongson-2E
510 and Loongson-2F which will be removed), developed by the Institute
511 of Computing Technology (ICT), Chinese Academy of Sciences (CAS).
Kelvin Cheungca585cf2012-07-25 16:17:24 +0200512
Linus Torvalds1da177e2005-04-16 15:20:36 -0700513config MIPS_MALTA
Martin Michlmayr3fa986f2006-05-09 23:34:53 +0200514 bool "MIPS Malta board"
Ralf Baechle61ed2422005-09-15 08:52:34 +0000515 select ARCH_MAY_HAVE_PC_FDC
Ralf Baechlea211a0822018-02-05 15:37:43 +0100516 select ARCH_MIGHT_HAVE_PC_PARPORT
Ralf Baechle7a407aa2018-02-05 16:40:00 +0100517 select ARCH_MIGHT_HAVE_PC_SERIO
Linus Torvalds1da177e2005-04-16 15:20:36 -0700518 select BOOT_ELF32
Ralf Baechlefa71c962008-01-29 10:15:00 +0000519 select BOOT_RAW
Paul Burtone8823d22015-05-22 16:51:02 +0100520 select BUILTIN_DTB
Ralf Baechle42f77542007-10-18 17:48:11 +0100521 select CEVT_R4K
Andrew Brestickerfa5635a2014-10-20 12:03:58 -0700522 select CLKSRC_MIPS_GIC
Guenter Roeck42b002a2015-08-22 02:40:41 -0700523 select COMMON_CLK
Maksym Kokhan47bf2b02018-11-12 19:00:59 +0200524 select CSRC_R4K
Christoph Hellwiga86497d2021-02-10 10:56:40 +0100525 select DMA_NONCOHERENT
Linus Torvalds1da177e2005-04-16 15:20:36 -0700526 select GENERIC_ISA_DMA
Ralf Baechle8a118c32011-06-01 19:05:10 +0100527 select HAVE_PCSPKR_PLATFORM
Christoph Hellwigeb01d422018-11-15 20:05:32 +0100528 select HAVE_PCI
Ralf Baechled865bea2007-10-11 23:46:10 +0100529 select I8253
Linus Torvalds1da177e2005-04-16 15:20:36 -0700530 select I8259
Maksym Kokhan47bf2b02018-11-12 19:00:59 +0200531 select IRQ_MIPS_CPU
Ralf Baechle5e83d432005-10-29 19:32:41 +0100532 select MIPS_BONITO64
Chris Dearman9318c512006-06-20 17:15:20 +0100533 select MIPS_CPU_SCACHE
Maksym Kokhan47bf2b02018-11-12 19:00:59 +0200534 select MIPS_GIC
Kevin Cernekeea7ef1ea2014-10-20 21:27:57 -0700535 select MIPS_L1_CACHE_SHIFT_6
Ralf Baechle5e83d432005-10-29 19:32:41 +0100536 select MIPS_MSC
Maksym Kokhan47bf2b02018-11-12 19:00:59 +0200537 select PCI_GT64XXX_PCI0
Paul Burtonecafe3e2015-09-22 11:58:43 -0700538 select SMP_UP if SMP
Linus Torvalds1da177e2005-04-16 15:20:36 -0700539 select SWAP_IO_SPACE
Ralf Baechle7cf80532005-10-20 22:33:09 +0100540 select SYS_HAS_CPU_MIPS32_R1
541 select SYS_HAS_CPU_MIPS32_R2
Markos Chandrasbfc3c5a2014-01-16 13:12:36 +0000542 select SYS_HAS_CPU_MIPS32_R3_5
Steven J. Hillc5b36782015-02-26 18:16:38 -0600543 select SYS_HAS_CPU_MIPS32_R5
Markos Chandras575509b2014-11-19 11:31:56 +0000544 select SYS_HAS_CPU_MIPS32_R6
Ralf Baechle7cf80532005-10-20 22:33:09 +0100545 select SYS_HAS_CPU_MIPS64_R1
Leonid Yegoshin5d9fbed2012-07-19 09:11:15 +0200546 select SYS_HAS_CPU_MIPS64_R2
Markos Chandras575509b2014-11-19 11:31:56 +0000547 select SYS_HAS_CPU_MIPS64_R6
Ralf Baechle7cf80532005-10-20 22:33:09 +0100548 select SYS_HAS_CPU_NEVADA
549 select SYS_HAS_CPU_RM7000
Yoichi Yuasaed5ba2f2005-09-03 15:56:21 -0700550 select SYS_SUPPORTS_32BIT_KERNEL
551 select SYS_SUPPORTS_64BIT_KERNEL
Ralf Baechle5e83d432005-10-29 19:32:41 +0100552 select SYS_SUPPORTS_BIG_ENDIAN
Steven J. Hillc5b36782015-02-26 18:16:38 -0600553 select SYS_SUPPORTS_HIGHMEM
Ralf Baechle5e83d432005-10-29 19:32:41 +0100554 select SYS_SUPPORTS_LITTLE_ENDIAN
Maciej W. Rozycki424ebcd2014-11-15 22:07:07 +0000555 select SYS_SUPPORTS_MICROMIPS
Maksym Kokhan47bf2b02018-11-12 19:00:59 +0200556 select SYS_SUPPORTS_MIPS16
Paul Burtone56b6aa2014-01-15 10:31:56 +0000557 select SYS_SUPPORTS_MIPS_CPS
Ralf Baechlef41ae0b2006-06-05 17:24:46 +0100558 select SYS_SUPPORTS_MULTITHREADING
Maksym Kokhan47bf2b02018-11-12 19:00:59 +0200559 select SYS_SUPPORTS_RELOCATABLE
Franck Bui-Huu9693a852007-02-02 17:41:47 +0100560 select SYS_SUPPORTS_SMARTMIPS
James Hoganf35764e2018-01-15 20:54:35 +0000561 select SYS_SUPPORTS_VPE_LOADER
Wu Zhangjin1b93b3c2009-10-14 18:12:16 +0800562 select SYS_SUPPORTS_ZBOOT
Paul Burtone8823d22015-05-22 16:51:02 +0100563 select USE_OF
Thomas Bogendoerfer886ee132020-08-24 18:32:48 +0200564 select WAR_ICACHE_REFILLS
James Hoganabcc82b2015-04-27 15:07:19 +0100565 select ZONE_DMA32 if 64BIT
Linus Torvalds1da177e2005-04-16 15:20:36 -0700566 help
Maciej W. Rozyckif638d192005-02-02 22:23:46 +0000567 This enables support for the MIPS Technologies Malta evaluation
Linus Torvalds1da177e2005-04-16 15:20:36 -0700568 board.
569
Joshua Henderson2572f002016-01-13 18:15:39 -0700570config MACH_PIC32
571 bool "Microchip PIC32 Family"
572 help
573 This enables support for the Microchip PIC32 family of platforms.
574
575 Microchip PIC32 is a family of general-purpose 32 bit MIPS core
576 microcontrollers.
577
Gregory CLEMENT101bd582024-02-16 18:42:22 +0100578config MACH_EYEQ5
579 bool "Mobileye EyeQ5 SoC"
580 select MACH_GENERIC_CORE
581 select ARM_AMBA
582 select PHYSICAL_START_BOOL
583 select ARCH_SPARSEMEM_DEFAULT if 64BIT
584 select BOOT_RAW
585 select BUILTIN_DTB
586 select CEVT_R4K
587 select CLKSRC_MIPS_GIC
588 select COMMON_CLK
589 select CPU_MIPSR2_IRQ_EI
590 select CPU_MIPSR2_IRQ_VI
591 select CSRC_R4K
592 select DMA_NONCOHERENT
593 select HAVE_PCI
594 select IRQ_MIPS_CPU
595 select MIPS_AUTO_PFN_OFFSET
596 select MIPS_CPU_SCACHE
597 select MIPS_GIC
598 select MIPS_L1_CACHE_SHIFT_7
599 select PCI_DRIVERS_GENERIC
600 select SMP_UP if SMP
601 select SWAP_IO_SPACE
602 select SYS_HAS_CPU_MIPS64_R6
603 select SYS_SUPPORTS_64BIT_KERNEL
604 select SYS_SUPPORTS_HIGHMEM
605 select SYS_SUPPORTS_LITTLE_ENDIAN
606 select SYS_SUPPORTS_MIPS_CPS
607 select SYS_SUPPORTS_RELOCATABLE
608 select SYS_SUPPORTS_ZBOOT
609 select UHI_BOOT
610 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
611 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
612 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
613 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
614 select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
615 select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
616 select USE_OF
617 help
618 Select this to build a kernel supporting EyeQ5 SoC from Mobileye.
619
620 bool
621
Lauri Kasanenbaec9702021-01-13 17:11:23 +0200622config MACH_NINTENDO64
623 bool "Nintendo 64 console"
624 select CEVT_R4K
625 select CSRC_R4K
626 select SYS_HAS_CPU_R4300
627 select SYS_SUPPORTS_BIG_ENDIAN
628 select SYS_SUPPORTS_ZBOOT
629 select SYS_SUPPORTS_32BIT_KERNEL
630 select SYS_SUPPORTS_64BIT_KERNEL
631 select DMA_NONCOHERENT
632 select IRQ_MIPS_CPU
633
John Crispinae2b5bb2013-01-20 22:05:30 +0100634config RALINK
635 bool "Ralink based machines"
636 select CEVT_R4K
Arnd Bergmann35f752b2021-05-31 13:51:18 +0200637 select COMMON_CLK
John Crispinae2b5bb2013-01-20 22:05:30 +0100638 select CSRC_R4K
639 select BOOT_RAW
640 select DMA_NONCOHERENT
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200641 select IRQ_MIPS_CPU
John Crispinae2b5bb2013-01-20 22:05:30 +0100642 select USE_OF
John Crispinae2b5bb2013-01-20 22:05:30 +0100643 select SYS_HAS_CPU_MIPS32_R2
644 select SYS_SUPPORTS_32BIT_KERNEL
645 select SYS_SUPPORTS_LITTLE_ENDIAN
Ralf Baechle377cb1b2014-04-29 01:49:24 +0200646 select SYS_SUPPORTS_MIPS16
Chuanhong Guo1f0400d2020-10-13 10:05:47 +0800647 select SYS_SUPPORTS_ZBOOT
John Crispinae2b5bb2013-01-20 22:05:30 +0100648 select SYS_HAS_EARLY_PRINTK
John Crispin2a153f12013-09-04 00:16:59 +0200649 select ARCH_HAS_RESET_CONTROLLER
650 select RESET_CONTROLLER
John Crispinae2b5bb2013-01-20 22:05:30 +0100651
Bert Vermeulen40421472021-01-19 10:21:07 +0100652config MACH_REALTEK_RTL
653 bool "Realtek RTL838x/RTL839x based machines"
654 select MIPS_GENERIC
Gregory CLEMENT80f2e4c2024-02-16 18:42:21 +0100655 select MACH_GENERIC_CORE
Bert Vermeulen40421472021-01-19 10:21:07 +0100656 select DMA_NONCOHERENT
657 select IRQ_MIPS_CPU
658 select CSRC_R4K
659 select CEVT_R4K
660 select SYS_HAS_CPU_MIPS32_R1
661 select SYS_HAS_CPU_MIPS32_R2
662 select SYS_SUPPORTS_BIG_ENDIAN
663 select SYS_SUPPORTS_32BIT_KERNEL
664 select SYS_SUPPORTS_MIPS16
665 select SYS_SUPPORTS_MULTITHREADING
666 select SYS_SUPPORTS_VPE_LOADER
Bert Vermeulen40421472021-01-19 10:21:07 +0100667 select BOOT_RAW
668 select PINCTRL
669 select USE_OF
670
Linus Torvalds1da177e2005-04-16 15:20:36 -0700671config SGI_IP22
Martin Michlmayr3fa986f2006-05-09 23:34:53 +0200672 bool "SGI IP22 (Indy/Indigo2)"
Thomas Bogendoerferc0de00b2019-10-09 15:27:17 +0200673 select ARC_MEMORY
Thomas Bogendoerfer39b2d752019-10-09 15:27:14 +0200674 select ARC_PROMLIB
Ralf Baechle0e2794b2012-11-15 20:48:50 +0100675 select FW_ARC
676 select FW_ARC32
Ralf Baechle7a407aa2018-02-05 16:40:00 +0100677 select ARCH_MIGHT_HAVE_PC_SERIO
Linus Torvalds1da177e2005-04-16 15:20:36 -0700678 select BOOT_ELF32
Ralf Baechle42f77542007-10-18 17:48:11 +0100679 select CEVT_R4K
Ralf Baechle940f6b42007-11-24 22:33:28 +0000680 select CSRC_R4K
Thomas Bogendoerfere2defae2007-12-02 13:00:32 +0100681 select DEFAULT_SGI_PARTITION
Linus Torvalds1da177e2005-04-16 15:20:36 -0700682 select DMA_NONCOHERENT
Christoph Hellwig6630a8e2018-11-15 20:05:37 +0100683 select HAVE_EISA
Ralf Baechled865bea2007-10-11 23:46:10 +0100684 select I8253
Thomas Bogendoerfer68de4802007-11-23 20:34:16 +0100685 select I8259
Linus Torvalds1da177e2005-04-16 15:20:36 -0700686 select IP22_CPU_SCACHE
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200687 select IRQ_MIPS_CPU
Ralf Baechleaa414df2006-11-30 01:14:51 +0000688 select GENERIC_ISA_DMA_SUPPORT_BROKEN
Thomas Bogendoerfere2defae2007-12-02 13:00:32 +0100689 select SGI_HAS_I8042
690 select SGI_HAS_INDYDOG
Thomas Bogendoerfer36e5c212008-07-16 14:06:15 +0200691 select SGI_HAS_HAL2
Thomas Bogendoerfere2defae2007-12-02 13:00:32 +0100692 select SGI_HAS_SEEQ
693 select SGI_HAS_WD93
694 select SGI_HAS_ZILOG
Linus Torvalds1da177e2005-04-16 15:20:36 -0700695 select SWAP_IO_SPACE
Ralf Baechle7cf80532005-10-20 22:33:09 +0100696 select SYS_HAS_CPU_R4X00
697 select SYS_HAS_CPU_R5000
Thomas Bogendoerferc0de00b2019-10-09 15:27:17 +0200698 select SYS_HAS_EARLY_PRINTK
Yoichi Yuasaed5ba2f2005-09-03 15:56:21 -0700699 select SYS_SUPPORTS_32BIT_KERNEL
700 select SYS_SUPPORTS_64BIT_KERNEL
Ralf Baechle5e83d432005-10-29 19:32:41 +0100701 select SYS_SUPPORTS_BIG_ENDIAN
Thomas Bogendoerfer802b83622020-08-24 18:32:43 +0200702 select WAR_R4600_V1_INDEX_ICACHEOP
Thomas Bogendoerfer5e5b6522020-08-24 18:32:44 +0200703 select WAR_R4600_V1_HIT_CACHEOP
Thomas Bogendoerfer44def342020-08-24 18:32:45 +0200704 select WAR_R4600_V2_HIT_CACHEOP
Florian Fainelli930beb52014-01-14 09:54:38 -0800705 select MIPS_L1_CACHE_SHIFT_7
Linus Torvalds1da177e2005-04-16 15:20:36 -0700706 help
707 This are the SGI Indy, Challenge S and Indigo2, as well as certain
708 OEM variants like the Tandem CMN B006S. To compile a Linux kernel
709 that runs on these, say Y here.
710
711config SGI_IP27
Martin Michlmayr3fa986f2006-05-09 23:34:53 +0200712 bool "SGI IP27 (Origin200/2000)"
Christoph Hellwig54aed4d2018-06-15 13:08:44 +0200713 select ARCH_HAS_PHYS_TO_DMA
Mike Rapoport397dc002019-09-16 14:13:10 +0300714 select ARCH_SPARSEMEM_ENABLE
Ralf Baechle0e2794b2012-11-15 20:48:50 +0100715 select FW_ARC
716 select FW_ARC64
Thomas Bogendoerfere9422422019-10-22 18:13:15 +0200717 select ARC_CMDLINE_ONLY
Ralf Baechle5e83d432005-10-29 19:32:41 +0100718 select BOOT_ELF64
Thomas Bogendoerfere2defae2007-12-02 13:00:32 +0100719 select DEFAULT_SGI_PARTITION
Christoph Hellwig04100452021-03-01 08:38:32 +0100720 select FORCE_PCI
Ralf Baechle36a88532007-03-01 11:56:43 +0000721 select SYS_HAS_EARLY_PRINTK
Christoph Hellwigeb01d422018-11-15 20:05:32 +0100722 select HAVE_PCI
Thomas Bogendoerfer69a07a42019-02-19 16:57:20 +0100723 select IRQ_MIPS_CPU
Thomas Bogendoerfere6308b62019-05-07 23:09:15 +0200724 select IRQ_DOMAIN_HIERARCHY
Ralf Baechle130e2fb2007-02-06 16:53:15 +0000725 select NR_CPUS_DEFAULT_64
Thomas Bogendoerfera57140e2019-05-07 23:09:13 +0200726 select PCI_DRIVERS_GENERIC
727 select PCI_XTALK_BRIDGE
Ralf Baechle7cf80532005-10-20 22:33:09 +0100728 select SYS_HAS_CPU_R10000
Yoichi Yuasaed5ba2f2005-09-03 15:56:21 -0700729 select SYS_SUPPORTS_64BIT_KERNEL
Ralf Baechle5e83d432005-10-29 19:32:41 +0100730 select SYS_SUPPORTS_BIG_ENDIAN
Ralf Baechled8cb4e12006-06-11 23:03:08 +0100731 select SYS_SUPPORTS_NUMA
Ralf Baechle1a5c5de2006-11-02 17:23:33 +0000732 select SYS_SUPPORTS_SMP
Thomas Bogendoerfer256ec482020-08-24 18:32:49 +0200733 select WAR_R10000_LLSC
Florian Fainelli930beb52014-01-14 09:54:38 -0800734 select MIPS_L1_CACHE_SHIFT_7
Mike Rapoport6c86a302020-08-05 15:51:41 +0300735 select NUMA
Feiyang Chenf8f9f212022-03-19 17:40:02 +0800736 select HAVE_ARCH_NODEDATA_EXTENSION
Linus Torvalds1da177e2005-04-16 15:20:36 -0700737 help
738 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
739 workstations. To compile a Linux kernel that runs on these, say Y
740 here.
741
Thomas Bogendoerfere2defae2007-12-02 13:00:32 +0100742config SGI_IP28
Kees Cook7d607172013-01-16 18:53:19 -0800743 bool "SGI IP28 (Indigo2 R10k)"
Thomas Bogendoerferc0de00b2019-10-09 15:27:17 +0200744 select ARC_MEMORY
Thomas Bogendoerfer39b2d752019-10-09 15:27:14 +0200745 select ARC_PROMLIB
Ralf Baechle0e2794b2012-11-15 20:48:50 +0100746 select FW_ARC
747 select FW_ARC64
Ralf Baechle7a407aa2018-02-05 16:40:00 +0100748 select ARCH_MIGHT_HAVE_PC_SERIO
Thomas Bogendoerfere2defae2007-12-02 13:00:32 +0100749 select BOOT_ELF64
750 select CEVT_R4K
751 select CSRC_R4K
752 select DEFAULT_SGI_PARTITION
753 select DMA_NONCOHERENT
754 select GENERIC_ISA_DMA_SUPPORT_BROKEN
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200755 select IRQ_MIPS_CPU
Christoph Hellwig6630a8e2018-11-15 20:05:37 +0100756 select HAVE_EISA
Thomas Bogendoerfere2defae2007-12-02 13:00:32 +0100757 select I8253
758 select I8259
Thomas Bogendoerfere2defae2007-12-02 13:00:32 +0100759 select SGI_HAS_I8042
760 select SGI_HAS_INDYDOG
Thomas Bogendoerfer5b438c42008-07-10 20:29:55 +0200761 select SGI_HAS_HAL2
Thomas Bogendoerfere2defae2007-12-02 13:00:32 +0100762 select SGI_HAS_SEEQ
763 select SGI_HAS_WD93
764 select SGI_HAS_ZILOG
765 select SWAP_IO_SPACE
766 select SYS_HAS_CPU_R10000
Thomas Bogendoerferc0de00b2019-10-09 15:27:17 +0200767 select SYS_HAS_EARLY_PRINTK
Thomas Bogendoerfere2defae2007-12-02 13:00:32 +0100768 select SYS_SUPPORTS_64BIT_KERNEL
769 select SYS_SUPPORTS_BIG_ENDIAN
Thomas Bogendoerfer256ec482020-08-24 18:32:49 +0200770 select WAR_R10000_LLSC
Thomas Bogendoerferdc24d68d2014-08-19 22:00:07 +0200771 select MIPS_L1_CACHE_SHIFT_7
Enrico Weigelt, metux IT consult371a4152019-03-11 16:54:27 +0100772 help
773 This is the SGI Indigo2 with R10000 processor. To compile a Linux
774 kernel that runs on these, say Y here.
Thomas Bogendoerfere2defae2007-12-02 13:00:32 +0100775
Thomas Bogendoerfer75055762019-10-24 12:18:29 +0200776config SGI_IP30
777 bool "SGI IP30 (Octane/Octane2)"
778 select ARCH_HAS_PHYS_TO_DMA
779 select FW_ARC
780 select FW_ARC64
781 select BOOT_ELF64
782 select CEVT_R4K
783 select CSRC_R4K
Christoph Hellwig04100452021-03-01 08:38:32 +0100784 select FORCE_PCI
Thomas Bogendoerfer75055762019-10-24 12:18:29 +0200785 select SYNC_R4K if SMP
786 select ZONE_DMA32
787 select HAVE_PCI
788 select IRQ_MIPS_CPU
789 select IRQ_DOMAIN_HIERARCHY
Thomas Bogendoerfer75055762019-10-24 12:18:29 +0200790 select PCI_DRIVERS_GENERIC
791 select PCI_XTALK_BRIDGE
792 select SYS_HAS_EARLY_PRINTK
793 select SYS_HAS_CPU_R10000
794 select SYS_SUPPORTS_64BIT_KERNEL
795 select SYS_SUPPORTS_BIG_ENDIAN
796 select SYS_SUPPORTS_SMP
Thomas Bogendoerfer256ec482020-08-24 18:32:49 +0200797 select WAR_R10000_LLSC
Thomas Bogendoerfer75055762019-10-24 12:18:29 +0200798 select MIPS_L1_CACHE_SHIFT_7
799 select ARC_MEMORY
800 help
801 These are the SGI Octane and Octane2 graphics workstations. To
802 compile a Linux kernel that runs on these, say Y here.
803
Linus Torvalds1da177e2005-04-16 15:20:36 -0700804config SGI_IP32
Ralf Baechlecfd2afc2007-07-10 17:33:00 +0100805 bool "SGI IP32 (O2)"
Thomas Bogendoerfer39b2d752019-10-09 15:27:14 +0200806 select ARC_MEMORY
807 select ARC_PROMLIB
Christoph Hellwig03df8222018-06-15 13:08:48 +0200808 select ARCH_HAS_PHYS_TO_DMA
Ralf Baechle0e2794b2012-11-15 20:48:50 +0100809 select FW_ARC
810 select FW_ARC32
Linus Torvalds1da177e2005-04-16 15:20:36 -0700811 select BOOT_ELF32
Ralf Baechle42f77542007-10-18 17:48:11 +0100812 select CEVT_R4K
Ralf Baechle940f6b42007-11-24 22:33:28 +0000813 select CSRC_R4K
Linus Torvalds1da177e2005-04-16 15:20:36 -0700814 select DMA_NONCOHERENT
Christoph Hellwigeb01d422018-11-15 20:05:32 +0100815 select HAVE_PCI
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200816 select IRQ_MIPS_CPU
Linus Torvalds1da177e2005-04-16 15:20:36 -0700817 select R5000_CPU_SCACHE
818 select RM7000_CPU_SCACHE
Ralf Baechle7cf80532005-10-20 22:33:09 +0100819 select SYS_HAS_CPU_R5000
820 select SYS_HAS_CPU_R10000 if BROKEN
821 select SYS_HAS_CPU_RM7000
Ralf Baechledd2f18f2006-01-19 14:55:42 +0000822 select SYS_HAS_CPU_NEVADA
Yoichi Yuasaed5ba2f2005-09-03 15:56:21 -0700823 select SYS_SUPPORTS_64BIT_KERNEL
Ralf Baechle5e83d432005-10-29 19:32:41 +0100824 select SYS_SUPPORTS_BIG_ENDIAN
Thomas Bogendoerfer886ee132020-08-24 18:32:48 +0200825 select WAR_ICACHE_REFILLS
Linus Torvalds1da177e2005-04-16 15:20:36 -0700826 help
827 If you want this kernel to run on SGI O2 workstation, say Y here.
828
Ralf Baechle5e83d432005-10-29 19:32:41 +0100829config SIBYTE_CRHONE
Martin Michlmayr3fa986f2006-05-09 23:34:53 +0200830 bool "Sibyte BCM91125C-CRhone"
Ralf Baechle5e83d432005-10-29 19:32:41 +0100831 select BOOT_ELF32
Ralf Baechle5e83d432005-10-29 19:32:41 +0100832 select SIBYTE_BCM1125
833 select SWAP_IO_SPACE
Ralf Baechle7cf80532005-10-20 22:33:09 +0100834 select SYS_HAS_CPU_SB1
Ralf Baechle5e83d432005-10-29 19:32:41 +0100835 select SYS_SUPPORTS_BIG_ENDIAN
836 select SYS_SUPPORTS_HIGHMEM
837 select SYS_SUPPORTS_LITTLE_ENDIAN
838
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900839config SIBYTE_RHONE
840 bool "Sibyte BCM91125E-Rhone"
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900841 select BOOT_ELF32
Thomas Bogendoerfer03452342023-03-15 15:21:24 +0100842 select SIBYTE_SB1250
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900843 select SWAP_IO_SPACE
844 select SYS_HAS_CPU_SB1
845 select SYS_SUPPORTS_BIG_ENDIAN
846 select SYS_SUPPORTS_LITTLE_ENDIAN
847
848config SIBYTE_SWARM
849 bool "Sibyte BCM91250A-SWARM"
850 select BOOT_ELF32
Sebastian Andrzej Siewiorfcf3ca42010-04-18 15:26:36 +0200851 select HAVE_PATA_PLATFORM
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900852 select SIBYTE_SB1250
853 select SWAP_IO_SPACE
854 select SYS_HAS_CPU_SB1
855 select SYS_SUPPORTS_BIG_ENDIAN
856 select SYS_SUPPORTS_HIGHMEM
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900857 select SYS_SUPPORTS_LITTLE_ENDIAN
Ralf Baechlecce335a2007-11-03 02:05:43 +0000858 select ZONE_DMA32 if 64BIT
Maciej W. Rozyckie4849af2018-11-13 22:42:44 +0000859 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900860
861config SIBYTE_LITTLESUR
862 bool "Sibyte BCM91250C2-LittleSur"
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900863 select BOOT_ELF32
Sebastian Andrzej Siewiorfcf3ca42010-04-18 15:26:36 +0200864 select HAVE_PATA_PLATFORM
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900865 select SIBYTE_SB1250
866 select SWAP_IO_SPACE
867 select SYS_HAS_CPU_SB1
868 select SYS_SUPPORTS_BIG_ENDIAN
869 select SYS_SUPPORTS_HIGHMEM
870 select SYS_SUPPORTS_LITTLE_ENDIAN
Maciej W. Rozycki756d6d82018-11-13 22:42:37 +0000871 select ZONE_DMA32 if 64BIT
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900872
873config SIBYTE_SENTOSA
874 bool "Sibyte BCM91250E-Sentosa"
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900875 select BOOT_ELF32
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900876 select SIBYTE_SB1250
877 select SWAP_IO_SPACE
878 select SYS_HAS_CPU_SB1
879 select SYS_SUPPORTS_BIG_ENDIAN
880 select SYS_SUPPORTS_LITTLE_ENDIAN
Maciej W. Rozyckie4849af2018-11-13 22:42:44 +0000881 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900882
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900883config SIBYTE_BIGSUR
884 bool "Sibyte BCM91480B-BigSur"
885 select BOOT_ELF32
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900886 select NR_CPUS_DEFAULT_4
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900887 select SIBYTE_BCM1x80
888 select SWAP_IO_SPACE
889 select SYS_HAS_CPU_SB1
890 select SYS_SUPPORTS_BIG_ENDIAN
Ralf Baechle651194f2007-11-01 21:55:39 +0000891 select SYS_SUPPORTS_HIGHMEM
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900892 select SYS_SUPPORTS_LITTLE_ENDIAN
Ralf Baechlecce335a2007-11-03 02:05:43 +0000893 select ZONE_DMA32 if 64BIT
Maciej W. Rozyckie4849af2018-11-13 22:42:44 +0000894 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900895
Thomas Bogendoerfer14b36af2006-12-05 17:05:44 +0100896config SNI_RM
897 bool "SNI RM200/300/400"
Thomas Bogendoerfer39b2d752019-10-09 15:27:14 +0200898 select ARC_MEMORY
899 select ARC_PROMLIB
Ralf Baechle0e2794b2012-11-15 20:48:50 +0100900 select FW_ARC if CPU_LITTLE_ENDIAN
901 select FW_ARC32 if CPU_LITTLE_ENDIAN
Paul Bolleaaa9fad2013-03-25 09:39:54 +0000902 select FW_SNIPROM if CPU_BIG_ENDIAN
Ralf Baechle5e83d432005-10-29 19:32:41 +0100903 select ARCH_MAY_HAVE_PC_FDC
Ralf Baechlea211a0822018-02-05 15:37:43 +0100904 select ARCH_MIGHT_HAVE_PC_PARPORT
Ralf Baechle7a407aa2018-02-05 16:40:00 +0100905 select ARCH_MIGHT_HAVE_PC_SERIO
Ralf Baechle5e83d432005-10-29 19:32:41 +0100906 select BOOT_ELF32
Ralf Baechle42f77542007-10-18 17:48:11 +0100907 select CEVT_R4K
Ralf Baechle940f6b42007-11-24 22:33:28 +0000908 select CSRC_R4K
Thomas Bogendoerfere2defae2007-12-02 13:00:32 +0100909 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
Ralf Baechle5e83d432005-10-29 19:32:41 +0100910 select DMA_NONCOHERENT
911 select GENERIC_ISA_DMA
Christoph Hellwig6630a8e2018-11-15 20:05:37 +0100912 select HAVE_EISA
Ralf Baechle8a118c32011-06-01 19:05:10 +0100913 select HAVE_PCSPKR_PLATFORM
Christoph Hellwigeb01d422018-11-15 20:05:32 +0100914 select HAVE_PCI
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200915 select IRQ_MIPS_CPU
Ralf Baechled865bea2007-10-11 23:46:10 +0100916 select I8253
Ralf Baechle5e83d432005-10-29 19:32:41 +0100917 select I8259
918 select ISA
Thomas Bogendoerfer564c8362020-09-14 18:05:00 +0200919 select MIPS_L1_CACHE_SHIFT_6
Thomas Bogendoerfer4a0312fc2006-06-13 13:59:01 +0200920 select SWAP_IO_SPACE if CPU_BIG_ENDIAN
Ralf Baechle7cf80532005-10-20 22:33:09 +0100921 select SYS_HAS_CPU_R4X00
Thomas Bogendoerfer4a0312fc2006-06-13 13:59:01 +0200922 select SYS_HAS_CPU_R5000
Thomas Bogendoerferc066a322006-12-28 18:22:32 +0100923 select SYS_HAS_CPU_R10000
Thomas Bogendoerfer4a0312fc2006-06-13 13:59:01 +0200924 select R5000_CPU_SCACHE
Ralf Baechle36a88532007-03-01 11:56:43 +0000925 select SYS_HAS_EARLY_PRINTK
Yoichi Yuasaed5ba2f2005-09-03 15:56:21 -0700926 select SYS_SUPPORTS_32BIT_KERNEL
Kees Cook7d607172013-01-16 18:53:19 -0800927 select SYS_SUPPORTS_64BIT_KERNEL
Thomas Bogendoerfer4a0312fc2006-06-13 13:59:01 +0200928 select SYS_SUPPORTS_BIG_ENDIAN
Ralf Baechle5e83d432005-10-29 19:32:41 +0100929 select SYS_SUPPORTS_HIGHMEM
930 select SYS_SUPPORTS_LITTLE_ENDIAN
Thomas Bogendoerfer44def342020-08-24 18:32:45 +0200931 select WAR_R4600_V2_HIT_CACHEOP
Linus Torvalds1da177e2005-04-16 15:20:36 -0700932 help
Thomas Bogendoerfer14b36af2006-12-05 17:05:44 +0100933 The SNI RM200/300/400 are MIPS-based machines manufactured by
934 Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
Ralf Baechle5e83d432005-10-29 19:32:41 +0100935 Technology and now in turn merged with Fujitsu. Say Y here to
936 support this machine type.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700937
Atsushi Nemotoedcaf1a2008-07-11 23:27:54 +0900938config MACH_TX49XX
939 bool "Toshiba TX49 series based machines"
Thomas Bogendoerfer24a1c022020-08-24 18:32:47 +0200940 select WAR_TX49XX_ICACHE_INDEX_INV
Ralf Baechle23fbee92005-07-25 22:45:45 +0000941
Ralf Baechle73b43902008-07-16 16:12:25 +0100942config MIKROTIK_RB532
943 bool "Mikrotik RB532 boards"
944 select CEVT_R4K
945 select CSRC_R4K
946 select DMA_NONCOHERENT
Christoph Hellwigeb01d422018-11-15 20:05:32 +0100947 select HAVE_PCI
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200948 select IRQ_MIPS_CPU
Ralf Baechle73b43902008-07-16 16:12:25 +0100949 select SYS_HAS_CPU_MIPS32_R1
950 select SYS_SUPPORTS_32BIT_KERNEL
951 select SYS_SUPPORTS_LITTLE_ENDIAN
952 select SWAP_IO_SPACE
953 select BOOT_RAW
Linus Walleijd30a2b42016-04-19 11:23:22 +0200954 select GPIOLIB
Florian Fainelli930beb52014-01-14 09:54:38 -0800955 select MIPS_L1_CACHE_SHIFT_4
Ralf Baechle73b43902008-07-16 16:12:25 +0100956 help
957 Support the Mikrotik(tm) RouterBoard 532 series,
958 based on the IDT RC32434 SoC.
959
David Daney9ddebc42013-05-22 15:10:46 +0000960config CAVIUM_OCTEON_SOC
961 bool "Cavium Networks Octeon SoC based boards"
David Daneya86c7f72008-12-11 15:33:38 -0800962 select CEVT_R4K
Christoph Hellwigea8c64a2018-01-10 16:21:13 +0100963 select ARCH_HAS_PHYS_TO_DMA
Christoph Hellwig1753d502018-11-15 20:05:36 +0100964 select HAVE_RAPIDIO
Christoph Hellwigd4a451d2018-04-03 16:24:20 +0200965 select PHYS_ADDR_T_64BIT
David Daneya86c7f72008-12-11 15:33:38 -0800966 select SYS_SUPPORTS_64BIT_KERNEL
967 select SYS_SUPPORTS_BIG_ENDIAN
Ralf Baechlef65aad42012-10-17 00:39:09 +0200968 select EDAC_SUPPORT
Borislav Petkovb01aec92015-05-21 19:59:31 +0200969 select EDAC_ATOMIC_SCRUB
David Daney73569d82015-03-20 19:11:58 +0300970 select SYS_SUPPORTS_LITTLE_ENDIAN
971 select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
David Daneya86c7f72008-12-11 15:33:38 -0800972 select SYS_HAS_EARLY_PRINTK
David Daney5e6833892009-02-02 11:30:59 -0800973 select SYS_HAS_CPU_CAVIUM_OCTEON
Christoph Hellwigeb01d422018-11-15 20:05:32 +0100974 select HAVE_PCI
Masahiro Yamada78bdbba2020-03-25 16:45:29 +0900975 select HAVE_PLAT_DELAY
976 select HAVE_PLAT_FW_INIT_CMDLINE
977 select HAVE_PLAT_MEMCPY
David Daneyf00e0012010-10-01 13:27:30 -0700978 select ZONE_DMA32
Linus Walleijd30a2b42016-04-19 11:23:22 +0200979 select GPIOLIB
David Daney6e511162014-05-28 23:52:05 +0200980 select USE_OF
981 select ARCH_SPARSEMEM_ENABLE
982 select SYS_SUPPORTS_SMP
David Daney7820b842017-09-28 12:34:04 -0500983 select NR_CPUS_DEFAULT_64
984 select MIPS_NR_CPU_NR_MAP_1024
Andrew Brestickere3264792014-08-21 13:04:22 -0700985 select BUILTIN_DTB
Julian Brahaf766b282021-03-26 01:34:56 -0400986 select MTD
David Daney8c1e6b12015-03-05 17:31:30 +0300987 select MTD_COMPLEX_MAPPINGS
Christoph Hellwig09230cb2018-04-24 09:00:54 +0200988 select SWIOTLB
Steven J. Hill3ff72be2016-12-13 14:25:37 -0600989 select SYS_SUPPORTS_RELOCATABLE
David Daneya86c7f72008-12-11 15:33:38 -0800990 help
991 This option supports all of the Octeon reference boards from Cavium
992 Networks. It builds a kernel that dynamically determines the Octeon
993 CPU type and supports all known board reference implementations.
994 Some of the supported boards are:
995 EBT3000
996 EBH3000
997 EBH3100
998 Thunder
999 Kodama
1000 Hikari
1001 Say Y here for most Octeon reference boards.
1002
Linus Torvalds1da177e2005-04-16 15:20:36 -07001003endchoice
1004
Masahiro Yamada9a88b332024-03-23 17:51:00 +09001005config FIT_IMAGE_FDT_EPM5
1006 bool "Include FDT for Mobileye EyeQ5 development platforms"
1007 depends on MACH_EYEQ5
1008 default n
1009 help
1010 Enable this to include the FDT for the EyeQ5 development platforms
1011 from Mobileye in the FIT kernel image.
1012 This requires u-boot on the platform.
1013
Ralf Baechlee8c7c482008-09-16 19:12:16 +02001014source "arch/mips/alchemy/Kconfig"
Sergey Ryazanov3b12308f2014-10-29 03:18:39 +04001015source "arch/mips/ath25/Kconfig"
Gabor Juhosd4a67d92011-01-04 21:28:14 +01001016source "arch/mips/ath79/Kconfig"
Hauke Mehrtensa656ffc2011-07-23 01:20:13 +02001017source "arch/mips/bcm47xx/Kconfig"
Maxime Bizone7300d02009-08-18 13:23:37 +01001018source "arch/mips/bcm63xx/Kconfig"
Kevin Cernekee8945e372014-12-25 09:49:20 -08001019source "arch/mips/bmips/Kconfig"
Paul Burtoneed0eab2016-10-05 18:18:20 +01001020source "arch/mips/generic/Kconfig"
Paul Cercueila103e9b2020-09-06 21:29:33 +02001021source "arch/mips/ingenic/Kconfig"
Ralf Baechle5e83d432005-10-29 19:32:41 +01001022source "arch/mips/jazz/Kconfig"
John Crispin8ec6d932011-03-30 09:27:48 +02001023source "arch/mips/lantiq/Kconfig"
Joshua Henderson2572f002016-01-13 18:15:39 -07001024source "arch/mips/pic32/Kconfig"
John Crispinae2b5bb2013-01-20 22:05:30 +01001025source "arch/mips/ralink/Kconfig"
Ralf Baechle29c48692005-02-07 01:27:14 +00001026source "arch/mips/sgi-ip27/Kconfig"
Ralf Baechle38b18f722005-02-03 14:28:23 +00001027source "arch/mips/sibyte/Kconfig"
Atsushi Nemoto22b1d702008-07-11 00:31:36 +09001028source "arch/mips/txx9/Kconfig"
David Daneya86c7f72008-12-11 15:33:38 -08001029source "arch/mips/cavium-octeon/Kconfig"
Jiaxun Yang71e2f4d2019-10-20 22:43:14 +08001030source "arch/mips/loongson2ef/Kconfig"
Huacai Chen30ad29b2015-04-21 10:00:35 +08001031source "arch/mips/loongson32/Kconfig"
1032source "arch/mips/loongson64/Kconfig"
Ralf Baechle38b18f722005-02-03 14:28:23 +00001033
Ralf Baechle5e83d432005-10-29 19:32:41 +01001034endmenu
1035
Akinobu Mita3c9ee7e2006-03-26 01:39:30 -08001036config GENERIC_HWEIGHT
1037 bool
1038 default y
1039
Linus Torvalds1da177e2005-04-16 15:20:36 -07001040config GENERIC_CALIBRATE_DELAY
1041 bool
1042 default y
1043
Ingo Molnarae1e9132008-11-11 09:05:16 +01001044config SCHED_OMIT_FRAME_POINTER
Atsushi Nemoto1cc89032006-04-04 13:11:45 +09001045 bool
1046 default y
1047
Linus Torvalds1da177e2005-04-16 15:20:36 -07001048#
1049# Select some configuration options automatically based on user selections.
1050#
Ralf Baechle0e2794b2012-11-15 20:48:50 +01001051config FW_ARC
Linus Torvalds1da177e2005-04-16 15:20:36 -07001052 bool
Linus Torvalds1da177e2005-04-16 15:20:36 -07001053
Ralf Baechle61ed2422005-09-15 08:52:34 +00001054config ARCH_MAY_HAVE_PC_FDC
1055 bool
1056
Marc St-Jean9267a302007-06-14 15:55:31 -06001057config BOOT_RAW
1058 bool
1059
Ralf Baechle217dd112007-11-01 01:57:55 +00001060config CEVT_BCM1480
1061 bool
1062
Yoichi Yuasa6457d9f2008-04-25 12:11:44 +09001063config CEVT_DS1287
1064 bool
1065
Yoichi Yuasa1097c6a2007-10-22 19:43:15 +09001066config CEVT_GT641XX
1067 bool
1068
Ralf Baechle42f77542007-10-18 17:48:11 +01001069config CEVT_R4K
1070 bool
1071
Ralf Baechle217dd112007-11-01 01:57:55 +00001072config CEVT_SB1250
1073 bool
1074
Atsushi Nemoto229f7732007-10-25 01:34:09 +09001075config CEVT_TXX9
1076 bool
1077
Ralf Baechle217dd112007-11-01 01:57:55 +00001078config CSRC_BCM1480
1079 bool
1080
Yoichi Yuasa42474172008-04-24 09:48:40 +09001081config CSRC_IOASIC
1082 bool
1083
Ralf Baechle940f6b42007-11-24 22:33:28 +00001084config CSRC_R4K
Serge Semin38586422020-05-21 17:07:23 +03001085 select CLOCKSOURCE_WATCHDOG if CPU_FREQ
Ralf Baechle940f6b42007-11-24 22:33:28 +00001086 bool
1087
Ralf Baechle217dd112007-11-01 01:57:55 +00001088config CSRC_SB1250
1089 bool
1090
Alex Smitha7f4df42015-10-21 09:57:44 +01001091config MIPS_CLOCK_VSYSCALL
1092 def_bool CSRC_R4K || CLKSRC_MIPS_GIC
1093
Atsushi Nemotoa9aec7f2008-04-05 00:55:41 +09001094config GPIO_TXX9
Linus Walleijd30a2b42016-04-19 11:23:22 +02001095 select GPIOLIB
Atsushi Nemotoa9aec7f2008-04-05 00:55:41 +09001096 bool
1097
Ralf Baechle0e2794b2012-11-15 20:48:50 +01001098config FW_CFE
Aurelien Jarnodf78b5c2007-09-05 08:58:26 +02001099 bool
1100
Ralf Baechle40e084a2015-07-29 22:44:53 +02001101config ARCH_SUPPORTS_UPROBES
Tiezhu Yangf5748b82023-04-11 15:17:47 +08001102 def_bool y
Ralf Baechle40e084a2015-07-29 22:44:53 +02001103
Ralf Baechle4ce588c2005-09-03 15:56:19 -07001104config DMA_NONCOHERENT
1105 bool
Christoph Hellwigdb914272019-08-26 09:22:13 +02001106 #
1107 # MIPS allows mixing "slightly different" Cacheability and Coherency
1108 # Attribute bits. It is believed that the uncached access through
1109 # KSEG1 and the implementation specific "uncached accelerated" used
1110 # by pgprot_writcombine can be mixed, and the latter sometimes provides
1111 # significant advantages.
1112 #
Jiaxun Yang6be87d62023-02-22 13:24:23 +00001113 select ARCH_HAS_SETUP_DMA_OPS
Christoph Hellwig419e2f12019-08-26 09:03:44 +02001114 select ARCH_HAS_DMA_WRITE_COMBINE
Christoph Hellwigfa7e2242020-02-21 15:55:43 -08001115 select ARCH_HAS_DMA_PREP_COHERENT
Jiaxun Yange0b7fd12023-02-22 13:24:24 +00001116 select ARCH_HAS_SYNC_DMA_FOR_CPU
Christoph Hellwigf8c55dc2018-06-15 13:08:46 +02001117 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
Christoph Hellwigfa7e2242020-02-21 15:55:43 -08001118 select ARCH_HAS_DMA_SET_UNCACHED
Christoph Hellwig34dc0ea2019-10-29 11:01:37 +01001119 select DMA_NONCOHERENT_MMAP
Christoph Hellwig34dc0ea2019-10-29 11:01:37 +01001120 select NEED_DMA_MAP_STATE
Ralf Baechle4ce588c2005-09-03 15:56:19 -07001121
Ralf Baechle36a88532007-03-01 11:56:43 +00001122config SYS_HAS_EARLY_PRINTK
Linus Torvalds1da177e2005-04-16 15:20:36 -07001123 bool
Linus Torvalds1da177e2005-04-16 15:20:36 -07001124
Ralf Baechle1b2bc752009-06-23 10:00:31 +01001125config SYS_SUPPORTS_HOTPLUG_CPU
Ralf Baechledbb74542007-08-07 14:52:17 +01001126 bool
Ralf Baechledbb74542007-08-07 14:52:17 +01001127
Linus Torvalds1da177e2005-04-16 15:20:36 -07001128config MIPS_BONITO64
1129 bool
Linus Torvalds1da177e2005-04-16 15:20:36 -07001130
1131config MIPS_MSC
1132 bool
Linus Torvalds1da177e2005-04-16 15:20:36 -07001133
Ralf Baechle39b8d522008-04-28 17:14:26 +01001134config SYNC_R4K
1135 bool
1136
Uwe Kleine-Königce816fa2014-04-07 15:39:19 -07001137config NO_IOPORT_MAP
Maciej W. Rozyckid388d682007-05-29 15:08:07 +01001138 def_bool n
1139
Markos Chandras4e0748f2014-11-13 11:25:27 +00001140config GENERIC_CSUM
Alexander Lobakin18d84e2e2020-01-22 13:58:50 +03001141 def_bool CPU_NO_LOAD_STORE_LR
Markos Chandras4e0748f2014-11-13 11:25:27 +00001142
Ralf Baechle8313da32007-08-24 16:48:30 +01001143config GENERIC_ISA_DMA
1144 bool
1145 select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
Namhyung Kima35bee82010-10-18 12:55:21 +09001146 select ISA_DMA_API
Ralf Baechle8313da32007-08-24 16:48:30 +01001147
Ralf Baechleaa414df2006-11-30 01:14:51 +00001148config GENERIC_ISA_DMA_SUPPORT_BROKEN
1149 bool
Ralf Baechle8313da32007-08-24 16:48:30 +01001150 select GENERIC_ISA_DMA
Ralf Baechleaa414df2006-11-30 01:14:51 +00001151
Masahiro Yamada78bdbba2020-03-25 16:45:29 +09001152config HAVE_PLAT_DELAY
1153 bool
1154
1155config HAVE_PLAT_FW_INIT_CMDLINE
1156 bool
1157
1158config HAVE_PLAT_MEMCPY
1159 bool
1160
Namhyung Kima35bee82010-10-18 12:55:21 +09001161config ISA_DMA_API
1162 bool
1163
Matt Redfearn8c530ea2016-03-31 10:05:39 +01001164config SYS_SUPPORTS_RELOCATABLE
1165 bool
1166 help
Enrico Weigelt, metux IT consult371a4152019-03-11 16:54:27 +01001167 Selected if the platform supports relocating the kernel.
1168 The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
1169 to allow access to command line and entropy sources.
Matt Redfearn8c530ea2016-03-31 10:05:39 +01001170
Ralf Baechle5e83d432005-10-29 19:32:41 +01001171#
Masanari Iida6b2aac42012-04-14 00:14:11 +09001172# Endianness selection. Sufficiently obscure so many users don't know what to
Ralf Baechle5e83d432005-10-29 19:32:41 +01001173# answer,so we try hard to limit the available choices. Also the use of a
1174# choice statement should be more obvious to the user.
1175#
1176choice
Masanari Iida6b2aac42012-04-14 00:14:11 +09001177 prompt "Endianness selection"
Linus Torvalds1da177e2005-04-16 15:20:36 -07001178 help
1179 Some MIPS machines can be configured for either little or big endian
Ralf Baechle5e83d432005-10-29 19:32:41 +01001180 byte order. These modes require different kernels and a different
Matt LaPlante3cb2fcc2006-11-30 05:22:59 +01001181 Linux distribution. In general there is one preferred byteorder for a
Ralf Baechle5e83d432005-10-29 19:32:41 +01001182 particular system but some systems are just as commonly used in the
David Sterba3dde6ad2007-05-09 07:12:20 +02001183 one or the other endianness.
Ralf Baechle5e83d432005-10-29 19:32:41 +01001184
1185config CPU_BIG_ENDIAN
1186 bool "Big endian"
1187 depends on SYS_SUPPORTS_BIG_ENDIAN
1188
1189config CPU_LITTLE_ENDIAN
1190 bool "Little endian"
1191 depends on SYS_SUPPORTS_LITTLE_ENDIAN
Ralf Baechle5e83d432005-10-29 19:32:41 +01001192
1193endchoice
1194
David Daney22b07632010-07-23 18:41:43 -07001195config EXPORT_UASM
1196 bool
1197
Ralf Baechle21162452007-02-09 17:08:58 +00001198config SYS_SUPPORTS_APM_EMULATION
1199 bool
1200
Ralf Baechle5e83d432005-10-29 19:32:41 +01001201config SYS_SUPPORTS_BIG_ENDIAN
1202 bool
1203
1204config SYS_SUPPORTS_LITTLE_ENDIAN
1205 bool
Linus Torvalds1da177e2005-04-16 15:20:36 -07001206
David Daneyaa1762f2012-10-17 00:48:10 +02001207config MIPS_HUGE_TLB_SUPPORT
1208 def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
1209
Atsushi Nemoto8420fd02007-08-02 23:35:53 +09001210config IRQ_TXX9
1211 bool
1212
Yoichi Yuasad5ab1a62007-09-13 23:51:26 +09001213config IRQ_GT641XX
1214 bool
1215
Yoichi Yuasa252161e2007-03-14 21:51:26 +09001216config PCI_GT64XXX_PCI0
Linus Torvalds1da177e2005-04-16 15:20:36 -07001217 bool
Linus Torvalds1da177e2005-04-16 15:20:36 -07001218
Thomas Bogendoerfera57140e2019-05-07 23:09:13 +02001219config PCI_XTALK_BRIDGE
1220 bool
1221
Marc St-Jean9267a302007-06-14 15:55:31 -06001222config NO_EXCEPT_FILL
1223 bool
1224
Markos Chandrasa7e07b12014-11-13 13:32:03 +00001225config MIPS_SPRAM
1226 bool
1227
Linus Torvalds1da177e2005-04-16 15:20:36 -07001228config SWAP_IO_SPACE
1229 bool
1230
Thomas Bogendoerfere2defae2007-12-02 13:00:32 +01001231config SGI_HAS_INDYDOG
1232 bool
1233
Thomas Bogendoerfer5b438c42008-07-10 20:29:55 +02001234config SGI_HAS_HAL2
1235 bool
1236
Thomas Bogendoerfere2defae2007-12-02 13:00:32 +01001237config SGI_HAS_SEEQ
1238 bool
1239
1240config SGI_HAS_WD93
1241 bool
1242
1243config SGI_HAS_ZILOG
1244 bool
1245
1246config SGI_HAS_I8042
1247 bool
1248
1249config DEFAULT_SGI_PARTITION
1250 bool
1251
Ralf Baechle0e2794b2012-11-15 20:48:50 +01001252config FW_ARC32
Ralf Baechle5e83d432005-10-29 19:32:41 +01001253 bool
1254
Paul Bolleaaa9fad2013-03-25 09:39:54 +00001255config FW_SNIPROM
Thomas Bogendoerfer231a35d2008-01-04 23:31:07 +01001256 bool
1257
Linus Torvalds1da177e2005-04-16 15:20:36 -07001258config BOOT_ELF32
1259 bool
Linus Torvalds1da177e2005-04-16 15:20:36 -07001260
Florian Fainelli930beb52014-01-14 09:54:38 -08001261config MIPS_L1_CACHE_SHIFT_4
1262 bool
1263
1264config MIPS_L1_CACHE_SHIFT_5
1265 bool
1266
1267config MIPS_L1_CACHE_SHIFT_6
1268 bool
1269
1270config MIPS_L1_CACHE_SHIFT_7
1271 bool
1272
Linus Torvalds1da177e2005-04-16 15:20:36 -07001273config MIPS_L1_CACHE_SHIFT
1274 int
Florian Fainellia4c02012014-01-14 09:54:39 -08001275 default "7" if MIPS_L1_CACHE_SHIFT_7
Kevin Cernekee5432eeb2014-12-25 09:49:09 -08001276 default "6" if MIPS_L1_CACHE_SHIFT_6
1277 default "5" if MIPS_L1_CACHE_SHIFT_5
1278 default "4" if MIPS_L1_CACHE_SHIFT_4
Linus Torvalds1da177e2005-04-16 15:20:36 -07001279 default "5"
1280
Thomas Bogendoerfere9422422019-10-22 18:13:15 +02001281config ARC_CMDLINE_ONLY
1282 bool
1283
Linus Torvalds1da177e2005-04-16 15:20:36 -07001284config ARC_CONSOLE
1285 bool "ARC console support"
Thomas Bogendoerfere2defae2007-12-02 13:00:32 +01001286 depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001287
1288config ARC_MEMORY
1289 bool
Linus Torvalds1da177e2005-04-16 15:20:36 -07001290
1291config ARC_PROMLIB
1292 bool
Linus Torvalds1da177e2005-04-16 15:20:36 -07001293
Ralf Baechle0e2794b2012-11-15 20:48:50 +01001294config FW_ARC64
Linus Torvalds1da177e2005-04-16 15:20:36 -07001295 bool
Linus Torvalds1da177e2005-04-16 15:20:36 -07001296
1297config BOOT_ELF64
1298 bool
Linus Torvalds1da177e2005-04-16 15:20:36 -07001299
Linus Torvalds1da177e2005-04-16 15:20:36 -07001300menu "CPU selection"
1301
1302choice
1303 prompt "CPU type"
1304 default CPU_R4X00
1305
Jiaxun Yang268a2d62019-10-20 22:43:13 +08001306config CPU_LOONGSON64
Huacai Chencaed1d12019-11-04 14:11:21 +08001307 bool "Loongson 64-bit CPU"
Jiaxun Yang268a2d62019-10-20 22:43:13 +08001308 depends on SYS_HAS_CPU_LOONGSON64
Christoph Hellwigd3bc81b2018-06-15 13:08:41 +02001309 select ARCH_HAS_PHYS_TO_DMA
Jiaxun Yang51522212020-01-13 18:15:00 +08001310 select CPU_MIPSR2
1311 select CPU_HAS_PREFETCH
Huacai Chen0e476d92014-03-21 18:44:07 +08001312 select CPU_SUPPORTS_64BIT_KERNEL
1313 select CPU_SUPPORTS_HIGHMEM
1314 select CPU_SUPPORTS_HUGEPAGES
Huacai Chen75074452019-09-21 21:50:27 +08001315 select CPU_SUPPORTS_MSA
Paolo Bonzinia6d54332024-01-04 11:00:36 -05001316 select CPU_SUPPORTS_VZ
Jiaxun Yang51522212020-01-13 18:15:00 +08001317 select CPU_DIEI_BROKEN if !LOONGSON3_ENHANCEMENT
1318 select CPU_MIPSR2_IRQ_VI
Jiaxun Yangedc03782023-11-07 11:15:19 +00001319 select DMA_NONCOHERENT
Huacai Chen0e476d92014-03-21 18:44:07 +08001320 select WEAK_ORDERING
1321 select WEAK_REORDERING_BEYOND_LLSC
Huacai Chen75074452019-09-21 21:50:27 +08001322 select MIPS_ASID_BITS_VARIABLE
Huacai Chenb2edcfc2016-03-03 09:45:09 +08001323 select MIPS_PGD_C0_CONTEXT
Huacai Chen17c99d92017-03-16 21:00:28 +08001324 select MIPS_L1_CACHE_SHIFT_6
Jackie Liu7f3b3c22021-09-13 14:19:08 +08001325 select MIPS_FP_SUPPORT
Linus Walleijd30a2b42016-04-19 11:23:22 +02001326 select GPIOLIB
Christoph Hellwig09230cb2018-04-24 09:00:54 +02001327 select SWIOTLB
Huacai Chen0e476d92014-03-21 18:44:07 +08001328 help
Juerg Haefliger31f12fd2022-05-24 10:03:11 +02001329 The Loongson GSx64(GS264/GS464/GS464E/GS464V) series of processor
1330 cores implements the MIPS64R2 instruction set with many extensions,
1331 including most 64-bit Loongson-2 (2H, 2K) and Loongson-3 (3A1000,
1332 3B1000, 3B1500, 3A2000, 3A3000 and 3A4000) processors. However, old
1333 Loongson-2E/2F is not covered here and will be removed in future.
Huacai Chen0e476d92014-03-21 18:44:07 +08001334
Wu Zhangjin3702bba2009-07-02 23:27:41 +08001335config CPU_LOONGSON2E
1336 bool "Loongson 2E"
1337 depends on SYS_HAS_CPU_LOONGSON2E
Jiaxun Yang268a2d62019-10-20 22:43:13 +08001338 select CPU_LOONGSON2EF
Fuxin Zhang2a21c732007-06-06 14:52:43 +08001339 help
1340 The Loongson 2E processor implements the MIPS III instruction set
1341 with many extensions.
1342
Lucas De Marchi25985ed2011-03-30 22:57:33 -03001343 It has an internal FPGA northbridge, which is compatible to
Wu Zhangjin6f7a2512009-11-06 18:45:05 +08001344 bonito64.
1345
1346config CPU_LOONGSON2F
1347 bool "Loongson 2F"
1348 depends on SYS_HAS_CPU_LOONGSON2F
Jiaxun Yang268a2d62019-10-20 22:43:13 +08001349 select CPU_LOONGSON2EF
Wu Zhangjin6f7a2512009-11-06 18:45:05 +08001350 help
1351 The Loongson 2F processor implements the MIPS III instruction set
1352 with many extensions.
1353
1354 Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
1355 have a similar programming interface with FPGA northbridge used in
1356 Loongson2E.
1357
Kelvin Cheungca585cf2012-07-25 16:17:24 +02001358config CPU_LOONGSON1B
1359 bool "Loongson 1B"
1360 depends on SYS_HAS_CPU_LOONGSON1B
Huacai Chenb2afb642019-11-04 14:11:20 +08001361 select CPU_LOONGSON32
Kelvin Cheung9ec88b62016-04-06 20:34:54 +08001362 select LEDS_GPIO_REGISTER
Kelvin Cheungca585cf2012-07-25 16:17:24 +02001363 help
1364 The Loongson 1B is a 32-bit SoC, which implements the MIPS32
谢致邦 (XIE Zhibang)968dc5a02017-06-01 18:41:34 +08001365 Release 1 instruction set and part of the MIPS32 Release 2
1366 instruction set.
Kelvin Cheungca585cf2012-07-25 16:17:24 +02001367
Yang Ling12e32802016-05-19 12:29:30 +08001368config CPU_LOONGSON1C
1369 bool "Loongson 1C"
1370 depends on SYS_HAS_CPU_LOONGSON1C
Huacai Chenb2afb642019-11-04 14:11:20 +08001371 select CPU_LOONGSON32
Yang Ling12e32802016-05-19 12:29:30 +08001372 select LEDS_GPIO_REGISTER
1373 help
1374 The Loongson 1C is a 32-bit SoC, which implements the MIPS32
谢致邦 (XIE Zhibang)968dc5a02017-06-01 18:41:34 +08001375 Release 1 instruction set and part of the MIPS32 Release 2
1376 instruction set.
Yang Ling12e32802016-05-19 12:29:30 +08001377
Ralf Baechle6e760c82005-07-06 12:08:11 +00001378config CPU_MIPS32_R1
1379 bool "MIPS32 Release 1"
Ralf Baechle7cf80532005-10-20 22:33:09 +01001380 depends on SYS_HAS_CPU_MIPS32_R1
Ralf Baechle6e760c82005-07-06 12:08:11 +00001381 select CPU_HAS_PREFETCH
Ralf Baechle797798c2005-08-10 15:17:11 +00001382 select CPU_SUPPORTS_32BIT_KERNEL
Ralf Baechleec28f302006-03-05 00:45:33 +00001383 select CPU_SUPPORTS_HIGHMEM
Ralf Baechle6e760c82005-07-06 12:08:11 +00001384 help
Ralf Baechle5e83d432005-10-29 19:32:41 +01001385 Choose this option to build a kernel for release 1 or later of the
Ralf Baechle1e5f1ca2005-07-12 14:51:22 +00001386 MIPS32 architecture. Most modern embedded systems with a 32-bit
1387 MIPS processor are based on a MIPS32 processor. If you know the
1388 specific type of processor in your system, choose those that one
1389 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1390 Release 2 of the MIPS32 architecture is available since several
1391 years so chances are you even have a MIPS32 Release 2 processor
1392 in which case you should choose CPU_MIPS32_R2 instead for better
1393 performance.
1394
1395config CPU_MIPS32_R2
1396 bool "MIPS32 Release 2"
Ralf Baechle7cf80532005-10-20 22:33:09 +01001397 depends on SYS_HAS_CPU_MIPS32_R2
Ralf Baechle1e5f1ca2005-07-12 14:51:22 +00001398 select CPU_HAS_PREFETCH
Ralf Baechle797798c2005-08-10 15:17:11 +00001399 select CPU_SUPPORTS_32BIT_KERNEL
Ralf Baechleec28f302006-03-05 00:45:33 +00001400 select CPU_SUPPORTS_HIGHMEM
Paul Burtona5e9a692014-01-27 15:23:10 +00001401 select CPU_SUPPORTS_MSA
Ralf Baechle1e5f1ca2005-07-12 14:51:22 +00001402 help
Ralf Baechle5e83d432005-10-29 19:32:41 +01001403 Choose this option to build a kernel for release 2 or later of the
Ralf Baechle6e760c82005-07-06 12:08:11 +00001404 MIPS32 architecture. Most modern embedded systems with a 32-bit
1405 MIPS processor are based on a MIPS32 processor. If you know the
1406 specific type of processor in your system, choose those that one
1407 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001408
Serge Seminab7c01f2020-05-21 17:07:14 +03001409config CPU_MIPS32_R5
1410 bool "MIPS32 Release 5"
1411 depends on SYS_HAS_CPU_MIPS32_R5
1412 select CPU_HAS_PREFETCH
1413 select CPU_SUPPORTS_32BIT_KERNEL
1414 select CPU_SUPPORTS_HIGHMEM
1415 select CPU_SUPPORTS_MSA
Paolo Bonzinia6d54332024-01-04 11:00:36 -05001416 select CPU_SUPPORTS_VZ
Serge Seminab7c01f2020-05-21 17:07:14 +03001417 select MIPS_O32_FP64_SUPPORT
1418 help
1419 Choose this option to build a kernel for release 5 or later of the
1420 MIPS32 architecture. New MIPS processors, starting with the Warrior
1421 family, are based on a MIPS32r5 processor. If you own an older
1422 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1423
Leonid Yegoshin7fd08ca2014-10-27 10:34:11 +00001424config CPU_MIPS32_R6
Markos Chandras674d10e2015-07-16 13:24:46 +01001425 bool "MIPS32 Release 6"
Leonid Yegoshin7fd08ca2014-10-27 10:34:11 +00001426 depends on SYS_HAS_CPU_MIPS32_R6
1427 select CPU_HAS_PREFETCH
Alexander Lobakin18d84e2e2020-01-22 13:58:50 +03001428 select CPU_NO_LOAD_STORE_LR
Leonid Yegoshin7fd08ca2014-10-27 10:34:11 +00001429 select CPU_SUPPORTS_32BIT_KERNEL
1430 select CPU_SUPPORTS_HIGHMEM
1431 select CPU_SUPPORTS_MSA
Paolo Bonzinia6d54332024-01-04 11:00:36 -05001432 select CPU_SUPPORTS_VZ
Leonid Yegoshin7fd08ca2014-10-27 10:34:11 +00001433 select MIPS_O32_FP64_SUPPORT
1434 help
1435 Choose this option to build a kernel for release 6 or later of the
1436 MIPS32 architecture. New MIPS processors, starting with the Warrior
1437 family, are based on a MIPS32r6 processor. If you own an older
1438 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1439
Ralf Baechle6e760c82005-07-06 12:08:11 +00001440config CPU_MIPS64_R1
1441 bool "MIPS64 Release 1"
Ralf Baechle7cf80532005-10-20 22:33:09 +01001442 depends on SYS_HAS_CPU_MIPS64_R1
Ralf Baechle797798c2005-08-10 15:17:11 +00001443 select CPU_HAS_PREFETCH
Yoichi Yuasaed5ba2f2005-09-03 15:56:21 -07001444 select CPU_SUPPORTS_32BIT_KERNEL
1445 select CPU_SUPPORTS_64BIT_KERNEL
Ralf Baechleec28f302006-03-05 00:45:33 +00001446 select CPU_SUPPORTS_HIGHMEM
David Daney9cffd1542009-05-27 17:47:46 -07001447 select CPU_SUPPORTS_HUGEPAGES
Ralf Baechle6e760c82005-07-06 12:08:11 +00001448 help
1449 Choose this option to build a kernel for release 1 or later of the
1450 MIPS64 architecture. Many modern embedded systems with a 64-bit
1451 MIPS processor are based on a MIPS64 processor. If you know the
1452 specific type of processor in your system, choose those that one
1453 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
Ralf Baechle1e5f1ca2005-07-12 14:51:22 +00001454 Release 2 of the MIPS64 architecture is available since several
1455 years so chances are you even have a MIPS64 Release 2 processor
1456 in which case you should choose CPU_MIPS64_R2 instead for better
1457 performance.
1458
1459config CPU_MIPS64_R2
1460 bool "MIPS64 Release 2"
Ralf Baechle7cf80532005-10-20 22:33:09 +01001461 depends on SYS_HAS_CPU_MIPS64_R2
Ralf Baechle797798c2005-08-10 15:17:11 +00001462 select CPU_HAS_PREFETCH
Ralf Baechle1e5f1ca2005-07-12 14:51:22 +00001463 select CPU_SUPPORTS_32BIT_KERNEL
1464 select CPU_SUPPORTS_64BIT_KERNEL
Ralf Baechleec28f302006-03-05 00:45:33 +00001465 select CPU_SUPPORTS_HIGHMEM
David Daney9cffd1542009-05-27 17:47:46 -07001466 select CPU_SUPPORTS_HUGEPAGES
Paul Burtona5e9a692014-01-27 15:23:10 +00001467 select CPU_SUPPORTS_MSA
Ralf Baechle1e5f1ca2005-07-12 14:51:22 +00001468 help
1469 Choose this option to build a kernel for release 2 or later of the
1470 MIPS64 architecture. Many modern embedded systems with a 64-bit
1471 MIPS processor are based on a MIPS64 processor. If you know the
1472 specific type of processor in your system, choose those that one
1473 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001474
Serge Seminab7c01f2020-05-21 17:07:14 +03001475config CPU_MIPS64_R5
1476 bool "MIPS64 Release 5"
1477 depends on SYS_HAS_CPU_MIPS64_R5
1478 select CPU_HAS_PREFETCH
1479 select CPU_SUPPORTS_32BIT_KERNEL
1480 select CPU_SUPPORTS_64BIT_KERNEL
1481 select CPU_SUPPORTS_HIGHMEM
1482 select CPU_SUPPORTS_HUGEPAGES
1483 select CPU_SUPPORTS_MSA
1484 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
Paolo Bonzinia6d54332024-01-04 11:00:36 -05001485 select CPU_SUPPORTS_VZ
Serge Seminab7c01f2020-05-21 17:07:14 +03001486 help
1487 Choose this option to build a kernel for release 5 or later of the
1488 MIPS64 architecture. This is a intermediate MIPS architecture
1489 release partly implementing release 6 features. Though there is no
1490 any hardware known to be based on this release.
1491
Leonid Yegoshin7fd08ca2014-10-27 10:34:11 +00001492config CPU_MIPS64_R6
Markos Chandras674d10e2015-07-16 13:24:46 +01001493 bool "MIPS64 Release 6"
Leonid Yegoshin7fd08ca2014-10-27 10:34:11 +00001494 depends on SYS_HAS_CPU_MIPS64_R6
1495 select CPU_HAS_PREFETCH
Alexander Lobakin18d84e2e2020-01-22 13:58:50 +03001496 select CPU_NO_LOAD_STORE_LR
Leonid Yegoshin7fd08ca2014-10-27 10:34:11 +00001497 select CPU_SUPPORTS_32BIT_KERNEL
1498 select CPU_SUPPORTS_64BIT_KERNEL
1499 select CPU_SUPPORTS_HIGHMEM
Paul Burtonafd375d2019-02-02 02:21:53 +00001500 select CPU_SUPPORTS_HUGEPAGES
Leonid Yegoshin7fd08ca2014-10-27 10:34:11 +00001501 select CPU_SUPPORTS_MSA
James Hogan2e6c7742017-02-16 12:39:01 +00001502 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
Paolo Bonzinia6d54332024-01-04 11:00:36 -05001503 select CPU_SUPPORTS_VZ
Leonid Yegoshin7fd08ca2014-10-27 10:34:11 +00001504 help
1505 Choose this option to build a kernel for release 6 or later of the
1506 MIPS64 architecture. New MIPS processors, starting with the Warrior
1507 family, are based on a MIPS64r6 processor. If you own an older
1508 processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
1509
Serge Semin281e3ae2020-05-21 17:07:15 +03001510config CPU_P5600
1511 bool "MIPS Warrior P5600"
1512 depends on SYS_HAS_CPU_P5600
1513 select CPU_HAS_PREFETCH
1514 select CPU_SUPPORTS_32BIT_KERNEL
1515 select CPU_SUPPORTS_HIGHMEM
1516 select CPU_SUPPORTS_MSA
Serge Semin281e3ae2020-05-21 17:07:15 +03001517 select CPU_SUPPORTS_CPUFREQ
Paolo Bonzinia6d54332024-01-04 11:00:36 -05001518 select CPU_SUPPORTS_VZ
Serge Semin281e3ae2020-05-21 17:07:15 +03001519 select CPU_MIPSR2_IRQ_VI
1520 select CPU_MIPSR2_IRQ_EI
Serge Semin281e3ae2020-05-21 17:07:15 +03001521 select MIPS_O32_FP64_SUPPORT
1522 help
1523 Choose this option to build a kernel for MIPS Warrior P5600 CPU.
1524 It's based on MIPS32r5 ISA with XPA, EVA, dual/quad issue exec pipes,
1525 MMU with two-levels TLB, UCA, MSA, MDU core level features and system
1526 level features like up to six P5600 calculation cores, CM2 with L2
1527 cache, IOCU/IOMMU (though might be unused depending on the system-
1528 specific IP core configuration), GIC, CPC, virtualisation module,
1529 eJTAG and PDtrace.
1530
Linus Torvalds1da177e2005-04-16 15:20:36 -07001531config CPU_R3000
1532 bool "R3000"
Ralf Baechle7cf80532005-10-20 22:33:09 +01001533 depends on SYS_HAS_CPU_R3000
Ralf Baechlef7062dd2006-04-24 14:58:53 +01001534 select CPU_HAS_WB
Paul Burton54746822019-08-31 15:40:43 +00001535 select CPU_R3K_TLB
Yoichi Yuasaed5ba2f2005-09-03 15:56:21 -07001536 select CPU_SUPPORTS_32BIT_KERNEL
Ralf Baechle797798c2005-08-10 15:17:11 +00001537 select CPU_SUPPORTS_HIGHMEM
Linus Torvalds1da177e2005-04-16 15:20:36 -07001538 help
1539 Please make sure to pick the right CPU type. Linux/MIPS is not
1540 designed to be generic, i.e. Kernels compiled for R3000 CPUs will
1541 *not* work on R4000 machines and vice versa. However, since most
1542 of the supported machines have an R4000 (or similar) CPU, R4x00
1543 might be a safe bet. If the resulting kernel does not work,
1544 try to recompile with R3000.
1545
Lauri Kasanen65ce6192021-01-13 17:10:07 +02001546config CPU_R4300
1547 bool "R4300"
1548 depends on SYS_HAS_CPU_R4300
1549 select CPU_SUPPORTS_32BIT_KERNEL
1550 select CPU_SUPPORTS_64BIT_KERNEL
Lauri Kasanen65ce6192021-01-13 17:10:07 +02001551 help
1552 MIPS Technologies R4300-series processors.
1553
Linus Torvalds1da177e2005-04-16 15:20:36 -07001554config CPU_R4X00
1555 bool "R4x00"
Ralf Baechle7cf80532005-10-20 22:33:09 +01001556 depends on SYS_HAS_CPU_R4X00
Yoichi Yuasaed5ba2f2005-09-03 15:56:21 -07001557 select CPU_SUPPORTS_32BIT_KERNEL
1558 select CPU_SUPPORTS_64BIT_KERNEL
Ralf Baechle970d0322012-10-18 13:54:15 +02001559 select CPU_SUPPORTS_HUGEPAGES
Linus Torvalds1da177e2005-04-16 15:20:36 -07001560 help
1561 MIPS Technologies R4000-series processors other than 4300, including
1562 the R4000, R4400, R4600, and 4700.
1563
1564config CPU_TX49XX
1565 bool "R49XX"
Ralf Baechle7cf80532005-10-20 22:33:09 +01001566 depends on SYS_HAS_CPU_TX49XX
Atsushi Nemotode862b42006-03-17 12:59:22 +09001567 select CPU_HAS_PREFETCH
Yoichi Yuasaed5ba2f2005-09-03 15:56:21 -07001568 select CPU_SUPPORTS_32BIT_KERNEL
1569 select CPU_SUPPORTS_64BIT_KERNEL
Ralf Baechle970d0322012-10-18 13:54:15 +02001570 select CPU_SUPPORTS_HUGEPAGES
Linus Torvalds1da177e2005-04-16 15:20:36 -07001571
1572config CPU_R5000
1573 bool "R5000"
Ralf Baechle7cf80532005-10-20 22:33:09 +01001574 depends on SYS_HAS_CPU_R5000
Yoichi Yuasaed5ba2f2005-09-03 15:56:21 -07001575 select CPU_SUPPORTS_32BIT_KERNEL
1576 select CPU_SUPPORTS_64BIT_KERNEL
Ralf Baechle970d0322012-10-18 13:54:15 +02001577 select CPU_SUPPORTS_HUGEPAGES
Linus Torvalds1da177e2005-04-16 15:20:36 -07001578 help
1579 MIPS Technologies R5000-series processors other than the Nevada.
1580
Shinya Kuribayashi542c1022008-10-24 01:27:57 +09001581config CPU_R5500
1582 bool "R5500"
1583 depends on SYS_HAS_CPU_R5500
Shinya Kuribayashi542c1022008-10-24 01:27:57 +09001584 select CPU_SUPPORTS_32BIT_KERNEL
1585 select CPU_SUPPORTS_64BIT_KERNEL
David Daney9cffd1542009-05-27 17:47:46 -07001586 select CPU_SUPPORTS_HUGEPAGES
Shinya Kuribayashi542c1022008-10-24 01:27:57 +09001587 help
1588 NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
1589 instruction set.
1590
Linus Torvalds1da177e2005-04-16 15:20:36 -07001591config CPU_NEVADA
1592 bool "RM52xx"
Ralf Baechle7cf80532005-10-20 22:33:09 +01001593 depends on SYS_HAS_CPU_NEVADA
Yoichi Yuasaed5ba2f2005-09-03 15:56:21 -07001594 select CPU_SUPPORTS_32BIT_KERNEL
1595 select CPU_SUPPORTS_64BIT_KERNEL
Ralf Baechle970d0322012-10-18 13:54:15 +02001596 select CPU_SUPPORTS_HUGEPAGES
Linus Torvalds1da177e2005-04-16 15:20:36 -07001597 help
1598 QED / PMC-Sierra RM52xx-series ("Nevada") processors.
1599
Linus Torvalds1da177e2005-04-16 15:20:36 -07001600config CPU_R10000
1601 bool "R10000"
Ralf Baechle7cf80532005-10-20 22:33:09 +01001602 depends on SYS_HAS_CPU_R10000
Ralf Baechle5e83d432005-10-29 19:32:41 +01001603 select CPU_HAS_PREFETCH
Yoichi Yuasaed5ba2f2005-09-03 15:56:21 -07001604 select CPU_SUPPORTS_32BIT_KERNEL
1605 select CPU_SUPPORTS_64BIT_KERNEL
Ralf Baechle797798c2005-08-10 15:17:11 +00001606 select CPU_SUPPORTS_HIGHMEM
Ralf Baechle970d0322012-10-18 13:54:15 +02001607 select CPU_SUPPORTS_HUGEPAGES
Linus Torvalds1da177e2005-04-16 15:20:36 -07001608 help
1609 MIPS Technologies R10000-series processors.
1610
1611config CPU_RM7000
1612 bool "RM7000"
Ralf Baechle7cf80532005-10-20 22:33:09 +01001613 depends on SYS_HAS_CPU_RM7000
Ralf Baechle5e83d432005-10-29 19:32:41 +01001614 select CPU_HAS_PREFETCH
Yoichi Yuasaed5ba2f2005-09-03 15:56:21 -07001615 select CPU_SUPPORTS_32BIT_KERNEL
1616 select CPU_SUPPORTS_64BIT_KERNEL
Ralf Baechle797798c2005-08-10 15:17:11 +00001617 select CPU_SUPPORTS_HIGHMEM
Ralf Baechle970d0322012-10-18 13:54:15 +02001618 select CPU_SUPPORTS_HUGEPAGES
Linus Torvalds1da177e2005-04-16 15:20:36 -07001619
1620config CPU_SB1
1621 bool "SB1"
Ralf Baechle7cf80532005-10-20 22:33:09 +01001622 depends on SYS_HAS_CPU_SB1
Yoichi Yuasaed5ba2f2005-09-03 15:56:21 -07001623 select CPU_SUPPORTS_32BIT_KERNEL
1624 select CPU_SUPPORTS_64BIT_KERNEL
Ralf Baechle797798c2005-08-10 15:17:11 +00001625 select CPU_SUPPORTS_HIGHMEM
Ralf Baechle970d0322012-10-18 13:54:15 +02001626 select CPU_SUPPORTS_HUGEPAGES
Ralf Baechle0004a9d2006-10-31 03:45:07 +00001627 select WEAK_ORDERING
Linus Torvalds1da177e2005-04-16 15:20:36 -07001628
David Daneya86c7f72008-12-11 15:33:38 -08001629config CPU_CAVIUM_OCTEON
1630 bool "Cavium Octeon processor"
David Daney5e6833892009-02-02 11:30:59 -08001631 depends on SYS_HAS_CPU_CAVIUM_OCTEON
David Daneya86c7f72008-12-11 15:33:38 -08001632 select CPU_HAS_PREFETCH
1633 select CPU_SUPPORTS_64BIT_KERNEL
Arnd Bergmannba89f9c2024-02-23 23:18:37 +01001634 select HAVE_PAGE_SIZE_8KB if !MIPS_VA_BITS_48
1635 select HAVE_PAGE_SIZE_32KB if !MIPS_VA_BITS_48
David Daneya86c7f72008-12-11 15:33:38 -08001636 select WEAK_ORDERING
David Daneya86c7f72008-12-11 15:33:38 -08001637 select CPU_SUPPORTS_HIGHMEM
David Daney9cffd1542009-05-27 17:47:46 -07001638 select CPU_SUPPORTS_HUGEPAGES
Ben Hutchingsdf115f32015-05-25 20:27:29 +01001639 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1640 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
Florian Fainelli930beb52014-01-14 09:54:38 -08001641 select MIPS_L1_CACHE_SHIFT_7
Paolo Bonzinia6d54332024-01-04 11:00:36 -05001642 select CPU_SUPPORTS_VZ
David Daneya86c7f72008-12-11 15:33:38 -08001643 help
1644 The Cavium Octeon processor is a highly integrated chip containing
1645 many ethernet hardware widgets for networking tasks. The processor
1646 can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
1647 Full details can be found at http://www.caviumnetworks.com.
1648
Jonas Gorskicd746242013-12-18 14:12:02 +01001649config CPU_BMIPS
1650 bool "Broadcom BMIPS"
1651 depends on SYS_HAS_CPU_BMIPS
1652 select CPU_MIPS32
Jonas Gorskife7f62c2013-12-18 14:12:05 +01001653 select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
Jonas Gorskicd746242013-12-18 14:12:02 +01001654 select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
1655 select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
1656 select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
1657 select CPU_SUPPORTS_32BIT_KERNEL
1658 select DMA_NONCOHERENT
Ralf Baechle67e38cf2015-05-26 18:20:06 +02001659 select IRQ_MIPS_CPU
Jonas Gorskicd746242013-12-18 14:12:02 +01001660 select SWAP_IO_SPACE
1661 select WEAK_ORDERING
Kevin Cernekeec1c0c462010-10-17 10:56:53 -07001662 select CPU_SUPPORTS_HIGHMEM
Jonas Gorski69aaf9c2013-12-18 14:12:04 +01001663 select CPU_HAS_PREFETCH
Markus Mayera8d709b2017-02-07 13:58:54 -08001664 select CPU_SUPPORTS_CPUFREQ
1665 select MIPS_EXTERNAL_TIMER
Florian Fainellibf8bde42021-10-20 11:48:47 -07001666 select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU
Kevin Cernekeec1c0c462010-10-17 10:56:53 -07001667 help
Jonas Gorskife7f62c2013-12-18 14:12:05 +01001668 Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
Kevin Cernekeec1c0c462010-10-17 10:56:53 -07001669
Linus Torvalds1da177e2005-04-16 15:20:36 -07001670endchoice
1671
Masahiro Yamada5033ad52024-01-28 01:23:09 +09001672config LOONGSON3_ENHANCEMENT
1673 bool "New Loongson-3 CPU Enhancements"
1674 default n
1675 depends on CPU_LOONGSON64
1676 help
1677 New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A
1678 R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
1679 FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User
1680 Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
1681 Fast TLB refill support, etc.
1682
1683 This option enable those enhancements which are not probed at run
1684 time. If you want a generic kernel to run on all Loongson 3 machines,
1685 please say 'N' here. If you want a high-performance kernel to run on
1686 new Loongson-3 machines only, please say 'Y' here.
1687
1688config CPU_LOONGSON3_WORKAROUNDS
1689 bool "Loongson-3 LLSC Workarounds"
1690 default y if SMP
1691 depends on CPU_LOONGSON64
1692 help
1693 Loongson-3 processors have the llsc issues which require workarounds.
1694 Without workarounds the system may hang unexpectedly.
1695
1696 Say Y, unless you know what you are doing.
1697
1698config CPU_LOONGSON3_CPUCFG_EMULATION
1699 bool "Emulate the CPUCFG instruction on older Loongson cores"
1700 default y
1701 depends on CPU_LOONGSON64
1702 help
1703 Loongson-3A R4 and newer have the CPUCFG instruction available for
1704 userland to query CPU capabilities, much like CPUID on x86. This
1705 option provides emulation of the instruction on older Loongson
1706 cores, back to Loongson-3A1000.
1707
1708 If unsure, please say Y.
1709
Leonid Yegoshina6e18782013-12-03 10:22:26 +00001710config CPU_MIPS32_3_5_FEATURES
1711 bool "MIPS32 Release 3.5 Features"
1712 depends on SYS_HAS_CPU_MIPS32_R3_5
Serge Semin281e3ae2020-05-21 17:07:15 +03001713 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_MIPS32_R6 || \
1714 CPU_P5600
Leonid Yegoshina6e18782013-12-03 10:22:26 +00001715 help
1716 Choose this option to build a kernel for release 2 or later of the
1717 MIPS32 architecture including features from the 3.5 release such as
1718 support for Enhanced Virtual Addressing (EVA).
1719
1720config CPU_MIPS32_3_5_EVA
1721 bool "Enhanced Virtual Addressing (EVA)"
1722 depends on CPU_MIPS32_3_5_FEATURES
1723 select EVA
1724 default y
1725 help
1726 Choose this option if you want to enable the Enhanced Virtual
1727 Addressing (EVA) on your MIPS32 core (such as proAptiv).
1728 One of its primary benefits is an increase in the maximum size
1729 of lowmem (up to 3GB). If unsure, say 'N' here.
1730
Steven J. Hillc5b36782015-02-26 18:16:38 -06001731config CPU_MIPS32_R5_FEATURES
1732 bool "MIPS32 Release 5 Features"
1733 depends on SYS_HAS_CPU_MIPS32_R5
Serge Semin281e3ae2020-05-21 17:07:15 +03001734 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_P5600
Steven J. Hillc5b36782015-02-26 18:16:38 -06001735 help
1736 Choose this option to build a kernel for release 2 or later of the
1737 MIPS32 architecture including features from release 5 such as
1738 support for Extended Physical Addressing (XPA).
1739
1740config CPU_MIPS32_R5_XPA
1741 bool "Extended Physical Addressing (XPA)"
1742 depends on CPU_MIPS32_R5_FEATURES
1743 depends on !EVA
1744 depends on !PAGE_SIZE_4KB
1745 depends on SYS_SUPPORTS_HIGHMEM
1746 select XPA
1747 select HIGHMEM
Christoph Hellwigd4a451d2018-04-03 16:24:20 +02001748 select PHYS_ADDR_T_64BIT
Steven J. Hillc5b36782015-02-26 18:16:38 -06001749 default n
1750 help
1751 Choose this option if you want to enable the Extended Physical
1752 Addressing (XPA) on your MIPS32 core (such as P5600 series). The
1753 benefit is to increase physical addressing equal to or greater
1754 than 40 bits. Note that this has the side effect of turning on
1755 64-bit addressing which in turn makes the PTEs 64-bit in size.
1756 If unsure, say 'N' here.
1757
Wu Zhangjin622844b2010-04-10 20:04:42 +08001758if CPU_LOONGSON2F
1759config CPU_NOP_WORKAROUNDS
1760 bool
1761
1762config CPU_JUMP_WORKAROUNDS
1763 bool
1764
1765config CPU_LOONGSON2F_WORKAROUNDS
1766 bool "Loongson 2F Workarounds"
1767 default y
1768 select CPU_NOP_WORKAROUNDS
1769 select CPU_JUMP_WORKAROUNDS
1770 help
1771 Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
1772 require workarounds. Without workarounds the system may hang
1773 unexpectedly. For more information please refer to the gas
1774 -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
1775
1776 Loongson 2F03 and later have fixed these issues and no workarounds
1777 are needed. The workarounds have no significant side effect on them
1778 but may decrease the performance of the system so this option should
1779 be disabled unless the kernel is intended to be run on 2F01 or 2F02
1780 systems.
1781
1782 If unsure, please say Y.
1783endif # CPU_LOONGSON2F
1784
Wu Zhangjin1b93b3c2009-10-14 18:12:16 +08001785config SYS_SUPPORTS_ZBOOT
1786 bool
1787 select HAVE_KERNEL_GZIP
1788 select HAVE_KERNEL_BZIP2
Florian Fainelli31c48672013-09-16 16:55:20 +01001789 select HAVE_KERNEL_LZ4
Wu Zhangjin1b93b3c2009-10-14 18:12:16 +08001790 select HAVE_KERNEL_LZMA
Wu Zhangjinfe1d45e02010-01-15 20:34:46 +08001791 select HAVE_KERNEL_LZO
Florian Fainelli4e23eb62013-09-11 11:51:41 +01001792 select HAVE_KERNEL_XZ
Paul Cercueila510b612020-09-01 16:26:51 +02001793 select HAVE_KERNEL_ZSTD
Wu Zhangjin1b93b3c2009-10-14 18:12:16 +08001794
1795config SYS_SUPPORTS_ZBOOT_UART16550
1796 bool
1797 select SYS_SUPPORTS_ZBOOT
1798
Alban Bedeldbb98312015-12-10 10:57:21 +01001799config SYS_SUPPORTS_ZBOOT_UART_PROM
1800 bool
1801 select SYS_SUPPORTS_ZBOOT
1802
Jiaxun Yang268a2d62019-10-20 22:43:13 +08001803config CPU_LOONGSON2EF
Wu Zhangjin3702bba2009-07-02 23:27:41 +08001804 bool
1805 select CPU_SUPPORTS_32BIT_KERNEL
1806 select CPU_SUPPORTS_64BIT_KERNEL
1807 select CPU_SUPPORTS_HIGHMEM
Ralf Baechle970d0322012-10-18 13:54:15 +02001808 select CPU_SUPPORTS_HUGEPAGES
Wu Zhangjin3702bba2009-07-02 23:27:41 +08001809
Huacai Chenb2afb642019-11-04 14:11:20 +08001810config CPU_LOONGSON32
Kelvin Cheungca585cf2012-07-25 16:17:24 +02001811 bool
1812 select CPU_MIPS32
Jiaxun Yang7e280f62019-01-22 21:04:12 +08001813 select CPU_MIPSR2
Kelvin Cheungca585cf2012-07-25 16:17:24 +02001814 select CPU_HAS_PREFETCH
1815 select CPU_SUPPORTS_32BIT_KERNEL
1816 select CPU_SUPPORTS_HIGHMEM
Kelvin Cheungf29ad102014-10-10 11:40:01 +08001817 select CPU_SUPPORTS_CPUFREQ
Kelvin Cheungca585cf2012-07-25 16:17:24 +02001818
Jonas Gorskife7f62c2013-12-18 14:12:05 +01001819config CPU_BMIPS32_3300
Jonas Gorski04fa8bf2013-12-18 14:12:06 +01001820 select SMP_UP if SMP
Kevin Cernekee1bbb6c12011-11-10 22:30:24 -08001821 bool
Jonas Gorskicd746242013-12-18 14:12:02 +01001822
1823config CPU_BMIPS4350
1824 bool
1825 select SYS_SUPPORTS_SMP
1826 select SYS_SUPPORTS_HOTPLUG_CPU
1827
1828config CPU_BMIPS4380
1829 bool
Kevin Cernekeebbf2ba62014-10-20 21:27:58 -07001830 select MIPS_L1_CACHE_SHIFT_6
Jonas Gorskicd746242013-12-18 14:12:02 +01001831 select SYS_SUPPORTS_SMP
1832 select SYS_SUPPORTS_HOTPLUG_CPU
Florian Fainellib4720802016-02-09 12:55:53 -08001833 select CPU_HAS_RIXI
Jonas Gorskicd746242013-12-18 14:12:02 +01001834
1835config CPU_BMIPS5000
1836 bool
Jonas Gorskicd746242013-12-18 14:12:02 +01001837 select MIPS_CPU_SCACHE
Kevin Cernekeebbf2ba62014-10-20 21:27:58 -07001838 select MIPS_L1_CACHE_SHIFT_7
Jonas Gorskicd746242013-12-18 14:12:02 +01001839 select SYS_SUPPORTS_SMP
1840 select SYS_SUPPORTS_HOTPLUG_CPU
Florian Fainellib4720802016-02-09 12:55:53 -08001841 select CPU_HAS_RIXI
Kevin Cernekee1bbb6c12011-11-10 22:30:24 -08001842
Jiaxun Yang268a2d62019-10-20 22:43:13 +08001843config SYS_HAS_CPU_LOONGSON64
Huacai Chen0e476d92014-03-21 18:44:07 +08001844 bool
1845 select CPU_SUPPORTS_CPUFREQ
Huacai Chenb2edcfc2016-03-03 09:45:09 +08001846 select CPU_HAS_RIXI
Huacai Chen0e476d92014-03-21 18:44:07 +08001847
Wu Zhangjin3702bba2009-07-02 23:27:41 +08001848config SYS_HAS_CPU_LOONGSON2E
Fuxin Zhang2a21c732007-06-06 14:52:43 +08001849 bool
1850
Wu Zhangjin6f7a2512009-11-06 18:45:05 +08001851config SYS_HAS_CPU_LOONGSON2F
1852 bool
Wu Zhangjin55045ff2009-11-11 13:39:12 +08001853 select CPU_SUPPORTS_CPUFREQ
1854 select CPU_SUPPORTS_ADDRWINCFG if 64BIT
Wu Zhangjin6f7a2512009-11-06 18:45:05 +08001855
Kelvin Cheungca585cf2012-07-25 16:17:24 +02001856config SYS_HAS_CPU_LOONGSON1B
1857 bool
1858
Yang Ling12e32802016-05-19 12:29:30 +08001859config SYS_HAS_CPU_LOONGSON1C
1860 bool
1861
Ralf Baechle7cf80532005-10-20 22:33:09 +01001862config SYS_HAS_CPU_MIPS32_R1
1863 bool
1864
1865config SYS_HAS_CPU_MIPS32_R2
1866 bool
1867
Leonid Yegoshina6e18782013-12-03 10:22:26 +00001868config SYS_HAS_CPU_MIPS32_R3_5
1869 bool
1870
Steven J. Hillc5b36782015-02-26 18:16:38 -06001871config SYS_HAS_CPU_MIPS32_R5
1872 bool
1873
Leonid Yegoshin7fd08ca2014-10-27 10:34:11 +00001874config SYS_HAS_CPU_MIPS32_R6
1875 bool
1876
Ralf Baechle7cf80532005-10-20 22:33:09 +01001877config SYS_HAS_CPU_MIPS64_R1
1878 bool
1879
1880config SYS_HAS_CPU_MIPS64_R2
1881 bool
1882
Lukas Bulwahnfd4eb902021-12-13 12:16:35 +01001883config SYS_HAS_CPU_MIPS64_R5
1884 bool
Lukas Bulwahnfd4eb902021-12-13 12:16:35 +01001885
Leonid Yegoshin7fd08ca2014-10-27 10:34:11 +00001886config SYS_HAS_CPU_MIPS64_R6
1887 bool
1888
Serge Semin281e3ae2020-05-21 17:07:15 +03001889config SYS_HAS_CPU_P5600
1890 bool
Serge Semin281e3ae2020-05-21 17:07:15 +03001891
Ralf Baechle7cf80532005-10-20 22:33:09 +01001892config SYS_HAS_CPU_R3000
1893 bool
1894
Lauri Kasanen65ce6192021-01-13 17:10:07 +02001895config SYS_HAS_CPU_R4300
1896 bool
1897
Ralf Baechle7cf80532005-10-20 22:33:09 +01001898config SYS_HAS_CPU_R4X00
1899 bool
1900
1901config SYS_HAS_CPU_TX49XX
1902 bool
1903
1904config SYS_HAS_CPU_R5000
1905 bool
1906
Shinya Kuribayashi542c1022008-10-24 01:27:57 +09001907config SYS_HAS_CPU_R5500
1908 bool
1909
Ralf Baechle7cf80532005-10-20 22:33:09 +01001910config SYS_HAS_CPU_NEVADA
1911 bool
1912
Ralf Baechle7cf80532005-10-20 22:33:09 +01001913config SYS_HAS_CPU_R10000
1914 bool
1915
1916config SYS_HAS_CPU_RM7000
1917 bool
1918
Ralf Baechle7cf80532005-10-20 22:33:09 +01001919config SYS_HAS_CPU_SB1
1920 bool
1921
David Daney5e6833892009-02-02 11:30:59 -08001922config SYS_HAS_CPU_CAVIUM_OCTEON
1923 bool
1924
Jonas Gorskicd746242013-12-18 14:12:02 +01001925config SYS_HAS_CPU_BMIPS
Kevin Cernekeec1c0c462010-10-17 10:56:53 -07001926 bool
1927
Jonas Gorskife7f62c2013-12-18 14:12:05 +01001928config SYS_HAS_CPU_BMIPS32_3300
Kevin Cernekeec1c0c462010-10-17 10:56:53 -07001929 bool
Jonas Gorskicd746242013-12-18 14:12:02 +01001930 select SYS_HAS_CPU_BMIPS
Kevin Cernekeec1c0c462010-10-17 10:56:53 -07001931
1932config SYS_HAS_CPU_BMIPS4350
1933 bool
Jonas Gorskicd746242013-12-18 14:12:02 +01001934 select SYS_HAS_CPU_BMIPS
Kevin Cernekeec1c0c462010-10-17 10:56:53 -07001935
1936config SYS_HAS_CPU_BMIPS4380
1937 bool
Jonas Gorskicd746242013-12-18 14:12:02 +01001938 select SYS_HAS_CPU_BMIPS
Kevin Cernekeec1c0c462010-10-17 10:56:53 -07001939
1940config SYS_HAS_CPU_BMIPS5000
1941 bool
Jonas Gorskicd746242013-12-18 14:12:02 +01001942 select SYS_HAS_CPU_BMIPS
Kevin Cernekeec1c0c462010-10-17 10:56:53 -07001943
Ralf Baechle17099b12007-07-14 13:24:05 +01001944#
1945# CPU may reorder R->R, R->W, W->R, W->W
1946# Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
1947#
Ralf Baechle0004a9d2006-10-31 03:45:07 +00001948config WEAK_ORDERING
1949 bool
Ralf Baechle17099b12007-07-14 13:24:05 +01001950
1951#
1952# CPU may reorder reads and writes beyond LL/SC
1953# CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
1954#
1955config WEAK_REORDERING_BEYOND_LLSC
1956 bool
Ralf Baechle5e83d432005-10-29 19:32:41 +01001957endmenu
1958
1959#
Chris Dearmanc09b47d2006-06-20 17:15:20 +01001960# These two indicate any level of the MIPS32 and MIPS64 architecture
Ralf Baechle5e83d432005-10-29 19:32:41 +01001961#
1962config CPU_MIPS32
1963 bool
Serge Seminab7c01f2020-05-21 17:07:14 +03001964 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R5 || \
Serge Semin281e3ae2020-05-21 17:07:15 +03001965 CPU_MIPS32_R6 || CPU_P5600
Ralf Baechle5e83d432005-10-29 19:32:41 +01001966
1967config CPU_MIPS64
1968 bool
Serge Seminab7c01f2020-05-21 17:07:14 +03001969 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R5 || \
Jason A. Donenfeld5a4fa442021-02-28 00:02:36 +01001970 CPU_MIPS64_R6 || CPU_LOONGSON64 || CPU_CAVIUM_OCTEON
Ralf Baechle5e83d432005-10-29 19:32:41 +01001971
1972#
Paul Burton57eeaced2018-11-08 23:44:55 +00001973# These indicate the revision of the architecture
Ralf Baechle5e83d432005-10-29 19:32:41 +01001974#
1975config CPU_MIPSR1
1976 bool
1977 default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
1978
1979config CPU_MIPSR2
1980 bool
David Daneya86c7f72008-12-11 15:33:38 -08001981 default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
Florian Fainelli8256b172016-02-09 12:55:51 -08001982 select CPU_HAS_RIXI
Jiaxun Yangba9196d2020-01-13 18:14:59 +08001983 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
Markos Chandrasa7e07b12014-11-13 13:32:03 +00001984 select MIPS_SPRAM
Ralf Baechle5e83d432005-10-29 19:32:41 +01001985
Serge Seminab7c01f2020-05-21 17:07:14 +03001986config CPU_MIPSR5
1987 bool
Serge Semin281e3ae2020-05-21 17:07:15 +03001988 default y if CPU_MIPS32_R5 || CPU_MIPS64_R5 || CPU_P5600
Serge Seminab7c01f2020-05-21 17:07:14 +03001989 select CPU_HAS_RIXI
1990 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
1991 select MIPS_SPRAM
1992
Leonid Yegoshin7fd08ca2014-10-27 10:34:11 +00001993config CPU_MIPSR6
1994 bool
1995 default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
Florian Fainelli8256b172016-02-09 12:55:51 -08001996 select CPU_HAS_RIXI
Jiaxun Yangba9196d2020-01-13 18:14:59 +08001997 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
Paul Burton87321fd2016-05-06 13:35:03 +01001998 select HAVE_ARCH_BITREVERSE
Paul Burton2db003a2016-05-06 14:36:24 +01001999 select MIPS_ASID_BITS_VARIABLE
Marcin Nowakowski4a5dc51e2018-02-09 22:11:06 +00002000 select MIPS_CRC_SUPPORT
Markos Chandrasa7e07b12014-11-13 13:32:03 +00002001 select MIPS_SPRAM
Ralf Baechle5e83d432005-10-29 19:32:41 +01002002
Paul Burton57eeaced2018-11-08 23:44:55 +00002003config TARGET_ISA_REV
2004 int
2005 default 1 if CPU_MIPSR1
2006 default 2 if CPU_MIPSR2
Serge Seminab7c01f2020-05-21 17:07:14 +03002007 default 5 if CPU_MIPSR5
Paul Burton57eeaced2018-11-08 23:44:55 +00002008 default 6 if CPU_MIPSR6
2009 default 0
2010 help
2011 Reflects the ISA revision being targeted by the kernel build. This
2012 is effectively the Kconfig equivalent of MIPS_ISA_REV.
2013
Leonid Yegoshina6e18782013-12-03 10:22:26 +00002014config EVA
2015 bool
2016
Steven J. Hillc5b36782015-02-26 18:16:38 -06002017config XPA
2018 bool
2019
Ralf Baechle5e83d432005-10-29 19:32:41 +01002020config SYS_SUPPORTS_32BIT_KERNEL
2021 bool
2022config SYS_SUPPORTS_64BIT_KERNEL
2023 bool
2024config CPU_SUPPORTS_32BIT_KERNEL
2025 bool
2026config CPU_SUPPORTS_64BIT_KERNEL
2027 bool
Wu Zhangjin55045ff2009-11-11 13:39:12 +08002028config CPU_SUPPORTS_CPUFREQ
2029 bool
2030config CPU_SUPPORTS_ADDRWINCFG
2031 bool
David Daney9cffd1542009-05-27 17:47:46 -07002032config CPU_SUPPORTS_HUGEPAGES
2033 bool
Lukas Bulwahna670c82d2021-12-13 12:16:42 +01002034 depends on !(32BIT && (PHYS_ADDR_T_64BIT || EVA))
Paolo Bonzinia6d54332024-01-04 11:00:36 -05002035config CPU_SUPPORTS_VZ
2036 bool
David Daney82622282009-10-14 12:16:56 -07002037config MIPS_PGD_C0_CONTEXT
2038 bool
Huang Peic6972fb2021-03-13 09:39:27 +08002039 depends on 64BIT
Thomas Bogendoerfer95b8a5e2021-10-20 14:49:13 +02002040 default y if (CPU_MIPSR2 || CPU_MIPSR6)
Ralf Baechle5e83d432005-10-29 19:32:41 +01002041
David Daney8192c9e2008-09-23 00:04:26 -07002042#
2043# Set to y for ptrace access to watch registers.
2044#
2045config HARDWARE_WATCHPOINTS
Enrico Weigelt, metux IT consult371a4152019-03-11 16:54:27 +01002046 bool
2047 default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
David Daney8192c9e2008-09-23 00:04:26 -07002048
Ralf Baechle5e83d432005-10-29 19:32:41 +01002049menu "Kernel type"
2050
2051choice
Ralf Baechle5e83d432005-10-29 19:32:41 +01002052 prompt "Kernel code model"
2053 help
2054 You should only select this option if you have a workload that
2055 actually benefits from 64-bit processing or if your machine has
2056 large memory. You will only be presented a single option in this
2057 menu if your system does not support both 32-bit and 64-bit kernels.
2058
2059config 32BIT
2060 bool "32-bit kernel"
2061 depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
2062 select TRAD_SIGNALS
2063 help
2064 Select this option if you want to build a 32-bit kernel.
Ralf Baechlef17c4ca2015-07-23 12:02:09 +02002065
Ralf Baechle5e83d432005-10-29 19:32:41 +01002066config 64BIT
2067 bool "64-bit kernel"
2068 depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
2069 help
2070 Select this option if you want to build a 64-bit kernel.
2071
2072endchoice
2073
Leonid Yegoshin1e321fa2015-05-14 18:34:43 -07002074config MIPS_VA_BITS_48
2075 bool "48 bits virtual memory"
2076 depends on 64BIT
2077 help
Alex Belits3377e222017-02-16 17:27:34 -08002078 Support a maximum at least 48 bits of application virtual
2079 memory. Default is 40 bits or less, depending on the CPU.
2080 For page sizes 16k and above, this option results in a small
2081 memory overhead for page tables. For 4k page size, a fourth
2082 level of page tables is added which imposes both a memory
2083 overhead as well as slower TLB fault handling.
2084
Leonid Yegoshin1e321fa2015-05-14 18:34:43 -07002085 If unsure, say N.
2086
YunQiang Su79876cc2021-12-22 13:43:46 +00002087config ZBOOT_LOAD_ADDRESS
2088 hex "Compressed kernel load address"
2089 default 0xffffffff80400000 if BCM47XX
2090 default 0x0
2091 depends on SYS_SUPPORTS_ZBOOT
2092 help
2093 The address to load compressed kernel, aka vmlinuz.
2094
2095 This is only used if non-zero.
2096
Zi Yan01924452022-08-15 10:39:59 -04002097config ARCH_FORCE_MAX_ORDER
David Daneyc9bace72010-10-11 14:52:45 -07002098 int "Maximum zone order"
Kirill A. Shutemov23baf832023-03-15 14:31:33 +03002099 default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
Kirill A. Shutemov23baf832023-03-15 14:31:33 +03002100 default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
Kirill A. Shutemov23baf832023-03-15 14:31:33 +03002101 default "11" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
Kirill A. Shutemov23baf832023-03-15 14:31:33 +03002102 default "10"
David Daneyc9bace72010-10-11 14:52:45 -07002103 help
2104 The kernel memory allocator divides physically contiguous memory
2105 blocks into "zones", where each zone is a power of two number of
2106 pages. This option selects the largest power of two that the kernel
2107 keeps in the memory allocator. If you need to allocate very large
2108 blocks of physically contiguous memory, then you may need to
2109 increase this value.
2110
David Daneyc9bace72010-10-11 14:52:45 -07002111 The page size is not necessarily 4KB. Keep this in mind
2112 when choosing a value for this option.
2113
Linus Torvalds1da177e2005-04-16 15:20:36 -07002114config BOARD_SCACHE
2115 bool
2116
2117config IP22_CPU_SCACHE
2118 bool
2119 select BOARD_SCACHE
2120
Chris Dearman9318c512006-06-20 17:15:20 +01002121#
2122# Support for a MIPS32 / MIPS64 style S-caches
2123#
2124config MIPS_CPU_SCACHE
2125 bool
2126 select BOARD_SCACHE
2127
Linus Torvalds1da177e2005-04-16 15:20:36 -07002128config R5000_CPU_SCACHE
2129 bool
2130 select BOARD_SCACHE
2131
2132config RM7000_CPU_SCACHE
2133 bool
2134 select BOARD_SCACHE
2135
2136config SIBYTE_DMA_PAGEOPS
2137 bool "Use DMA to clear/copy pages"
2138 depends on CPU_SB1
2139 help
2140 Instead of using the CPU to zero and copy pages, use a Data Mover
2141 channel. These DMA channels are otherwise unused by the standard
2142 SiByte Linux port. Seems to give a small performance benefit.
2143
2144config CPU_HAS_PREFETCH
Ralf Baechlec8094b52005-08-05 14:28:54 +00002145 bool
Linus Torvalds1da177e2005-04-16 15:20:36 -07002146
Florian Fainelli3165c842012-01-31 18:18:43 +01002147config CPU_GENERIC_DUMP_TLB
2148 bool
Thomas Bogendoerfer455481f2022-02-22 10:04:28 +01002149 default y if !CPU_R3000
Florian Fainelli3165c842012-01-31 18:18:43 +01002150
Paul Burtonc92e47e2018-11-07 23:14:02 +00002151config MIPS_FP_SUPPORT
Paul Burton183b40f2018-11-07 23:14:11 +00002152 bool "Floating Point support" if EXPERT
2153 default y
2154 help
2155 Select y to include support for floating point in the kernel
2156 including initialization of FPU hardware, FP context save & restore
2157 and emulation of an FPU where necessary. Without this support any
2158 userland program attempting to use floating point instructions will
2159 receive a SIGILL.
2160
2161 If you know that your userland will not attempt to use floating point
2162 instructions then you can say n here to shrink the kernel a little.
2163
2164 If unsure, say y.
Paul Burtonc92e47e2018-11-07 23:14:02 +00002165
Paul Burton97f7dcb2018-11-07 23:14:02 +00002166config CPU_R2300_FPU
2167 bool
Paul Burtonc92e47e2018-11-07 23:14:02 +00002168 depends on MIPS_FP_SUPPORT
Thomas Bogendoerfer455481f2022-02-22 10:04:28 +01002169 default y if CPU_R3000
Paul Burton97f7dcb2018-11-07 23:14:02 +00002170
Paul Burton54746822019-08-31 15:40:43 +00002171config CPU_R3K_TLB
2172 bool
2173
Florian Fainelli91405eb2012-01-31 18:18:44 +01002174config CPU_R4K_FPU
2175 bool
Paul Burtonc92e47e2018-11-07 23:14:02 +00002176 depends on MIPS_FP_SUPPORT
Paul Burton97f7dcb2018-11-07 23:14:02 +00002177 default y if !CPU_R2300_FPU
Florian Fainelli91405eb2012-01-31 18:18:44 +01002178
Florian Fainelli62cedc42012-01-31 18:18:45 +01002179config CPU_R4K_CACHE_TLB
2180 bool
Paul Burton54746822019-08-31 15:40:43 +00002181 default y if !(CPU_R3K_TLB || CPU_SB1 || CPU_CAVIUM_OCTEON)
Florian Fainelli62cedc42012-01-31 18:18:45 +01002182
Ralf Baechle59d6ab82006-10-06 17:36:20 +01002183config MIPS_MT_SMP
Markos Chandrasa92b7f82014-04-08 11:59:10 +01002184 bool "MIPS MT SMP support (1 TC on each available VPE)"
Paul Burton5cbf9682017-08-07 16:01:16 -07002185 default y
Jiaxun Yang74efdda2024-02-02 18:21:45 +00002186 depends on TARGET_ISA_REV > 0 && TARGET_ISA_REV < 6
2187 depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MICROMIPS
Ralf Baechle59d6ab82006-10-06 17:36:20 +01002188 select CPU_MIPSR2_IRQ_VI
Chris Dearmand725cf32007-05-08 14:05:39 +01002189 select CPU_MIPSR2_IRQ_EI
Steven J. Hillc080faa2013-10-04 16:23:28 -05002190 select SYNC_R4K
Ralf Baechle59d6ab82006-10-06 17:36:20 +01002191 select MIPS_MT
2192 select SMP
Ralf Baechle87353d82007-11-19 12:23:51 +00002193 select SMP_UP
Steven J. Hillc080faa2013-10-04 16:23:28 -05002194 select SYS_SUPPORTS_SMP
2195 select SYS_SUPPORTS_SCHED_SMT
Al Cooper399aaa22012-07-13 16:44:53 -04002196 select MIPS_PERF_SHARED_TC_COUNTERS
Ralf Baechle59d6ab82006-10-06 17:36:20 +01002197 help
Steven J. Hillc080faa2013-10-04 16:23:28 -05002198 This is a kernel model which is known as SMVP. This is supported
2199 on cores with the MT ASE and uses the available VPEs to implement
2200 virtual processors which supports SMP. This is equivalent to the
2201 Intel Hyperthreading feature. For further information go to
2202 <http://www.imgtec.com/mips/mips-multithreading.asp>.
Ralf Baechle59d6ab82006-10-06 17:36:20 +01002203
Ralf Baechlef41ae0b2006-06-05 17:24:46 +01002204config MIPS_MT
2205 bool
2206
Ralf Baechle0ab7aef2007-03-02 20:42:04 +00002207config SCHED_SMT
2208 bool "SMT (multithreading) scheduler support"
2209 depends on SYS_SUPPORTS_SCHED_SMT
2210 default n
2211 help
2212 SMT scheduler support improves the CPU scheduler's decision making
2213 when dealing with MIPS MT enabled cores at a cost of slightly
2214 increased overhead in some places. If unsure say N here.
2215
2216config SYS_SUPPORTS_SCHED_SMT
2217 bool
2218
Ralf Baechlef41ae0b2006-06-05 17:24:46 +01002219config SYS_SUPPORTS_MULTITHREADING
2220 bool
2221
Ralf Baechlef088fc82006-04-05 09:45:47 +01002222config MIPS_MT_FPAFF
2223 bool "Dynamic FPU affinity for FP-intensive threads"
Ralf Baechlef088fc82006-04-05 09:45:47 +01002224 default y
Ralf Baechleb6336482014-05-23 16:29:44 +02002225 depends on MIPS_MT_SMP
Ralf Baechle07cc0c92007-07-27 19:31:10 +01002226
Leonid Yegoshinb0a668f2014-12-03 15:47:03 +00002227config MIPSR2_TO_R6_EMULATOR
2228 bool "MIPS R2-to-R6 emulator"
Paul Burton9eaa9a82016-10-17 15:34:37 +01002229 depends on CPU_MIPSR6
Paul Burtonc92e47e2018-11-07 23:14:02 +00002230 depends on MIPS_FP_SUPPORT
Leonid Yegoshinb0a668f2014-12-03 15:47:03 +00002231 default y
2232 help
2233 Choose this option if you want to run non-R6 MIPS userland code.
2234 Even if you say 'Y' here, the emulator will still be disabled by
Markos Chandras07edf0d2015-03-10 12:30:56 +00002235 default. You can enable it using the 'mipsr2emu' kernel option.
Leonid Yegoshinb0a668f2014-12-03 15:47:03 +00002236 The only reason this is a build-time option is to save ~14K from the
2237 final kernel image.
Leonid Yegoshinb0a668f2014-12-03 15:47:03 +00002238
James Hoganf35764e2018-01-15 20:54:35 +00002239config SYS_SUPPORTS_VPE_LOADER
2240 bool
2241 depends on SYS_SUPPORTS_MULTITHREADING
2242 help
2243 Indicates that the platform supports the VPE loader, and provides
2244 physical_memsize.
2245
Ralf Baechle07cc0c92007-07-27 19:31:10 +01002246config MIPS_VPE_LOADER
2247 bool "VPE loader support."
James Hoganf35764e2018-01-15 20:54:35 +00002248 depends on SYS_SUPPORTS_VPE_LOADER && MODULES
Ralf Baechle07cc0c92007-07-27 19:31:10 +01002249 select CPU_MIPSR2_IRQ_VI
2250 select CPU_MIPSR2_IRQ_EI
Ralf Baechle07cc0c92007-07-27 19:31:10 +01002251 select MIPS_MT
2252 help
2253 Includes a loader for loading an elf relocatable object
2254 onto another VPE and running it.
Ralf Baechlef088fc82006-04-05 09:45:47 +01002255
Deng-Cheng Zhu1a2a6d72013-10-30 15:52:06 -05002256config MIPS_VPE_LOADER_MT
2257 bool
2258 default "y"
Thomas Bogendoerfer7fb6f7b2023-04-05 20:51:27 +02002259 depends on MIPS_VPE_LOADER
Deng-Cheng Zhu1a2a6d72013-10-30 15:52:06 -05002260
Ralf Baechlee01402b2005-07-14 15:57:16 +00002261config MIPS_VPE_LOADER_TOM
2262 bool "Load VPE program into memory hidden from linux"
2263 depends on MIPS_VPE_LOADER
2264 default y
2265 help
2266 The loader can use memory that is present but has been hidden from
2267 Linux using the kernel command line option "mem=xxMB". It's up to
2268 you to ensure the amount you put in the option and the space your
2269 program requires is less or equal to the amount physically present.
2270
Ralf Baechlee01402b2005-07-14 15:57:16 +00002271config MIPS_VPE_APSP_API
Ralf Baechle5e83d432005-10-29 19:32:41 +01002272 bool "Enable support for AP/SP API (RTLX)"
2273 depends on MIPS_VPE_LOADER
Ralf Baechlee01402b2005-07-14 15:57:16 +00002274
Deng-Cheng Zhu2c973ef2014-01-01 16:26:46 +01002275config MIPS_VPE_APSP_API_MT
2276 bool
2277 default "y"
Thomas Bogendoerfer7fb6f7b2023-04-05 20:51:27 +02002278 depends on MIPS_VPE_APSP_API
Paul Burton5cac93b2014-01-15 10:32:00 +00002279
Paul Burton0ee958e2014-01-15 10:31:53 +00002280config MIPS_CPS
2281 bool "MIPS Coherent Processing System support"
Paul Burton5a3e7c02016-02-03 03:15:33 +00002282 depends on SYS_SUPPORTS_MIPS_CPS
Paul Burton0ee958e2014-01-15 10:31:53 +00002283 select MIPS_CM
Paul Burton1d8f1f52014-04-14 14:13:57 +01002284 select MIPS_CPS_PM if HOTPLUG_CPU
Paul Burton0ee958e2014-01-15 10:31:53 +00002285 select SMP
Thomas Gleixnerc8d2bcc2023-05-12 23:07:37 +02002286 select HOTPLUG_CORE_SYNC_DEAD if HOTPLUG_CPU
Paul Burton0ee958e2014-01-15 10:31:53 +00002287 select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
Paul Burton1d8f1f52014-04-14 14:13:57 +01002288 select SYS_SUPPORTS_HOTPLUG_CPU
Paul Burtonc8b77122017-06-02 14:48:52 -07002289 select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6
Paul Burton0ee958e2014-01-15 10:31:53 +00002290 select SYS_SUPPORTS_SMP
2291 select WEAK_ORDERING
Wei Lid8d32762020-12-03 14:54:43 +08002292 select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU
Paul Burton0ee958e2014-01-15 10:31:53 +00002293 help
2294 Select this if you wish to run an SMP kernel across multiple cores
2295 within a MIPS Coherent Processing System. When this option is
2296 enabled the kernel will probe for other cores and boot them with
2297 no external assistance. It is safe to enable this when hardware
2298 support is unavailable.
2299
Paul Burton3179d372014-04-14 11:00:56 +01002300config MIPS_CPS_PM
Markos Chandras39a59592014-09-18 16:09:49 +01002301 depends on MIPS_CPS
Paul Burton3179d372014-04-14 11:00:56 +01002302 bool
2303
Paul Burton9f98f3d2014-01-15 10:31:51 +00002304config MIPS_CM
2305 bool
Paul Burton3c9b4162017-08-12 19:49:42 -07002306 select MIPS_CPC
Paul Burton9f98f3d2014-01-15 10:31:51 +00002307
Paul Burton9c38cf42014-01-15 10:31:52 +00002308config MIPS_CPC
2309 bool
Ralf Baechle4a16ff42008-10-04 00:06:29 +01002310
Linus Torvalds1da177e2005-04-16 15:20:36 -07002311config SB1_PASS_2_WORKAROUNDS
2312 bool
2313 depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
2314 default y
2315
2316config SB1_PASS_2_1_WORKAROUNDS
2317 bool
2318 depends on CPU_SB1 && CPU_SB1_PASS_2
2319 default y
2320
Markos Chandras9e2b5372014-07-21 08:46:14 +01002321choice
2322 prompt "SmartMIPS or microMIPS ASE support"
2323
2324config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
2325 bool "None"
2326 help
2327 Select this if you want neither microMIPS nor SmartMIPS support
2328
Franck Bui-Huu9693a852007-02-02 17:41:47 +01002329config CPU_HAS_SMARTMIPS
2330 depends on SYS_SUPPORTS_SMARTMIPS
Markos Chandras9e2b5372014-07-21 08:46:14 +01002331 bool "SmartMIPS"
Franck Bui-Huu9693a852007-02-02 17:41:47 +01002332 help
2333 SmartMIPS is a extension of the MIPS32 architecture aimed at
2334 increased security at both hardware and software level for
2335 smartcards. Enabling this option will allow proper use of the
2336 SmartMIPS instructions by Linux applications. However a kernel with
2337 this option will not work on a MIPS core without SmartMIPS core. If
2338 you don't know you probably don't have SmartMIPS and should say N
2339 here.
2340
Steven J. Hillbce86082013-03-25 13:27:11 -05002341config CPU_MICROMIPS
Leonid Yegoshin7fd08ca2014-10-27 10:34:11 +00002342 depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
Markos Chandras9e2b5372014-07-21 08:46:14 +01002343 bool "microMIPS"
Steven J. Hillbce86082013-03-25 13:27:11 -05002344 help
2345 When this option is enabled the kernel will be built using the
2346 microMIPS ISA
2347
Markos Chandras9e2b5372014-07-21 08:46:14 +01002348endchoice
2349
Paul Burtona5e9a692014-01-27 15:23:10 +00002350config CPU_HAS_MSA
Paul Burton0ce34172015-07-27 12:58:27 -07002351 bool "Support for the MIPS SIMD Architecture"
Paul Burtona5e9a692014-01-27 15:23:10 +00002352 depends on CPU_SUPPORTS_MSA
Paul Burtonc92e47e2018-11-07 23:14:02 +00002353 depends on MIPS_FP_SUPPORT
Paul Burton2a6cb6692014-07-11 16:47:14 +01002354 depends on 64BIT || MIPS_O32_FP64_SUPPORT
Paul Burtona5e9a692014-01-27 15:23:10 +00002355 help
2356 MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
2357 and a set of SIMD instructions to operate on them. When this option
Paul Burton1db1af82014-01-27 15:23:11 +00002358 is enabled the kernel will support allocating & switching MSA
2359 vector register contexts. If you know that your kernel will only be
2360 running on CPUs which do not support MSA or that your userland will
2361 not be making use of it then you may wish to say N here to reduce
2362 the size & complexity of your kernel.
Paul Burtona5e9a692014-01-27 15:23:10 +00002363
2364 If unsure, say Y.
2365
Linus Torvalds1da177e2005-04-16 15:20:36 -07002366config CPU_HAS_WB
Ralf Baechlef7062dd2006-04-24 14:58:53 +01002367 bool
Ralf Baechlee01402b2005-07-14 15:57:16 +00002368
Kevin Cernekeedf0ac8a2011-11-16 01:25:45 +00002369config XKS01
2370 bool
2371
Jiaxun Yangba9196d2020-01-13 18:14:59 +08002372config CPU_HAS_DIEI
2373 depends on !CPU_DIEI_BROKEN
2374 bool
2375
2376config CPU_DIEI_BROKEN
2377 bool
2378
Florian Fainelli8256b172016-02-09 12:55:51 -08002379config CPU_HAS_RIXI
2380 bool
2381
Alexander Lobakin18d84e2e2020-01-22 13:58:50 +03002382config CPU_NO_LOAD_STORE_LR
Yasha Cherikovsky932afde2018-09-26 14:16:15 +03002383 bool
2384 help
Alexander Lobakin18d84e2e2020-01-22 13:58:50 +03002385 CPU lacks support for unaligned load and store instructions:
Yasha Cherikovsky932afde2018-09-26 14:16:15 +03002386 LWL, LWR, SWL, SWR (Load/store word left/right).
Alexander Lobakin18d84e2e2020-01-22 13:58:50 +03002387 LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit
2388 systems).
Yasha Cherikovsky932afde2018-09-26 14:16:15 +03002389
Ralf Baechlef41ae0b2006-06-05 17:24:46 +01002390#
2391# Vectored interrupt mode is an R2 feature
2392#
Ralf Baechlee01402b2005-07-14 15:57:16 +00002393config CPU_MIPSR2_IRQ_VI
Ralf Baechlef41ae0b2006-06-05 17:24:46 +01002394 bool
Ralf Baechlee01402b2005-07-14 15:57:16 +00002395
Ralf Baechlef41ae0b2006-06-05 17:24:46 +01002396#
2397# Extended interrupt mode is an R2 feature
2398#
Ralf Baechlee01402b2005-07-14 15:57:16 +00002399config CPU_MIPSR2_IRQ_EI
Ralf Baechlef41ae0b2006-06-05 17:24:46 +01002400 bool
Ralf Baechlee01402b2005-07-14 15:57:16 +00002401
Linus Torvalds1da177e2005-04-16 15:20:36 -07002402config CPU_HAS_SYNC
2403 bool
2404 depends on !CPU_R3000
2405 default y
2406
2407#
Maciej W. Rozycki20d60d92007-10-23 12:43:11 +01002408# CPU non-features
2409#
Thomas Bogendoerferb56d1ca2022-02-18 11:04:39 +01002410
2411# Work around the "daddi" and "daddiu" CPU errata:
2412#
2413# - The `daddi' instruction fails to trap on overflow.
2414# "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2415# erratum #23
2416#
2417# - The `daddiu' instruction can produce an incorrect result.
2418# "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2419# erratum #41
2420# "MIPS R4000MC Errata, Processor Revision 2.2 and 3.0", erratum
2421# #15
2422# "MIPS R4400PC/SC Errata, Processor Revision 1.0", erratum #7
2423# "MIPS R4400MC Errata, Processor Revision 1.0", erratum #5
Maciej W. Rozycki20d60d92007-10-23 12:43:11 +01002424config CPU_DADDI_WORKAROUNDS
2425 bool
2426
Thomas Bogendoerferb56d1ca2022-02-18 11:04:39 +01002427# Work around certain R4000 CPU errata (as implemented by GCC):
2428#
2429# - A double-word or a variable shift may give an incorrect result
2430# if executed immediately after starting an integer division:
2431# "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2432# erratum #28
2433# "MIPS R4000MC Errata, Processor Revision 2.2 and 3.0", erratum
2434# #19
2435#
2436# - A double-word or a variable shift may give an incorrect result
2437# if executed while an integer multiplication is in progress:
2438# "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2439# errata #16 & #28
2440#
2441# - An integer division may give an incorrect result if started in
2442# a delay slot of a taken branch or a jump:
2443# "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2444# erratum #52
Maciej W. Rozycki20d60d92007-10-23 12:43:11 +01002445config CPU_R4000_WORKAROUNDS
2446 bool
2447 select CPU_R4400_WORKAROUNDS
2448
Thomas Bogendoerferb56d1ca2022-02-18 11:04:39 +01002449# Work around certain R4400 CPU errata (as implemented by GCC):
2450#
2451# - A double-word or a variable shift may give an incorrect result
2452# if executed immediately after starting an integer division:
2453# "MIPS R4400MC Errata, Processor Revision 1.0", erratum #10
2454# "MIPS R4400MC Errata, Processor Revision 2.0 & 3.0", erratum #4
Maciej W. Rozycki20d60d92007-10-23 12:43:11 +01002455config CPU_R4400_WORKAROUNDS
2456 bool
2457
Paul Burton071d2f02019-10-01 23:04:32 +00002458config CPU_R4X00_BUGS64
2459 bool
2460 default y if SYS_HAS_CPU_R4X00 && 64BIT && (TARGET_ISA_REV < 1)
2461
Paul Burton4edf00a2016-05-06 14:36:23 +01002462config MIPS_ASID_SHIFT
2463 int
Thomas Bogendoerfer455481f2022-02-22 10:04:28 +01002464 default 6 if CPU_R3000
Paul Burton4edf00a2016-05-06 14:36:23 +01002465 default 0
2466
2467config MIPS_ASID_BITS
2468 int
Paul Burton2db003a2016-05-06 14:36:24 +01002469 default 0 if MIPS_ASID_BITS_VARIABLE
Thomas Bogendoerfer455481f2022-02-22 10:04:28 +01002470 default 6 if CPU_R3000
Paul Burton4edf00a2016-05-06 14:36:23 +01002471 default 8
2472
Paul Burton2db003a2016-05-06 14:36:24 +01002473config MIPS_ASID_BITS_VARIABLE
2474 bool
2475
Marcin Nowakowski4a5dc51e2018-02-09 22:11:06 +00002476config MIPS_CRC_SUPPORT
2477 bool
2478
Thomas Bogendoerfer802b83622020-08-24 18:32:43 +02002479# R4600 erratum. Due to the lack of errata information the exact
2480# technical details aren't known. I've experimentally found that disabling
2481# interrupts during indexed I-cache flushes seems to be sufficient to deal
2482# with the issue.
2483config WAR_R4600_V1_INDEX_ICACHEOP
2484 bool
2485
Thomas Bogendoerfer5e5b6522020-08-24 18:32:44 +02002486# Pleasures of the R4600 V1.x. Cite from the IDT R4600 V1.7 errata:
2487#
2488# 18. The CACHE instructions Hit_Writeback_Invalidate_D, Hit_Writeback_D,
2489# Hit_Invalidate_D and Create_Dirty_Excl_D should only be
2490# executed if there is no other dcache activity. If the dcache is
Colin Ian King18ff14c2020-10-27 18:34:30 +00002491# accessed for another instruction immediately preceding when these
Thomas Bogendoerfer5e5b6522020-08-24 18:32:44 +02002492# cache instructions are executing, it is possible that the dcache
2493# tag match outputs used by these cache instructions will be
2494# incorrect. These cache instructions should be preceded by at least
2495# four instructions that are not any kind of load or store
2496# instruction.
2497#
2498# This is not allowed: lw
2499# nop
2500# nop
2501# nop
2502# cache Hit_Writeback_Invalidate_D
2503#
2504# This is allowed: lw
2505# nop
2506# nop
2507# nop
2508# nop
2509# cache Hit_Writeback_Invalidate_D
2510config WAR_R4600_V1_HIT_CACHEOP
2511 bool
2512
Thomas Bogendoerfer44def342020-08-24 18:32:45 +02002513# Writeback and invalidate the primary cache dcache before DMA.
2514#
2515# R4600 v2.0 bug: "The CACHE instructions Hit_Writeback_Inv_D,
2516# Hit_Writeback_D, Hit_Invalidate_D and Create_Dirty_Exclusive_D will only
2517# operate correctly if the internal data cache refill buffer is empty. These
2518# CACHE instructions should be separated from any potential data cache miss
2519# by a load instruction to an uncached address to empty the response buffer."
2520# (Revision 2.0 device errata from IDT available on https://www.idt.com/
2521# in .pdf format.)
2522config WAR_R4600_V2_HIT_CACHEOP
2523 bool
2524
Thomas Bogendoerfer24a1c022020-08-24 18:32:47 +02002525# From TX49/H2 manual: "If the instruction (i.e. CACHE) is issued for
2526# the line which this instruction itself exists, the following
2527# operation is not guaranteed."
2528#
2529# Workaround: do two phase flushing for Index_Invalidate_I
2530config WAR_TX49XX_ICACHE_INDEX_INV
2531 bool
2532
Thomas Bogendoerfer886ee132020-08-24 18:32:48 +02002533# The RM7000 processors and the E9000 cores have a bug (though PMC-Sierra
2534# opposes it being called that) where invalid instructions in the same
2535# I-cache line worth of instructions being fetched may case spurious
2536# exceptions.
2537config WAR_ICACHE_REFILLS
2538 bool
2539
Thomas Bogendoerfer256ec482020-08-24 18:32:49 +02002540# On the R10000 up to version 2.6 (not sure about 2.7) there is a bug that
2541# may cause ll / sc and lld / scd sequences to execute non-atomically.
2542config WAR_R10000_LLSC
2543 bool
2544
Thomas Bogendoerfera7fbed92020-08-24 18:32:50 +02002545# 34K core erratum: "Problems Executing the TLBR Instruction"
2546config WAR_MIPS34K_MISSED_ITLB
2547 bool
2548
Maciej W. Rozycki20d60d92007-10-23 12:43:11 +01002549#
Linus Torvalds1da177e2005-04-16 15:20:36 -07002550# - Highmem only makes sense for the 32-bit kernel.
2551# - The current highmem code will only work properly on physically indexed
2552# caches such as R3000, SB1, R7000 or those that look like they're virtually
2553# indexed such as R4000/R4400 SC and MC versions or R10000. So for the
2554# moment we protect the user and offer the highmem option only on machines
2555# where it's known to be safe. This will not offer highmem on a few systems
2556# such as MIPS32 and MIPS64 CPUs which may have virtual and physically
2557# indexed CPUs but we're playing safe.
Ralf Baechle797798c2005-08-10 15:17:11 +00002558# - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
2559# know they might have memory configurations that could make use of highmem
2560# support.
Linus Torvalds1da177e2005-04-16 15:20:36 -07002561#
2562config HIGHMEM
2563 bool "High Memory Support"
Leonid Yegoshina6e18782013-12-03 10:22:26 +00002564 depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
Thomas Gleixnera4c33e82020-11-03 10:27:25 +01002565 select KMAP_LOCAL
Ralf Baechle797798c2005-08-10 15:17:11 +00002566
2567config CPU_SUPPORTS_HIGHMEM
2568 bool
2569
2570config SYS_SUPPORTS_HIGHMEM
2571 bool
Linus Torvalds1da177e2005-04-16 15:20:36 -07002572
Franck Bui-Huu9693a852007-02-02 17:41:47 +01002573config SYS_SUPPORTS_SMARTMIPS
2574 bool
2575
Steven J. Hilla6a48342013-02-05 16:52:02 -06002576config SYS_SUPPORTS_MICROMIPS
2577 bool
2578
Ralf Baechle377cb1b2014-04-29 01:49:24 +02002579config SYS_SUPPORTS_MIPS16
2580 bool
2581 help
2582 This option must be set if a kernel might be executed on a MIPS16-
2583 enabled CPU even if MIPS16 is not actually being used. In other
2584 words, it makes the kernel MIPS16-tolerant.
2585
Paul Burtona5e9a692014-01-27 15:23:10 +00002586config CPU_SUPPORTS_MSA
2587 bool
2588
Yoichi Yuasab4819b52005-06-25 14:54:31 -07002589config ARCH_FLATMEM_ENABLE
2590 def_bool y
Jiaxun Yang268a2d62019-10-20 22:43:13 +08002591 depends on !NUMA && !CPU_LOONGSON2EF
Yoichi Yuasab4819b52005-06-25 14:54:31 -07002592
Atsushi Nemotob1c6cd42006-07-03 00:09:47 +09002593config ARCH_SPARSEMEM_ENABLE
2594 bool
Atsushi Nemoto31473742006-07-03 00:09:47 +09002595
Ralf Baechled8cb4e12006-06-11 23:03:08 +01002596config NUMA
2597 bool "NUMA Support"
2598 depends on SYS_SUPPORTS_NUMA
Tiezhu Yangcf8194e2020-12-03 20:32:52 +08002599 select SMP
Kefeng Wang7ecd19c2022-01-19 18:07:41 -08002600 select HAVE_SETUP_PER_CPU_AREA
2601 select NEED_PER_CPU_EMBED_FIRST_CHUNK
Ralf Baechled8cb4e12006-06-11 23:03:08 +01002602 help
2603 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
2604 Access). This option improves performance on systems with more
2605 than two nodes; on two node systems it is generally better to
Randy Dunlap172a37e2020-01-31 17:55:43 -08002606 leave it disabled; on single node systems leave this option
Ralf Baechled8cb4e12006-06-11 23:03:08 +01002607 disabled.
2608
2609config SYS_SUPPORTS_NUMA
2610 bool
2611
Feiyang Chenf8f9f212022-03-19 17:40:02 +08002612config HAVE_ARCH_NODEDATA_EXTENSION
2613 bool
2614
Matt Redfearn8c530ea2016-03-31 10:05:39 +01002615config RELOCATABLE
2616 bool "Relocatable kernel"
Serge Seminab7c01f2020-05-21 17:07:14 +03002617 depends on SYS_SUPPORTS_RELOCATABLE
2618 depends on CPU_MIPS32_R2 || CPU_MIPS64_R2 || \
2619 CPU_MIPS32_R5 || CPU_MIPS64_R5 || \
2620 CPU_MIPS32_R6 || CPU_MIPS64_R6 || \
Jinyang Hea307a4c2020-11-25 18:07:46 +08002621 CPU_P5600 || CAVIUM_OCTEON_SOC || \
2622 CPU_LOONGSON64
Matt Redfearn8c530ea2016-03-31 10:05:39 +01002623 help
2624 This builds a kernel image that retains relocation information
2625 so it can be loaded someplace besides the default 1MB.
2626 The relocations make the kernel binary about 15% larger,
2627 but are discarded at runtime
2628
Matt Redfearn069fd762016-03-31 10:05:34 +01002629config RELOCATION_TABLE_SIZE
2630 hex "Relocation table size"
2631 depends on RELOCATABLE
2632 range 0x0 0x01000000
Jinyang Hea307a4c2020-11-25 18:07:46 +08002633 default "0x00200000" if CPU_LOONGSON64
Matt Redfearn069fd762016-03-31 10:05:34 +01002634 default "0x00100000"
Masahiro Yamadaa7f7f622020-06-14 01:50:22 +09002635 help
Matt Redfearn069fd762016-03-31 10:05:34 +01002636 A table of relocation data will be appended to the kernel binary
2637 and parsed at boot to fix up the relocated kernel.
2638
2639 This option allows the amount of space reserved for the table to be
2640 adjusted, although the default of 1Mb should be ok in most cases.
2641
2642 The build will fail and a valid size suggested if this is too small.
2643
2644 If unsure, leave at the default value.
2645
Matt Redfearn405bc8f2016-03-31 10:05:41 +01002646config RANDOMIZE_BASE
2647 bool "Randomize the address of the kernel image"
2648 depends on RELOCATABLE
Masahiro Yamadaa7f7f622020-06-14 01:50:22 +09002649 help
Enrico Weigelt, metux IT consult371a4152019-03-11 16:54:27 +01002650 Randomizes the physical and virtual address at which the
2651 kernel image is loaded, as a security feature that
2652 deters exploit attempts relying on knowledge of the location
2653 of kernel internals.
Matt Redfearn405bc8f2016-03-31 10:05:41 +01002654
Enrico Weigelt, metux IT consult371a4152019-03-11 16:54:27 +01002655 Entropy is generated using any coprocessor 0 registers available.
Matt Redfearn405bc8f2016-03-31 10:05:41 +01002656
Enrico Weigelt, metux IT consult371a4152019-03-11 16:54:27 +01002657 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
Matt Redfearn405bc8f2016-03-31 10:05:41 +01002658
Enrico Weigelt, metux IT consult371a4152019-03-11 16:54:27 +01002659 If unsure, say N.
Matt Redfearn405bc8f2016-03-31 10:05:41 +01002660
2661config RANDOMIZE_BASE_MAX_OFFSET
2662 hex "Maximum kASLR offset" if EXPERT
2663 depends on RANDOMIZE_BASE
2664 range 0x0 0x40000000 if EVA || 64BIT
2665 range 0x0 0x08000000
2666 default "0x01000000"
Masahiro Yamadaa7f7f622020-06-14 01:50:22 +09002667 help
Matt Redfearn405bc8f2016-03-31 10:05:41 +01002668 When kASLR is active, this provides the maximum offset that will
2669 be applied to the kernel image. It should be set according to the
2670 amount of physical RAM available in the target system minus
2671 PHYSICAL_START and must be a power of 2.
2672
2673 This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
2674 EVA or 64-bit. The default is 16Mb.
2675
Yasunori Gotoc80d79d2006-04-10 22:53:53 -07002676config NODES_SHIFT
2677 int
2678 default "6"
Mike Rapoporta9ee6cf2021-06-28 19:43:01 -07002679 depends on NUMA
Yasunori Gotoc80d79d2006-04-10 22:53:53 -07002680
Deng-Cheng Zhu14f70012010-10-12 19:37:22 +08002681config HW_PERF_EVENTS
2682 bool "Enable hardware performance counter support for perf events"
Thomas Bogendoerfer95b8a5e2021-10-20 14:49:13 +02002683 depends on PERF_EVENTS && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_LOONGSON64)
Deng-Cheng Zhu14f70012010-10-12 19:37:22 +08002684 default y
2685 help
2686 Enable hardware performance counter support for perf events. If
2687 disabled, perf events will use software events only.
2688
Tiezhu Yangbe8fa1c2020-02-05 12:08:33 +08002689config DMI
2690 bool "Enable DMI scanning"
2691 depends on MACH_LOONGSON64
2692 select DMI_SCAN_MACHINE_NON_EFI_FALLBACK
2693 default y
2694 help
2695 Enabled scanning of DMI to identify machine quirks. Say Y
2696 here unless you have verified that your setup is not
2697 affected by entries in the DMI blacklist. Required by PNP
2698 BIOS code.
2699
Linus Torvalds1da177e2005-04-16 15:20:36 -07002700config SMP
2701 bool "Multi-Processing support"
Ralf Baechlee73ea272006-06-04 11:51:46 +01002702 depends on SYS_SUPPORTS_SMP
2703 help
Linus Torvalds1da177e2005-04-16 15:20:36 -07002704 This enables support for systems with more than one CPU. If you have
Robert Graffham4a474152014-01-23 15:55:29 -08002705 a system with only one CPU, say N. If you have a system with more
2706 than one CPU, say Y.
Linus Torvalds1da177e2005-04-16 15:20:36 -07002707
Robert Graffham4a474152014-01-23 15:55:29 -08002708 If you say N here, the kernel will run on uni- and multiprocessor
Linus Torvalds1da177e2005-04-16 15:20:36 -07002709 machines, but will use only one CPU of a multiprocessor machine. If
2710 you say Y here, the kernel will run on many, but not all,
Robert Graffham4a474152014-01-23 15:55:29 -08002711 uniprocessor machines. On a uniprocessor machine, the kernel
Linus Torvalds1da177e2005-04-16 15:20:36 -07002712 will run faster if you say N here.
2713
2714 People using multiprocessor machines who say Y here should also say
2715 Y to "Enhanced Real Time Clock Support", below.
2716
Adrian Bunk03502fa2008-02-03 15:50:21 +02002717 See also the SMP-HOWTO available at
Alexander A. Klimovef054ad2020-07-14 21:12:26 +02002718 <https://www.tldp.org/docs.html#howto>.
Linus Torvalds1da177e2005-04-16 15:20:36 -07002719
2720 If you don't know what to do here, say N.
2721
Matt Redfearn7840d612016-07-07 08:50:40 +01002722config HOTPLUG_CPU
2723 bool "Support for hot-pluggable CPUs"
2724 depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
2725 help
2726 Say Y here to allow turning CPUs off and on. CPUs can be
2727 controlled through /sys/devices/system/cpu.
2728 (Note: power management support will enable this option
2729 automatically on SMP systems. )
2730 Say N if you want to disable CPU hotplug.
2731
Ralf Baechle87353d82007-11-19 12:23:51 +00002732config SMP_UP
2733 bool
2734
Paul Burton0ee958e2014-01-15 10:31:53 +00002735config SYS_SUPPORTS_MIPS_CPS
2736 bool
2737
Ralf Baechlee73ea272006-06-04 11:51:46 +01002738config SYS_SUPPORTS_SMP
2739 bool
2740
Ralf Baechle130e2fb2007-02-06 16:53:15 +00002741config NR_CPUS_DEFAULT_4
2742 bool
2743
2744config NR_CPUS_DEFAULT_8
2745 bool
2746
2747config NR_CPUS_DEFAULT_16
2748 bool
2749
2750config NR_CPUS_DEFAULT_32
2751 bool
2752
2753config NR_CPUS_DEFAULT_64
2754 bool
2755
Linus Torvalds1da177e2005-04-16 15:20:36 -07002756config NR_CPUS
Jayachandran Ca91796a2014-04-29 20:07:40 +05302757 int "Maximum number of CPUs (2-256)"
2758 range 2 256
Linus Torvalds1da177e2005-04-16 15:20:36 -07002759 depends on SMP
Ralf Baechle130e2fb2007-02-06 16:53:15 +00002760 default "4" if NR_CPUS_DEFAULT_4
2761 default "8" if NR_CPUS_DEFAULT_8
2762 default "16" if NR_CPUS_DEFAULT_16
2763 default "32" if NR_CPUS_DEFAULT_32
2764 default "64" if NR_CPUS_DEFAULT_64
Linus Torvalds1da177e2005-04-16 15:20:36 -07002765 help
2766 This allows you to specify the maximum number of CPUs which this
2767 kernel will support. The maximum supported value is 32 for 32-bit
2768 kernel and 64 for 64-bit kernels; the minimum value which makes
Atsushi Nemoto72ede9b2007-03-18 01:01:39 +09002769 sense is 1 for Qemu (useful only for kernel debugging purposes)
2770 and 2 for all others.
Linus Torvalds1da177e2005-04-16 15:20:36 -07002771
2772 This is purely to save memory - each supported CPU adds
Atsushi Nemoto72ede9b2007-03-18 01:01:39 +09002773 approximately eight kilobytes to the kernel image. For best
2774 performance should round up your number of processors to the next
2775 power of two.
Linus Torvalds1da177e2005-04-16 15:20:36 -07002776
Al Cooper399aaa22012-07-13 16:44:53 -04002777config MIPS_PERF_SHARED_TC_COUNTERS
2778 bool
2779
David Daney7820b842017-09-28 12:34:04 -05002780config MIPS_NR_CPU_NR_MAP_1024
2781 bool
2782
2783config MIPS_NR_CPU_NR_MAP
2784 int
2785 depends on SMP
2786 default 1024 if MIPS_NR_CPU_NR_MAP_1024
2787 default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024
2788
Atsushi Nemoto1723b4a2006-06-20 00:19:13 +09002789#
2790# Timer Interrupt Frequency Configuration
2791#
2792
2793choice
2794 prompt "Timer frequency"
2795 default HZ_250
2796 help
Enrico Weigelt, metux IT consult371a4152019-03-11 16:54:27 +01002797 Allows the configuration of the timer frequency.
Atsushi Nemoto1723b4a2006-06-20 00:19:13 +09002798
Paul Burton67596572015-09-22 10:16:39 -07002799 config HZ_24
2800 bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
2801
Atsushi Nemoto1723b4a2006-06-20 00:19:13 +09002802 config HZ_48
Ralf Baechle0f873582008-02-25 16:55:29 +00002803 bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
Atsushi Nemoto1723b4a2006-06-20 00:19:13 +09002804
2805 config HZ_100
2806 bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
2807
2808 config HZ_128
2809 bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
2810
2811 config HZ_250
2812 bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
2813
2814 config HZ_256
2815 bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
2816
2817 config HZ_1000
2818 bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
2819
2820 config HZ_1024
2821 bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
2822
2823endchoice
2824
Paul Burton67596572015-09-22 10:16:39 -07002825config SYS_SUPPORTS_24HZ
2826 bool
2827
Atsushi Nemoto1723b4a2006-06-20 00:19:13 +09002828config SYS_SUPPORTS_48HZ
2829 bool
2830
2831config SYS_SUPPORTS_100HZ
2832 bool
2833
2834config SYS_SUPPORTS_128HZ
2835 bool
2836
2837config SYS_SUPPORTS_250HZ
2838 bool
2839
2840config SYS_SUPPORTS_256HZ
2841 bool
2842
2843config SYS_SUPPORTS_1000HZ
2844 bool
2845
2846config SYS_SUPPORTS_1024HZ
2847 bool
2848
2849config SYS_SUPPORTS_ARBIT_HZ
2850 bool
Paul Burton67596572015-09-22 10:16:39 -07002851 default y if !SYS_SUPPORTS_24HZ && \
2852 !SYS_SUPPORTS_48HZ && \
2853 !SYS_SUPPORTS_100HZ && \
2854 !SYS_SUPPORTS_128HZ && \
2855 !SYS_SUPPORTS_250HZ && \
2856 !SYS_SUPPORTS_256HZ && \
2857 !SYS_SUPPORTS_1000HZ && \
Atsushi Nemoto1723b4a2006-06-20 00:19:13 +09002858 !SYS_SUPPORTS_1024HZ
2859
2860config HZ
2861 int
Paul Burton67596572015-09-22 10:16:39 -07002862 default 24 if HZ_24
Atsushi Nemoto1723b4a2006-06-20 00:19:13 +09002863 default 48 if HZ_48
2864 default 100 if HZ_100
2865 default 128 if HZ_128
2866 default 250 if HZ_250
2867 default 256 if HZ_256
2868 default 1000 if HZ_1000
2869 default 1024 if HZ_1024
2870
Deng-Cheng Zhu96685b12015-03-07 10:30:19 -08002871config SCHED_HRTICK
2872 def_bool HIGH_RES_TIMERS
2873
Eric DeVolder571feed2023-07-12 12:15:39 -04002874config ARCH_SUPPORTS_KEXEC
2875 def_bool y
Atsushi Nemotoea6e9422007-01-16 23:29:11 +09002876
Eric DeVolder571feed2023-07-12 12:15:39 -04002877config ARCH_SUPPORTS_CRASH_DUMP
2878 def_bool y
Ralf Baechle7aa1c8f2012-10-11 18:14:58 +02002879
2880config PHYSICAL_START
Marcin Nowakowskibff323d2016-12-02 09:58:29 +01002881 hex "Physical address where the kernel is loaded"
Maciej W. Rozycki8bda3e22018-03-26 19:11:51 +01002882 default "0xffffffff84000000"
Marcin Nowakowskibff323d2016-12-02 09:58:29 +01002883 depends on CRASH_DUMP
2884 help
Ralf Baechle7aa1c8f2012-10-11 18:14:58 +02002885 This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
2886 If you plan to use kernel for capturing the crash dump change
2887 this value to start of the reserved region (the "X" value as
2888 specified in the "crashkernel=YM@XM" command line boot parameter
2889 passed to the panic-ed kernel).
2890
Paul Burton597ce172013-11-22 13:12:07 +00002891config MIPS_O32_FP64_SUPPORT
Paul Burtonb7f1e272018-11-07 23:13:58 +00002892 bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6
Paul Burton597ce172013-11-22 13:12:07 +00002893 depends on 32BIT || MIPS32_O32
Paul Burton597ce172013-11-22 13:12:07 +00002894 help
2895 When this is enabled, the kernel will support use of 64-bit floating
2896 point registers with binaries using the O32 ABI along with the
2897 EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
2898 32-bit MIPS systems this support is at the cost of increasing the
2899 size and complexity of the compiled FPU emulator. Thus if you are
2900 running a MIPS32 system and know that none of your userland binaries
2901 will require 64-bit floating point, you may wish to reduce the size
2902 of your kernel & potentially improve FP emulation performance by
2903 saying N here.
2904
Paul Burton06e2e882014-02-14 17:55:18 +00002905 Although binutils currently supports use of this flag the details
2906 concerning its effect upon the O32 ABI in userland are still being
Colin Ian King18ff14c2020-10-27 18:34:30 +00002907 worked on. In order to avoid userland becoming dependent upon current
Paul Burton06e2e882014-02-14 17:55:18 +00002908 behaviour before the details have been finalised, this option should
2909 be considered experimental and only enabled by those working upon
2910 said details.
2911
2912 If unsure, say N.
Paul Burton597ce172013-11-22 13:12:07 +00002913
Dezhong Diaof2ffa5a2010-10-13 00:52:46 -06002914config USE_OF
Jonas Gorski0b3e06f2012-09-18 11:28:54 +02002915 bool
Dezhong Diaof2ffa5a2010-10-13 00:52:46 -06002916 select OF
Stephen Neuendorffere6ce1322010-11-18 15:54:56 -08002917 select OF_EARLY_FLATTREE
Grant Likelyabd23632012-02-24 08:07:06 -07002918 select IRQ_DOMAIN
Dezhong Diaof2ffa5a2010-10-13 00:52:46 -06002919
Dengcheng Zhu2fe8ea32018-09-11 14:49:24 -07002920config UHI_BOOT
2921 bool
2922
Andrew Bresticker7fafb062014-08-21 13:04:20 -07002923config BUILTIN_DTB
2924 bool
2925
Jonas Gorski1da8f172015-04-12 12:24:58 +02002926choice
Jonas Gorski5b24d522015-10-12 13:13:01 +02002927 prompt "Kernel appended dtb support" if USE_OF
Jonas Gorski1da8f172015-04-12 12:24:58 +02002928 default MIPS_NO_APPENDED_DTB
2929
2930 config MIPS_NO_APPENDED_DTB
2931 bool "None"
2932 help
2933 Do not enable appended dtb support.
2934
Aaro Koskinen87db5372015-09-11 17:46:14 +03002935 config MIPS_ELF_APPENDED_DTB
2936 bool "vmlinux"
2937 help
2938 With this option, the boot code will look for a device tree binary
2939 DTB) included in the vmlinux ELF section .appended_dtb. By default
2940 it is empty and the DTB can be appended using binutils command
2941 objcopy:
2942
2943 objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
2944
Colin Ian King18ff14c2020-10-27 18:34:30 +00002945 This is meant as a backward compatibility convenience for those
Aaro Koskinen87db5372015-09-11 17:46:14 +03002946 systems with a bootloader that can't be upgraded to accommodate
2947 the documented boot protocol using a device tree.
2948
Jonas Gorski1da8f172015-04-12 12:24:58 +02002949 config MIPS_RAW_APPENDED_DTB
Jonas Gorskib8f54f22016-06-20 11:27:36 +02002950 bool "vmlinux.bin or vmlinuz.bin"
Jonas Gorski1da8f172015-04-12 12:24:58 +02002951 help
2952 With this option, the boot code will look for a device tree binary
Jonas Gorskib8f54f22016-06-20 11:27:36 +02002953 DTB) appended to raw vmlinux.bin or vmlinuz.bin.
Jonas Gorski1da8f172015-04-12 12:24:58 +02002954 (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
2955
2956 This is meant as a backward compatibility convenience for those
2957 systems with a bootloader that can't be upgraded to accommodate
2958 the documented boot protocol using a device tree.
2959
2960 Beware that there is very little in terms of protection against
2961 this option being confused by leftover garbage in memory that might
2962 look like a DTB header after a reboot if no actual DTB is appended
2963 to vmlinux.bin. Do not leave this option active in a production kernel
2964 if you don't intend to always append a DTB.
2965endchoice
2966
Jonas Gorski20249722015-10-12 13:13:02 +02002967choice
2968 prompt "Kernel command line type" if !CMDLINE_OVERRIDE
Jonas Gorski2bcef9b2015-10-12 13:13:03 +02002969 default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
Jiaxun Yang87fcfa72020-03-25 11:55:02 +08002970 !MACH_LOONGSON64 && !MIPS_MALTA && \
Jonas Gorski2bcef9b2015-10-12 13:13:03 +02002971 !CAVIUM_OCTEON_SOC
Jonas Gorski20249722015-10-12 13:13:02 +02002972 default MIPS_CMDLINE_FROM_BOOTLOADER
2973
2974 config MIPS_CMDLINE_FROM_DTB
2975 depends on USE_OF
2976 bool "Dtb kernel arguments if available"
2977
2978 config MIPS_CMDLINE_DTB_EXTEND
2979 depends on USE_OF
2980 bool "Extend dtb kernel arguments with bootloader arguments"
2981
2982 config MIPS_CMDLINE_FROM_BOOTLOADER
2983 bool "Bootloader kernel arguments if available"
Rabin Vincented47e152016-04-28 11:03:09 +02002984
2985 config MIPS_CMDLINE_BUILTIN_EXTEND
2986 depends on CMDLINE_BOOL
2987 bool "Extend builtin kernel arguments with bootloader arguments"
Jonas Gorski20249722015-10-12 13:13:02 +02002988endchoice
2989
Ralf Baechle5e83d432005-10-29 19:32:41 +01002990endmenu
2991
Atsushi Nemoto1df0f0f2006-09-26 23:44:01 +09002992config LOCKDEP_SUPPORT
2993 bool
2994 default y
2995
2996config STACKTRACE_SUPPORT
2997 bool
2998 default y
2999
Kirill A. Shutemova728ab52015-04-14 15:45:51 -07003000config PGTABLE_LEVELS
3001 int
Alex Belits3377e222017-02-16 17:27:34 -08003002 default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
Huang Pei41ce0972021-11-25 18:59:48 +08003003 default 3 if 64BIT && (!PAGE_SIZE_64KB || MIPS_VA_BITS_48)
Kirill A. Shutemova728ab52015-04-14 15:45:51 -07003004 default 2
3005
Paul Burton6c359eb2018-07-27 18:23:20 -07003006config MIPS_AUTO_PFN_OFFSET
3007 bool
3008
Linus Torvalds1da177e2005-04-16 15:20:36 -07003009menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
3010
Paul Burtonc5611df2016-10-05 18:18:12 +01003011config PCI_DRIVERS_GENERIC
Christoph Hellwig2eac9c22018-11-15 20:05:33 +01003012 select PCI_DOMAINS_GENERIC if PCI
Paul Burtonc5611df2016-10-05 18:18:12 +01003013 bool
3014
3015config PCI_DRIVERS_LEGACY
3016 def_bool !PCI_DRIVERS_GENERIC
3017 select NO_GENERIC_PCI_IOPORT_MAP
Christoph Hellwig2eac9c22018-11-15 20:05:33 +01003018 select PCI_DOMAINS if PCI
Linus Torvalds1da177e2005-04-16 15:20:36 -07003019
3020#
3021# ISA support is now enabled via select. Too many systems still have the one
3022# or other ISA chip on the board that users don't know about so don't expect
3023# users to choose the right thing ...
3024#
3025config ISA
3026 bool
3027
Linus Torvalds1da177e2005-04-16 15:20:36 -07003028config TC
3029 bool "TURBOchannel support"
3030 depends on MACH_DECSTATION
3031 help
Justin P. Mattock50a23e62010-10-16 10:36:23 -07003032 TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
3033 processors. TURBOchannel programming specifications are available
3034 at:
3035 <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
3036 and:
3037 <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
3038 Linux driver support status is documented at:
3039 <http://www.linux-mips.org/wiki/DECstation>
Linus Torvalds1da177e2005-04-16 15:20:36 -07003040
Linus Torvalds1da177e2005-04-16 15:20:36 -07003041config MMU
3042 bool
3043 default y
3044
Matt Redfearn109c32f2016-11-24 17:32:45 +00003045config ARCH_MMAP_RND_BITS_MIN
3046 default 12 if 64BIT
3047 default 8
3048
3049config ARCH_MMAP_RND_BITS_MAX
3050 default 18 if 64BIT
3051 default 15
3052
3053config ARCH_MMAP_RND_COMPAT_BITS_MIN
Enrico Weigelt, metux IT consult371a4152019-03-11 16:54:27 +01003054 default 8
Matt Redfearn109c32f2016-11-24 17:32:45 +00003055
3056config ARCH_MMAP_RND_COMPAT_BITS_MAX
Enrico Weigelt, metux IT consult371a4152019-03-11 16:54:27 +01003057 default 15
Matt Redfearn109c32f2016-11-24 17:32:45 +00003058
Ralf Baechled865bea2007-10-11 23:46:10 +01003059config I8253
3060 bool
Russell King798778b2011-05-08 19:03:03 +01003061 select CLKSRC_I8253
Thomas Gleixner2d026122011-06-09 13:08:27 +00003062 select CLKEVT_I8253
Wu Zhangjin9726b432009-11-17 01:32:58 +08003063 select MIPS_EXTERNAL_TIMER
Linus Torvalds1da177e2005-04-16 15:20:36 -07003064endmenu
3065
Linus Torvalds1da177e2005-04-16 15:20:36 -07003066config TRAD_SIGNALS
3067 bool
Linus Torvalds1da177e2005-04-16 15:20:36 -07003068
Linus Torvalds1da177e2005-04-16 15:20:36 -07003069config MIPS32_COMPAT
Ralf Baechle78aaf952014-12-19 01:18:03 +01003070 bool
Linus Torvalds1da177e2005-04-16 15:20:36 -07003071
3072config COMPAT
3073 bool
Linus Torvalds1da177e2005-04-16 15:20:36 -07003074
3075config MIPS32_O32
3076 bool "Kernel support for o32 binaries"
Ralf Baechle78aaf952014-12-19 01:18:03 +01003077 depends on 64BIT
3078 select ARCH_WANT_OLD_COMPAT_IPC
3079 select COMPAT
3080 select MIPS32_COMPAT
Linus Torvalds1da177e2005-04-16 15:20:36 -07003081 help
3082 Select this option if you want to run o32 binaries. These are pure
3083 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
3084 existing binaries are in this format.
3085
3086 If unsure, say Y.
3087
3088config MIPS32_N32
3089 bool "Kernel support for n32 binaries"
Ralf Baechlec22eacfe2015-01-03 12:10:23 +01003090 depends on 64BIT
Arnd Bergmann5a9372f2019-01-10 17:24:31 +01003091 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
Ralf Baechle78aaf952014-12-19 01:18:03 +01003092 select COMPAT
3093 select MIPS32_COMPAT
Linus Torvalds1da177e2005-04-16 15:20:36 -07003094 help
3095 Select this option if you want to run n32 binaries. These are
3096 64-bit binaries using 32-bit quantities for addressing and certain
3097 data that would normally be 64-bit. They are used in special
3098 cases.
3099
3100 If unsure, say N.
3101
Nathan Chancellord49fc692022-01-25 15:19:25 -07003102config CC_HAS_MNO_BRANCH_LIKELY
3103 def_bool y
3104 depends on $(cc-option,-mno-branch-likely)
3105
Jiaxun Yang1a2c73f2023-02-28 19:34:59 +00003106# https://github.com/llvm/llvm-project/issues/61045
3107config CC_HAS_BROKEN_INLINE_COMPAT_BRANCH
3108 def_bool y if CC_IS_CLANG
3109
Ralf Baechle21162452007-02-09 17:08:58 +00003110menu "Power management options"
Rodolfo Giometti952fa952006-06-05 17:43:10 +02003111
Wu Zhangjin363c55c2009-06-04 20:27:10 +08003112config ARCH_HIBERNATION_POSSIBLE
3113 def_bool y
Ralf Baechle3f5b3e12009-07-02 11:48:07 +01003114 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
Wu Zhangjin363c55c2009-06-04 20:27:10 +08003115
Johannes Bergf4cb5702007-12-08 02:14:00 +01003116config ARCH_SUSPEND_POSSIBLE
3117 def_bool y
Ralf Baechle3f5b3e12009-07-02 11:48:07 +01003118 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
Johannes Bergf4cb5702007-12-08 02:14:00 +01003119
Ralf Baechle21162452007-02-09 17:08:58 +00003120source "kernel/power/Kconfig"
Rodolfo Giometti952fa952006-06-05 17:43:10 +02003121
Linus Torvalds1da177e2005-04-16 15:20:36 -07003122endmenu
3123
Viresh Kumar7a998932013-04-04 12:54:21 +00003124config MIPS_EXTERNAL_TIMER
3125 bool
3126
Viresh Kumar7a998932013-04-04 12:54:21 +00003127menu "CPU Power Management"
Paul Burtonc095eba2014-04-14 16:24:22 +01003128
3129if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
Viresh Kumar7a998932013-04-04 12:54:21 +00003130source "drivers/cpufreq/Kconfig"
Juerg Haefliger31f12fd2022-05-24 10:03:11 +02003131endif # CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
Wu Zhangjin9726b432009-11-17 01:32:58 +08003132
Paul Burtonc095eba2014-04-14 16:24:22 +01003133source "drivers/cpuidle/Kconfig"
3134
3135endmenu
3136
Sanjay Lal2235a542012-11-21 18:33:59 -08003137source "arch/mips/kvm/Kconfig"
Nathan Chancellore91946d2020-04-28 15:14:16 -07003138
3139source "arch/mips/vdso/Kconfig"