blob: de3b32a507d230cad6ae9659d33ce7b61c5d6808 [file] [log] [blame]
Greg Kroah-Hartmanb2441312017-11-01 15:07:57 +01001# SPDX-License-Identifier: GPL-2.0
Linus Torvalds1da177e2005-04-16 15:20:36 -07002config MIPS
3 bool
4 default y
Yury Norov942fa982018-05-16 11:18:49 +03005 select ARCH_32BIT_OFF_T if !64BIT
Paul Burtonea6a3732018-11-07 23:14:09 +00006 select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT
Kees Cookb847bd62022-03-09 14:09:39 -08007 select ARCH_HAS_CURRENT_STACK_POINTER if !CC_IS_CLANG || CLANG_VERSION >= 140000
Florian Fainellidfad83c2021-03-30 20:22:07 -07008 select ARCH_HAS_DEBUG_VIRTUAL if !64BIT
Alexander Lobakin34c01e42020-01-22 13:58:51 +03009 select ARCH_HAS_FORTIFY_SOURCE
10 select ARCH_HAS_KCOV
Tiezhu Yang66633ab2021-03-25 20:50:01 +080011 select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE if !EVA
Alexander Lobakin34c01e42020-01-22 13:58:51 +030012 select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI)
Arnd Bergmanne6226992021-05-17 09:22:34 +020013 select ARCH_HAS_STRNCPY_FROM_USER
14 select ARCH_HAS_STRNLEN_USER
Matt Redfearn12597982017-05-15 10:46:35 +010015 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
Hassan Naveed1e359182018-11-19 16:49:37 -080016 select ARCH_HAS_UBSAN_SANITIZE_ALL
Xingxing Su8b3165e2020-12-03 15:22:51 +080017 select ARCH_HAS_GCOV_PROFILE_ALL
Nick Desaulniersc55944c2021-04-07 10:35:43 -070018 select ARCH_KEEP_MEMBLOCK
Matt Redfearn12597982017-05-15 10:46:35 +010019 select ARCH_SUPPORTS_UPROBES
Ralf Baechle1ee36302015-09-29 12:19:48 +020020 select ARCH_USE_BUILTIN_BSWAP
Matt Redfearn12597982017-05-15 10:46:35 +010021 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
Anshuman Khandualdce44562021-04-29 22:55:15 -070022 select ARCH_USE_MEMTEST
Paul Burton25da4e92017-06-09 17:26:42 -070023 select ARCH_USE_QUEUED_RWLOCKS
Paul Burton0b17c962017-06-09 17:26:43 -070024 select ARCH_USE_QUEUED_SPINLOCKS
Anshuman Khandual855f9a82021-05-04 18:38:13 -070025 select ARCH_SUPPORTS_HUGETLBFS if CPU_SUPPORTS_HUGEPAGES
Alexandre Ghiti9035bd22019-09-23 15:39:18 -070026 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
Matt Redfearn12597982017-05-15 10:46:35 +010027 select ARCH_WANT_IPC_PARSE_VERSION
Alexander Lobakind3a4e0f2021-01-10 11:57:01 +000028 select ARCH_WANT_LD_ORPHAN_WARN
Shile Zhang10916702019-12-04 08:46:31 +080029 select BUILDTIME_TABLE_SORT
Matt Redfearn12597982017-05-15 10:46:35 +010030 select CLONE_BACKWARDS
Paul Burton57eeaced2018-11-08 23:44:55 +000031 select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1)
Matt Redfearn12597982017-05-15 10:46:35 +010032 select CPU_PM if CPU_IDLE
33 select GENERIC_ATOMIC64 if !64BIT
Matt Redfearn12597982017-05-15 10:46:35 +010034 select GENERIC_CMOS_UPDATE
35 select GENERIC_CPU_AUTOPROBE
Vincenzo Frascino24640f22019-06-21 10:52:46 +010036 select GENERIC_GETTIMEOFDAY
Paul Burtonb962aeb2018-08-29 14:54:00 -070037 select GENERIC_IOMAP
Matt Redfearn12597982017-05-15 10:46:35 +010038 select GENERIC_IRQ_PROBE
39 select GENERIC_IRQ_SHOW
Christoph Hellwig6630a8e2018-11-15 20:05:37 +010040 select GENERIC_ISA_DMA if EISA
Antony Pavlov740129b2018-04-11 08:50:19 +010041 select GENERIC_LIB_ASHLDI3
42 select GENERIC_LIB_ASHRDI3
43 select GENERIC_LIB_CMPDI2
44 select GENERIC_LIB_LSHRDI3
45 select GENERIC_LIB_UCMPDI2
Matt Redfearn12597982017-05-15 10:46:35 +010046 select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
47 select GENERIC_SMP_IDLE_THREAD
48 select GENERIC_TIME_VSYSCALL
Christoph Hellwig446f0622019-07-11 20:56:52 -070049 select GUP_GET_PTE_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT
Paul Burton906d4412018-08-20 15:36:18 -070050 select HAVE_ARCH_COMPILER_H
Matt Redfearn12597982017-05-15 10:46:35 +010051 select HAVE_ARCH_JUMP_LABEL
Arnd Bergmann42b20992021-01-22 12:02:51 +010052 select HAVE_ARCH_KGDB if MIPS_FP_SUPPORT
Matt Redfearn109c32f2016-11-24 17:32:45 +000053 select HAVE_ARCH_MMAP_RND_BITS if MMU
54 select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT
Markos Chandras490b0042014-01-22 14:40:04 +000055 select HAVE_ARCH_SECCOMP_FILTER
Ralf Baechlec0ff3c52012-08-17 08:22:04 +020056 select HAVE_ARCH_TRACEHOOK
Daniel Silsby45e03e62019-07-15 17:40:01 -040057 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES
Masahiro Yamada2ff2b7e2019-08-19 14:54:20 +090058 select HAVE_ASM_MODVERSIONS
Matt Redfearn12597982017-05-15 10:46:35 +010059 select HAVE_CONTEXT_TRACKING
Frederic Weisbecker490f5612020-01-27 16:41:52 +010060 select HAVE_TIF_NOHZ
Wu Zhangjin64575f92010-10-27 18:59:09 +080061 select HAVE_C_RECORDMCOUNT
Matt Redfearn12597982017-05-15 10:46:35 +010062 select HAVE_DEBUG_KMEMLEAK
63 select HAVE_DEBUG_STACKOVERFLOW
Matt Redfearn12597982017-05-15 10:46:35 +010064 select HAVE_DMA_CONTIGUOUS
65 select HAVE_DYNAMIC_FTRACE
Johan Almbladh01bdc582021-10-05 18:54:07 +020066 select HAVE_EBPF_JIT if !CPU_MICROMIPS && \
67 !CPU_DADDI_WORKAROUNDS && \
68 !CPU_R4000_WORKAROUNDS && \
69 !CPU_R4400_WORKAROUNDS
Matt Redfearn12597982017-05-15 10:46:35 +010070 select HAVE_EXIT_THREAD
Christoph Hellwig67a929e2019-07-11 20:57:14 -070071 select HAVE_FAST_GUP
Matt Redfearn12597982017-05-15 10:46:35 +010072 select HAVE_FTRACE_MCOUNT_RECORD
Wu Zhangjin29c5d342009-11-20 20:34:34 +080073 select HAVE_FUNCTION_GRAPH_TRACER
Matt Redfearn12597982017-05-15 10:46:35 +010074 select HAVE_FUNCTION_TRACER
Alexander Lobakin34c01e42020-01-22 13:58:51 +030075 select HAVE_GCC_PLUGINS
76 select HAVE_GENERIC_VDSO
Hassan Naveedb3a428b2018-10-29 18:27:41 -070077 select HAVE_IOREMAP_PROT
Matt Redfearn12597982017-05-15 10:46:35 +010078 select HAVE_IRQ_EXIT_ON_IRQ_STACK
79 select HAVE_IRQ_TIME_ACCOUNTING
David Daneyc1bf2072010-08-03 11:22:20 -070080 select HAVE_KPROBES
81 select HAVE_KRETPROBES
Paul Burtonc0436b52018-11-21 21:56:36 +000082 select HAVE_LD_DEAD_CODE_DATA_ELIMINATION
David Howells786d35d2012-09-28 14:31:03 +093083 select HAVE_MOD_ARCH_SPECIFIC
Petr Mladek42a0bb32016-05-20 17:00:33 -070084 select HAVE_NMI
Matt Redfearn12597982017-05-15 10:46:35 +010085 select HAVE_PERF_EVENTS
Tiezhu Yang1ddc96b2021-02-04 11:35:22 +080086 select HAVE_PERF_REGS
87 select HAVE_PERF_USER_STACK_DUMP
Marcin Nowakowski08bccf42016-09-02 10:13:21 +020088 select HAVE_REGS_AND_STACK_ACCESS_API
Paul Burton9ea141a2018-06-14 10:13:53 -070089 select HAVE_RSEQ
Hassan Naveed16c0f032019-11-15 23:44:49 +000090 select HAVE_SPARSE_SYSCALL_NR
Masahiro Yamadad148eac2018-06-14 19:36:45 +090091 select HAVE_STACKPROTECTOR
Matt Redfearn12597982017-05-15 10:46:35 +010092 select HAVE_SYSCALL_TRACEPOINTS
Ben Hutchingsa3f14312017-10-04 03:46:14 +010093 select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP
Matt Redfearn12597982017-05-15 10:46:35 +010094 select IRQ_FORCED_THREADING
Christoph Hellwig6630a8e2018-11-15 20:05:37 +010095 select ISA if EISA
Matt Redfearn12597982017-05-15 10:46:35 +010096 select MODULES_USE_ELF_REL if MODULES
Alexander Lobakin34c01e42020-01-22 13:58:51 +030097 select MODULES_USE_ELF_RELA if MODULES && 64BIT
Matt Redfearn12597982017-05-15 10:46:35 +010098 select PERF_USE_VMALLOC
Thomas Gleixner981aa1d2020-09-28 12:13:07 +020099 select PCI_MSI_ARCH_FALLBACKS if PCI_MSI
Arnd Bergmann05a0a342018-08-28 16:26:30 +0200100 select RTC_LIB
Matt Redfearn12597982017-05-15 10:46:35 +0100101 select SYSCTL_EXCEPTION_TRACE
Masahiro Yamada4aae6832021-07-31 14:22:32 +0900102 select TRACE_IRQFLAGS_SUPPORT
Matt Redfearn12597982017-05-15 10:46:35 +0100103 select VIRT_TO_BUS
Al Viro0bb87f02020-06-14 00:18:12 -0400104 select ARCH_HAS_ELFCORE_COMPAT
Nemanja Rakovice0a8b932022-01-31 11:17:09 +0100105 select HAVE_ARCH_KCSAN if 64BIT
Linus Torvalds1da177e2005-04-16 15:20:36 -0700106
Christoph Hellwigd3991572020-04-16 17:00:07 +0200107config MIPS_FIXUP_BIGPHYS_ADDR
108 bool
109
Paul Cercueilc434b9f2020-09-06 21:29:25 +0200110config MIPS_GENERIC
111 bool
112
Paul Cercueilf0f4a752020-09-06 21:29:31 +0200113config MACH_INGENIC
114 bool
115 select SYS_SUPPORTS_32BIT_KERNEL
116 select SYS_SUPPORTS_LITTLE_ENDIAN
117 select SYS_SUPPORTS_ZBOOT
Paul Cercueilf0f4a752020-09-06 21:29:31 +0200118 select DMA_NONCOHERENT
Paul Cercueil16607102021-05-30 18:17:55 +0100119 select ARCH_HAS_SYNC_DMA_FOR_CPU
Paul Cercueilf0f4a752020-09-06 21:29:31 +0200120 select IRQ_MIPS_CPU
121 select PINCTRL
122 select GPIOLIB
123 select COMMON_CLK
124 select GENERIC_IRQ_CHIP
125 select BUILTIN_DTB if MIPS_NO_APPENDED_DTB
126 select USE_OF
127 select CPU_SUPPORTS_CPUFREQ
128 select MIPS_EXTERNAL_TIMER
129
Linus Torvalds1da177e2005-04-16 15:20:36 -0700130menu "Machine selection"
131
Ralf Baechle5e83d432005-10-29 19:32:41 +0100132choice
133 prompt "System type"
Paul Cercueilc434b9f2020-09-06 21:29:25 +0200134 default MIPS_GENERIC_KERNEL
Linus Torvalds1da177e2005-04-16 15:20:36 -0700135
Paul Cercueilc434b9f2020-09-06 21:29:25 +0200136config MIPS_GENERIC_KERNEL
Paul Burtoneed0eab2016-10-05 18:18:20 +0100137 bool "Generic board-agnostic MIPS kernel"
Christoph Hellwig4e066442021-02-10 10:56:41 +0100138 select ARCH_HAS_SETUP_DMA_OPS
Paul Cercueilc434b9f2020-09-06 21:29:25 +0200139 select MIPS_GENERIC
Paul Burtoneed0eab2016-10-05 18:18:20 +0100140 select BOOT_RAW
141 select BUILTIN_DTB
142 select CEVT_R4K
143 select CLKSRC_MIPS_GIC
144 select COMMON_CLK
Paul Burtoneed0eab2016-10-05 18:18:20 +0100145 select CPU_MIPSR2_IRQ_EI
Alexander Lobakin34c01e42020-01-22 13:58:51 +0300146 select CPU_MIPSR2_IRQ_VI
Paul Burtoneed0eab2016-10-05 18:18:20 +0100147 select CSRC_R4K
Christoph Hellwig4e066442021-02-10 10:56:41 +0100148 select DMA_NONCOHERENT
Christoph Hellwigeb01d422018-11-15 20:05:32 +0100149 select HAVE_PCI
Paul Burtoneed0eab2016-10-05 18:18:20 +0100150 select IRQ_MIPS_CPU
Paul Burton0211d492018-07-27 18:23:21 -0700151 select MIPS_AUTO_PFN_OFFSET
Paul Burtoneed0eab2016-10-05 18:18:20 +0100152 select MIPS_CPU_SCACHE
153 select MIPS_GIC
154 select MIPS_L1_CACHE_SHIFT_7
155 select NO_EXCEPT_FILL
156 select PCI_DRIVERS_GENERIC
Paul Burtoneed0eab2016-10-05 18:18:20 +0100157 select SMP_UP if SMP
Matt Redfearna3078e52017-01-23 14:08:13 +0000158 select SWAP_IO_SPACE
Paul Burtoneed0eab2016-10-05 18:18:20 +0100159 select SYS_HAS_CPU_MIPS32_R1
160 select SYS_HAS_CPU_MIPS32_R2
161 select SYS_HAS_CPU_MIPS32_R6
162 select SYS_HAS_CPU_MIPS64_R1
163 select SYS_HAS_CPU_MIPS64_R2
164 select SYS_HAS_CPU_MIPS64_R6
165 select SYS_SUPPORTS_32BIT_KERNEL
166 select SYS_SUPPORTS_64BIT_KERNEL
167 select SYS_SUPPORTS_BIG_ENDIAN
168 select SYS_SUPPORTS_HIGHMEM
169 select SYS_SUPPORTS_LITTLE_ENDIAN
170 select SYS_SUPPORTS_MICROMIPS
Paul Burtoneed0eab2016-10-05 18:18:20 +0100171 select SYS_SUPPORTS_MIPS16
Alexander Lobakin34c01e42020-01-22 13:58:51 +0300172 select SYS_SUPPORTS_MIPS_CPS
Paul Burtoneed0eab2016-10-05 18:18:20 +0100173 select SYS_SUPPORTS_MULTITHREADING
174 select SYS_SUPPORTS_RELOCATABLE
175 select SYS_SUPPORTS_SMARTMIPS
Paul Cercueilc3e2ee62020-09-06 21:29:29 +0200176 select SYS_SUPPORTS_ZBOOT
Alexander Lobakin34c01e42020-01-22 13:58:51 +0300177 select UHI_BOOT
Corentin Labbe2e6522c2018-01-17 19:56:38 +0100178 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
179 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
180 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
181 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
182 select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
183 select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
Paul Burtoneed0eab2016-10-05 18:18:20 +0100184 select USE_OF
185 help
186 Select this to build a kernel which aims to support multiple boards,
187 generally using a flattened device tree passed from the bootloader
188 using the boot protocol defined in the UHI (Unified Hosting
189 Interface) specification.
190
Manuel Lauss42a4f172010-07-15 21:45:04 +0200191config MIPS_ALCHEMY
Yoichi Yuasac3543e22007-05-11 20:44:30 +0900192 bool "Alchemy processor based machines"
Christoph Hellwigd4a451d2018-04-03 16:24:20 +0200193 select PHYS_ADDR_T_64BIT
Ralf Baechlef772cdb2012-11-30 17:27:27 +0100194 select CEVT_R4K
Steven J. Hilld7ea3352012-11-14 23:34:17 -0600195 select CSRC_R4K
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200196 select IRQ_MIPS_CPU
Christoph Hellwiga86497d2021-02-10 10:56:40 +0100197 select DMA_NONCOHERENT # Au1000,1500,1100 aren't, rest is
Christoph Hellwigd3991572020-04-16 17:00:07 +0200198 select MIPS_FIXUP_BIGPHYS_ADDR if PCI
Manuel Lauss42a4f172010-07-15 21:45:04 +0200199 select SYS_HAS_CPU_MIPS32_R1
200 select SYS_SUPPORTS_32BIT_KERNEL
201 select SYS_SUPPORTS_APM_EMULATION
Linus Walleijd30a2b42016-04-19 11:23:22 +0200202 select GPIOLIB
Wu Zhangjin1b93b3c2009-10-14 18:12:16 +0800203 select SYS_SUPPORTS_ZBOOT
Manuel Lauss47440222014-07-23 16:36:48 +0200204 select COMMON_CLK
Linus Torvalds1da177e2005-04-16 15:20:36 -0700205
Florian Fainelli7ca5dc12009-06-24 11:12:57 +0200206config AR7
207 bool "Texas Instruments AR7"
208 select BOOT_ELF32
Arnd Bergmannb408b612021-05-31 15:22:37 +0200209 select COMMON_CLK
Florian Fainelli7ca5dc12009-06-24 11:12:57 +0200210 select DMA_NONCOHERENT
211 select CEVT_R4K
212 select CSRC_R4K
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200213 select IRQ_MIPS_CPU
Florian Fainelli7ca5dc12009-06-24 11:12:57 +0200214 select NO_EXCEPT_FILL
215 select SWAP_IO_SPACE
216 select SYS_HAS_CPU_MIPS32_R1
217 select SYS_HAS_EARLY_PRINTK
218 select SYS_SUPPORTS_32BIT_KERNEL
219 select SYS_SUPPORTS_LITTLE_ENDIAN
Ralf Baechle377cb1b2014-04-29 01:49:24 +0200220 select SYS_SUPPORTS_MIPS16
Wu Zhangjin1b93b3c2009-10-14 18:12:16 +0800221 select SYS_SUPPORTS_ZBOOT_UART16550
Linus Walleijd30a2b42016-04-19 11:23:22 +0200222 select GPIOLIB
Florian Fainelli7ca5dc12009-06-24 11:12:57 +0200223 select VLYNQ
224 help
225 Support for the Texas Instruments AR7 System-on-a-Chip
226 family: TNETD7100, 7200 and 7300.
227
Sergey Ryazanov43cc7392014-10-29 03:18:38 +0400228config ATH25
229 bool "Atheros AR231x/AR531x SoC support"
230 select CEVT_R4K
231 select CSRC_R4K
232 select DMA_NONCOHERENT
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200233 select IRQ_MIPS_CPU
Sergey Ryazanov1753e742014-10-29 03:18:41 +0400234 select IRQ_DOMAIN
Sergey Ryazanov43cc7392014-10-29 03:18:38 +0400235 select SYS_HAS_CPU_MIPS32_R1
236 select SYS_SUPPORTS_BIG_ENDIAN
237 select SYS_SUPPORTS_32BIT_KERNEL
Sergey Ryazanov8aaa7272014-10-29 03:18:42 +0400238 select SYS_HAS_EARLY_PRINTK
Sergey Ryazanov43cc7392014-10-29 03:18:38 +0400239 help
240 Support for Atheros AR231x and Atheros AR531x based boards
241
Gabor Juhosd4a67d92011-01-04 21:28:14 +0100242config ATH79
243 bool "Atheros AR71XX/AR724X/AR913X based boards"
Alban Bedelff591a92015-08-03 19:23:52 +0200244 select ARCH_HAS_RESET_CONTROLLER
Gabor Juhosd4a67d92011-01-04 21:28:14 +0100245 select BOOT_RAW
246 select CEVT_R4K
247 select CSRC_R4K
248 select DMA_NONCOHERENT
Linus Walleijd30a2b42016-04-19 11:23:22 +0200249 select GPIOLIB
John Crispina08227a2018-07-20 13:58:20 +0200250 select PINCTRL
Alban Bedel411520a2015-04-19 14:30:04 +0200251 select COMMON_CLK
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200252 select IRQ_MIPS_CPU
Gabor Juhosd4a67d92011-01-04 21:28:14 +0100253 select SYS_HAS_CPU_MIPS32_R2
254 select SYS_HAS_EARLY_PRINTK
255 select SYS_SUPPORTS_32BIT_KERNEL
256 select SYS_SUPPORTS_BIG_ENDIAN
Ralf Baechle377cb1b2014-04-29 01:49:24 +0200257 select SYS_SUPPORTS_MIPS16
Alban Bedelb3f0a252016-01-26 09:38:29 +0100258 select SYS_SUPPORTS_ZBOOT_UART_PROM
Alban Bedel03c8c402015-05-31 01:52:25 +0200259 select USE_OF
Alban Bedel53d473f2018-03-24 23:47:22 +0100260 select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM
Gabor Juhosd4a67d92011-01-04 21:28:14 +0100261 help
262 Support for the Atheros AR71XX/AR724X/AR913X SoCs.
263
Kevin Cernekee5f2d4452014-12-25 09:49:00 -0800264config BMIPS_GENERIC
265 bool "Broadcom Generic BMIPS kernel"
Álvaro Fernández Rojas29906e12020-06-17 12:50:33 +0200266 select ARCH_HAS_RESET_CONTROLLER
Christoph Hellwigd59098a2018-06-15 13:08:52 +0200267 select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
Kevin Cernekeed666cd02014-10-20 21:28:05 -0700268 select BOOT_RAW
269 select NO_EXCEPT_FILL
270 select USE_OF
271 select CEVT_R4K
272 select CSRC_R4K
273 select SYNC_R4K
274 select COMMON_CLK
Simon Arlottc7c42ec2015-11-22 14:30:14 +0000275 select BCM6345_L1_IRQ
Kevin Cernekee60b858f2014-12-25 09:49:17 -0800276 select BCM7038_L1_IRQ
277 select BCM7120_L2_IRQ
278 select BRCMSTB_L2_IRQ
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200279 select IRQ_MIPS_CPU
Kevin Cernekee60b858f2014-12-25 09:49:17 -0800280 select DMA_NONCOHERENT
Kevin Cernekeed666cd02014-10-20 21:28:05 -0700281 select SYS_SUPPORTS_32BIT_KERNEL
Kevin Cernekee60b858f2014-12-25 09:49:17 -0800282 select SYS_SUPPORTS_LITTLE_ENDIAN
Kevin Cernekeed666cd02014-10-20 21:28:05 -0700283 select SYS_SUPPORTS_BIG_ENDIAN
284 select SYS_SUPPORTS_HIGHMEM
Kevin Cernekee60b858f2014-12-25 09:49:17 -0800285 select SYS_HAS_CPU_BMIPS32_3300
286 select SYS_HAS_CPU_BMIPS4350
287 select SYS_HAS_CPU_BMIPS4380
Kevin Cernekeed666cd02014-10-20 21:28:05 -0700288 select SYS_HAS_CPU_BMIPS5000
289 select SWAP_IO_SPACE
Kevin Cernekee60b858f2014-12-25 09:49:17 -0800290 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
291 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
292 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
293 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
Justin Chen4dc47042017-05-24 10:55:16 -0700294 select HARDIRQS_SW_RESEND
Florian Fainelli1d987052021-11-08 11:24:31 -0800295 select HAVE_PCI
296 select PCI_DRIVERS_GENERIC
Kevin Cernekeed666cd02014-10-20 21:28:05 -0700297 help
Kevin Cernekee5f2d4452014-12-25 09:49:00 -0800298 Build a generic DT-based kernel image that boots on select
299 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
300 box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
301 must be set appropriately for your board.
Kevin Cernekeed666cd02014-10-20 21:28:05 -0700302
Aurelien Jarno1c0c13e2007-09-25 15:40:12 +0200303config BCM47XX
Florian Fainellic6193662010-03-25 11:42:41 +0100304 bool "Broadcom BCM47XX based boards"
Hauke Mehrtensfe08f8c2012-12-26 20:06:17 +0000305 select BOOT_RAW
Ralf Baechle42f77542007-10-18 17:48:11 +0100306 select CEVT_R4K
Ralf Baechle940f6b42007-11-24 22:33:28 +0000307 select CSRC_R4K
Aurelien Jarno1c0c13e2007-09-25 15:40:12 +0200308 select DMA_NONCOHERENT
Christoph Hellwigeb01d422018-11-15 20:05:32 +0100309 select HAVE_PCI
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200310 select IRQ_MIPS_CPU
Markos Chandras314878d2013-07-23 15:40:37 +0100311 select SYS_HAS_CPU_MIPS32_R1
Hauke Mehrtensdd54ded2012-12-26 20:06:18 +0000312 select NO_EXCEPT_FILL
Aurelien Jarno1c0c13e2007-09-25 15:40:12 +0200313 select SYS_SUPPORTS_32BIT_KERNEL
314 select SYS_SUPPORTS_LITTLE_ENDIAN
Ralf Baechle377cb1b2014-04-29 01:49:24 +0200315 select SYS_SUPPORTS_MIPS16
Aaro Koskinen65078312018-01-17 00:21:44 +0200316 select SYS_SUPPORTS_ZBOOT
Aurelien Jarno25e5fb92007-09-25 15:41:24 +0200317 select SYS_HAS_EARLY_PRINTK
Ralf Baechlee6086552014-03-26 21:40:25 +0100318 select USE_GENERIC_EARLY_PRINTK_8250
Rafał Miłeckic949c0b2014-06-17 16:36:50 +0200319 select GPIOLIB
320 select LEDS_GPIO_REGISTER
Rafał Miłeckif6e734a2015-06-10 23:05:08 +0200321 select BCM47XX_NVRAM
Rafał Miłecki2ab71a02016-01-25 09:50:29 +0100322 select BCM47XX_SPROM
Matt Redfearndfe00492017-11-14 17:16:27 +0000323 select BCM47XX_SSB if !BCM47XX_BCMA
Aurelien Jarno1c0c13e2007-09-25 15:40:12 +0200324 help
Enrico Weigelt, metux IT consult371a4152019-03-11 16:54:27 +0100325 Support for BCM47XX based boards
Aurelien Jarno1c0c13e2007-09-25 15:40:12 +0200326
Maxime Bizone7300d02009-08-18 13:23:37 +0100327config BCM63XX
328 bool "Broadcom BCM63XX based boards"
Florian Fainelliae8de612013-06-18 16:55:39 +0000329 select BOOT_RAW
Maxime Bizone7300d02009-08-18 13:23:37 +0100330 select CEVT_R4K
331 select CSRC_R4K
Jonas Gorskifc264022014-07-08 16:26:13 +0200332 select SYNC_R4K
Maxime Bizone7300d02009-08-18 13:23:37 +0100333 select DMA_NONCOHERENT
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200334 select IRQ_MIPS_CPU
Maxime Bizone7300d02009-08-18 13:23:37 +0100335 select SYS_SUPPORTS_32BIT_KERNEL
336 select SYS_SUPPORTS_BIG_ENDIAN
337 select SYS_HAS_EARLY_PRINTK
Randy Dunlap5eeaafc2021-11-06 08:49:11 -0700338 select SYS_HAS_CPU_BMIPS32_3300
339 select SYS_HAS_CPU_BMIPS4350
340 select SYS_HAS_CPU_BMIPS4380
Maxime Bizone7300d02009-08-18 13:23:37 +0100341 select SWAP_IO_SPACE
Linus Walleijd30a2b42016-04-19 11:23:22 +0200342 select GPIOLIB
Florian Fainelliaf2418b2014-01-14 09:54:40 -0800343 select MIPS_L1_CACHE_SHIFT_4
Stephen Boydbbd7ffd2020-04-08 23:44:13 -0700344 select HAVE_LEGACY_CLK
Maxime Bizone7300d02009-08-18 13:23:37 +0100345 help
Enrico Weigelt, metux IT consult371a4152019-03-11 16:54:27 +0100346 Support for BCM63XX based boards
Maxime Bizone7300d02009-08-18 13:23:37 +0100347
Linus Torvalds1da177e2005-04-16 15:20:36 -0700348config MIPS_COBALT
Martin Michlmayr3fa986f2006-05-09 23:34:53 +0200349 bool "Cobalt Server"
Ralf Baechle42f77542007-10-18 17:48:11 +0100350 select CEVT_R4K
Ralf Baechle940f6b42007-11-24 22:33:28 +0000351 select CSRC_R4K
Yoichi Yuasa1097c6a2007-10-22 19:43:15 +0900352 select CEVT_GT641XX
Linus Torvalds1da177e2005-04-16 15:20:36 -0700353 select DMA_NONCOHERENT
Christoph Hellwigeb01d422018-11-15 20:05:32 +0100354 select FORCE_PCI
Ralf Baechled865bea2007-10-11 23:46:10 +0100355 select I8253
Linus Torvalds1da177e2005-04-16 15:20:36 -0700356 select I8259
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200357 select IRQ_MIPS_CPU
Yoichi Yuasad5ab1a62007-09-13 23:51:26 +0900358 select IRQ_GT641XX
Yoichi Yuasa252161e2007-03-14 21:51:26 +0900359 select PCI_GT64XXX_PCI0
Ralf Baechle7cf80532005-10-20 22:33:09 +0100360 select SYS_HAS_CPU_NEVADA
Yoichi Yuasa0a22e0d2007-03-02 12:42:33 +0900361 select SYS_HAS_EARLY_PRINTK
Yoichi Yuasaed5ba2f2005-09-03 15:56:21 -0700362 select SYS_SUPPORTS_32BIT_KERNEL
Florian Fainelli0e8774b2008-01-15 19:42:57 +0100363 select SYS_SUPPORTS_64BIT_KERNEL
Ralf Baechle5e83d432005-10-29 19:32:41 +0100364 select SYS_SUPPORTS_LITTLE_ENDIAN
Ralf Baechlee6086552014-03-26 21:40:25 +0100365 select USE_GENERIC_EARLY_PRINTK_8250
Linus Torvalds1da177e2005-04-16 15:20:36 -0700366
367config MACH_DECSTATION
Martin Michlmayr3fa986f2006-05-09 23:34:53 +0200368 bool "DECstations"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700369 select BOOT_ELF32
Yoichi Yuasa6457d9f2008-04-25 12:11:44 +0900370 select CEVT_DS1287
Maciej W. Rozycki81d10ba2014-04-06 21:46:05 +0100371 select CEVT_R4K if CPU_R4X00
Yoichi Yuasa42474172008-04-24 09:48:40 +0900372 select CSRC_IOASIC
Maciej W. Rozycki81d10ba2014-04-06 21:46:05 +0100373 select CSRC_R4K if CPU_R4X00
Maciej W. Rozycki20d60d92007-10-23 12:43:11 +0100374 select CPU_DADDI_WORKAROUNDS if 64BIT
375 select CPU_R4000_WORKAROUNDS if 64BIT
376 select CPU_R4400_WORKAROUNDS if 64BIT
Linus Torvalds1da177e2005-04-16 15:20:36 -0700377 select DMA_NONCOHERENT
Uwe Kleine-Königce816fa2014-04-07 15:39:19 -0700378 select NO_IOPORT_MAP
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200379 select IRQ_MIPS_CPU
Ralf Baechle7cf80532005-10-20 22:33:09 +0100380 select SYS_HAS_CPU_R3000
381 select SYS_HAS_CPU_R4X00
Yoichi Yuasaed5ba2f2005-09-03 15:56:21 -0700382 select SYS_SUPPORTS_32BIT_KERNEL
Kees Cook7d607172013-01-16 18:53:19 -0800383 select SYS_SUPPORTS_64BIT_KERNEL
Ralf Baechle5e83d432005-10-29 19:32:41 +0100384 select SYS_SUPPORTS_LITTLE_ENDIAN
Atsushi Nemoto1723b4a2006-06-20 00:19:13 +0900385 select SYS_SUPPORTS_128HZ
386 select SYS_SUPPORTS_256HZ
387 select SYS_SUPPORTS_1024HZ
Florian Fainelli930beb52014-01-14 09:54:38 -0800388 select MIPS_L1_CACHE_SHIFT_4
Ralf Baechle5e83d432005-10-29 19:32:41 +0100389 help
Linus Torvalds1da177e2005-04-16 15:20:36 -0700390 This enables support for DEC's MIPS based workstations. For details
391 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
392 DECstation porting pages on <http://decstation.unix-ag.org/>.
393
394 If you have one of the following DECstation Models you definitely
395 want to choose R4xx0 for the CPU Type:
396
Ralf Baechle93088162007-08-29 14:21:45 +0100397 DECstation 5000/50
398 DECstation 5000/150
399 DECstation 5000/260
400 DECsystem 5900/260
Linus Torvalds1da177e2005-04-16 15:20:36 -0700401
402 otherwise choose R3000.
403
Ralf Baechle5e83d432005-10-29 19:32:41 +0100404config MACH_JAZZ
Martin Michlmayr3fa986f2006-05-09 23:34:53 +0200405 bool "Jazz family of machines"
Thomas Bogendoerfer39b2d752019-10-09 15:27:14 +0200406 select ARC_MEMORY
407 select ARC_PROMLIB
Ralf Baechlea211a0822018-02-05 15:37:43 +0100408 select ARCH_MIGHT_HAVE_PC_PARPORT
Ralf Baechle7a407aa2018-02-05 16:40:00 +0100409 select ARCH_MIGHT_HAVE_PC_SERIO
Christoph Hellwig2f9237d2020-07-08 09:30:00 +0200410 select DMA_OPS
Ralf Baechle0e2794b2012-11-15 20:48:50 +0100411 select FW_ARC
412 select FW_ARC32
Ralf Baechle5e83d432005-10-29 19:32:41 +0100413 select ARCH_MAY_HAVE_PC_FDC
Ralf Baechle42f77542007-10-18 17:48:11 +0100414 select CEVT_R4K
Ralf Baechle940f6b42007-11-24 22:33:28 +0000415 select CSRC_R4K
Thomas Bogendoerfere2defae2007-12-02 13:00:32 +0100416 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
Ralf Baechle5e83d432005-10-29 19:32:41 +0100417 select GENERIC_ISA_DMA
Ralf Baechle8a118c32011-06-01 19:05:10 +0100418 select HAVE_PCSPKR_PLATFORM
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200419 select IRQ_MIPS_CPU
Ralf Baechled865bea2007-10-11 23:46:10 +0100420 select I8253
Ralf Baechle5e83d432005-10-29 19:32:41 +0100421 select I8259
422 select ISA
Ralf Baechle7cf80532005-10-20 22:33:09 +0100423 select SYS_HAS_CPU_R4X00
Ralf Baechle5e83d432005-10-29 19:32:41 +0100424 select SYS_SUPPORTS_32BIT_KERNEL
Kees Cook7d607172013-01-16 18:53:19 -0800425 select SYS_SUPPORTS_64BIT_KERNEL
Atsushi Nemoto1723b4a2006-06-20 00:19:13 +0900426 select SYS_SUPPORTS_100HZ
Arnd Bergmannaadfe4b2021-01-22 12:02:50 +0100427 select SYS_SUPPORTS_LITTLE_ENDIAN
Linus Torvalds1da177e2005-04-16 15:20:36 -0700428 help
Enrico Weigelt, metux IT consult371a4152019-03-11 16:54:27 +0100429 This a family of machines based on the MIPS R4030 chipset which was
430 used by several vendors to build RISC/os and Windows NT workstations.
431 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
432 Olivetti M700-10 workstations.
Ralf Baechle5e83d432005-10-29 19:32:41 +0100433
Paul Cercueilf0f4a752020-09-06 21:29:31 +0200434config MACH_INGENIC_SOC
Paul Burtonde361e82015-05-24 16:11:13 +0100435 bool "Ingenic SoC based machines"
Paul Cercueilf0f4a752020-09-06 21:29:31 +0200436 select MIPS_GENERIC
437 select MACH_INGENIC
Lluís Batlle i Rossellf9c9aff2012-03-30 16:48:05 +0200438 select SYS_SUPPORTS_ZBOOT_UART16550
Paul Cercueileb384932021-05-30 18:17:59 +0100439 select CPU_SUPPORTS_CPUFREQ
440 select MIPS_EXTERNAL_TIMER
Lars-Peter Clausen5ebabe52010-06-19 04:08:19 +0000441
John Crispin171bb2f2011-03-30 09:27:47 +0200442config LANTIQ
443 bool "Lantiq based platforms"
444 select DMA_NONCOHERENT
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200445 select IRQ_MIPS_CPU
John Crispin171bb2f2011-03-30 09:27:47 +0200446 select CEVT_R4K
447 select CSRC_R4K
448 select SYS_HAS_CPU_MIPS32_R1
449 select SYS_HAS_CPU_MIPS32_R2
450 select SYS_SUPPORTS_BIG_ENDIAN
451 select SYS_SUPPORTS_32BIT_KERNEL
Ralf Baechle377cb1b2014-04-29 01:49:24 +0200452 select SYS_SUPPORTS_MIPS16
John Crispin171bb2f2011-03-30 09:27:47 +0200453 select SYS_SUPPORTS_MULTITHREADING
James Hoganf35764e2018-01-15 20:54:35 +0000454 select SYS_SUPPORTS_VPE_LOADER
John Crispin171bb2f2011-03-30 09:27:47 +0200455 select SYS_HAS_EARLY_PRINTK
Linus Walleijd30a2b42016-04-19 11:23:22 +0200456 select GPIOLIB
John Crispin171bb2f2011-03-30 09:27:47 +0200457 select SWAP_IO_SPACE
458 select BOOT_RAW
Stephen Boydbbd7ffd2020-04-08 23:44:13 -0700459 select HAVE_LEGACY_CLK
John Crispina0392222012-04-13 20:56:13 +0200460 select USE_OF
John Crispin3f8c50c2012-08-28 12:44:59 +0200461 select PINCTRL
462 select PINCTRL_LANTIQ
John Crispinc5307812013-09-03 13:18:12 +0200463 select ARCH_HAS_RESET_CONTROLLER
464 select RESET_CONTROLLER
John Crispin171bb2f2011-03-30 09:27:47 +0200465
Huacai Chen30ad29b2015-04-21 10:00:35 +0800466config MACH_LOONGSON32
Huacai Chencaed1d12019-11-04 14:11:21 +0800467 bool "Loongson 32-bit family of machines"
Wu Zhangjinc7e8c662010-01-04 17:16:46 +0800468 select SYS_SUPPORTS_ZBOOT
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900469 help
Huacai Chen30ad29b2015-04-21 10:00:35 +0800470 This enables support for the Loongson-1 family of machines.
Wu Zhangjin85749d22009-07-02 23:26:45 +0800471
Huacai Chen30ad29b2015-04-21 10:00:35 +0800472 Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
473 the Institute of Computing Technology (ICT), Chinese Academy of
474 Sciences (CAS).
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900475
Jiaxun Yang71e2f4d2019-10-20 22:43:14 +0800476config MACH_LOONGSON2EF
477 bool "Loongson-2E/F family of machines"
Kelvin Cheungca585cf2012-07-25 16:17:24 +0200478 select SYS_SUPPORTS_ZBOOT
479 help
Jiaxun Yang71e2f4d2019-10-20 22:43:14 +0800480 This enables the support of early Loongson-2E/F family of machines.
Kelvin Cheungca585cf2012-07-25 16:17:24 +0200481
Jiaxun Yang71e2f4d2019-10-20 22:43:14 +0800482config MACH_LOONGSON64
Huacai Chencaed1d12019-11-04 14:11:21 +0800483 bool "Loongson 64-bit family of machines"
Jiaxun Yang6fbde6b2019-10-20 23:01:36 +0800484 select ARCH_SPARSEMEM_ENABLE
485 select ARCH_MIGHT_HAVE_PC_PARPORT
486 select ARCH_MIGHT_HAVE_PC_SERIO
487 select GENERIC_ISA_DMA_SUPPORT_BROKEN
488 select BOOT_ELF32
489 select BOARD_SCACHE
490 select CSRC_R4K
491 select CEVT_R4K
492 select CPU_HAS_WB
493 select FORCE_PCI
494 select ISA
495 select I8259
496 select IRQ_MIPS_CPU
Jiaxun Yang7d6d2832020-05-27 14:34:34 +0800497 select NO_EXCEPT_FILL
Tiezhu Yang5125bfe2020-03-31 15:00:06 +0800498 select NR_CPUS_DEFAULT_64
Jiaxun Yang6fbde6b2019-10-20 23:01:36 +0800499 select USE_GENERIC_EARLY_PRINTK_8250
Jiaxun Yang6423e592020-05-26 17:21:16 +0800500 select PCI_DRIVERS_GENERIC
Jiaxun Yang6fbde6b2019-10-20 23:01:36 +0800501 select SYS_HAS_CPU_LOONGSON64
502 select SYS_HAS_EARLY_PRINTK
503 select SYS_SUPPORTS_SMP
504 select SYS_SUPPORTS_HOTPLUG_CPU
505 select SYS_SUPPORTS_NUMA
506 select SYS_SUPPORTS_64BIT_KERNEL
507 select SYS_SUPPORTS_HIGHMEM
508 select SYS_SUPPORTS_LITTLE_ENDIAN
Jiaxun Yang71e2f4d2019-10-20 22:43:14 +0800509 select SYS_SUPPORTS_ZBOOT
Jinyang Hea307a4c2020-11-25 18:07:46 +0800510 select SYS_SUPPORTS_RELOCATABLE
Jiaxun Yang6fbde6b2019-10-20 23:01:36 +0800511 select ZONE_DMA32
Jiaxun Yang87fcfa72020-03-25 11:55:02 +0800512 select COMMON_CLK
513 select USE_OF
514 select BUILTIN_DTB
Huacai Chen39c14852020-07-29 14:58:37 +0800515 select PCI_HOST_GENERIC
Feiyang Chenf8f9f212022-03-19 17:40:02 +0800516 select HAVE_ARCH_NODEDATA_EXTENSION if NUMA
Jiaxun Yang71e2f4d2019-10-20 22:43:14 +0800517 help
Huacai Chencaed1d12019-11-04 14:11:21 +0800518 This enables the support of Loongson-2/3 family of machines.
519
520 Loongson-2 and Loongson-3 are 64-bit general-purpose processors with
521 GS264/GS464/GS464E/GS464V microarchitecture (except old Loongson-2E
522 and Loongson-2F which will be removed), developed by the Institute
523 of Computing Technology (ICT), Chinese Academy of Sciences (CAS).
Kelvin Cheungca585cf2012-07-25 16:17:24 +0200524
Linus Torvalds1da177e2005-04-16 15:20:36 -0700525config MIPS_MALTA
Martin Michlmayr3fa986f2006-05-09 23:34:53 +0200526 bool "MIPS Malta board"
Ralf Baechle61ed2422005-09-15 08:52:34 +0000527 select ARCH_MAY_HAVE_PC_FDC
Ralf Baechlea211a0822018-02-05 15:37:43 +0100528 select ARCH_MIGHT_HAVE_PC_PARPORT
Ralf Baechle7a407aa2018-02-05 16:40:00 +0100529 select ARCH_MIGHT_HAVE_PC_SERIO
Linus Torvalds1da177e2005-04-16 15:20:36 -0700530 select BOOT_ELF32
Ralf Baechlefa71c962008-01-29 10:15:00 +0000531 select BOOT_RAW
Paul Burtone8823d22015-05-22 16:51:02 +0100532 select BUILTIN_DTB
Ralf Baechle42f77542007-10-18 17:48:11 +0100533 select CEVT_R4K
Andrew Brestickerfa5635a2014-10-20 12:03:58 -0700534 select CLKSRC_MIPS_GIC
Guenter Roeck42b002a2015-08-22 02:40:41 -0700535 select COMMON_CLK
Maksym Kokhan47bf2b02018-11-12 19:00:59 +0200536 select CSRC_R4K
Christoph Hellwiga86497d2021-02-10 10:56:40 +0100537 select DMA_NONCOHERENT
Linus Torvalds1da177e2005-04-16 15:20:36 -0700538 select GENERIC_ISA_DMA
Ralf Baechle8a118c32011-06-01 19:05:10 +0100539 select HAVE_PCSPKR_PLATFORM
Christoph Hellwigeb01d422018-11-15 20:05:32 +0100540 select HAVE_PCI
Ralf Baechled865bea2007-10-11 23:46:10 +0100541 select I8253
Linus Torvalds1da177e2005-04-16 15:20:36 -0700542 select I8259
Maksym Kokhan47bf2b02018-11-12 19:00:59 +0200543 select IRQ_MIPS_CPU
Ralf Baechle5e83d432005-10-29 19:32:41 +0100544 select MIPS_BONITO64
Chris Dearman9318c512006-06-20 17:15:20 +0100545 select MIPS_CPU_SCACHE
Maksym Kokhan47bf2b02018-11-12 19:00:59 +0200546 select MIPS_GIC
Kevin Cernekeea7ef1ea2014-10-20 21:27:57 -0700547 select MIPS_L1_CACHE_SHIFT_6
Ralf Baechle5e83d432005-10-29 19:32:41 +0100548 select MIPS_MSC
Maksym Kokhan47bf2b02018-11-12 19:00:59 +0200549 select PCI_GT64XXX_PCI0
Paul Burtonecafe3e2015-09-22 11:58:43 -0700550 select SMP_UP if SMP
Linus Torvalds1da177e2005-04-16 15:20:36 -0700551 select SWAP_IO_SPACE
Ralf Baechle7cf80532005-10-20 22:33:09 +0100552 select SYS_HAS_CPU_MIPS32_R1
553 select SYS_HAS_CPU_MIPS32_R2
Markos Chandrasbfc3c5a2014-01-16 13:12:36 +0000554 select SYS_HAS_CPU_MIPS32_R3_5
Steven J. Hillc5b36782015-02-26 18:16:38 -0600555 select SYS_HAS_CPU_MIPS32_R5
Markos Chandras575509b2014-11-19 11:31:56 +0000556 select SYS_HAS_CPU_MIPS32_R6
Ralf Baechle7cf80532005-10-20 22:33:09 +0100557 select SYS_HAS_CPU_MIPS64_R1
Leonid Yegoshin5d9fbed2012-07-19 09:11:15 +0200558 select SYS_HAS_CPU_MIPS64_R2
Markos Chandras575509b2014-11-19 11:31:56 +0000559 select SYS_HAS_CPU_MIPS64_R6
Ralf Baechle7cf80532005-10-20 22:33:09 +0100560 select SYS_HAS_CPU_NEVADA
561 select SYS_HAS_CPU_RM7000
Yoichi Yuasaed5ba2f2005-09-03 15:56:21 -0700562 select SYS_SUPPORTS_32BIT_KERNEL
563 select SYS_SUPPORTS_64BIT_KERNEL
Ralf Baechle5e83d432005-10-29 19:32:41 +0100564 select SYS_SUPPORTS_BIG_ENDIAN
Steven J. Hillc5b36782015-02-26 18:16:38 -0600565 select SYS_SUPPORTS_HIGHMEM
Ralf Baechle5e83d432005-10-29 19:32:41 +0100566 select SYS_SUPPORTS_LITTLE_ENDIAN
Maciej W. Rozycki424ebcd2014-11-15 22:07:07 +0000567 select SYS_SUPPORTS_MICROMIPS
Maksym Kokhan47bf2b02018-11-12 19:00:59 +0200568 select SYS_SUPPORTS_MIPS16
Tim Anderson03650702009-06-17 16:22:53 -0700569 select SYS_SUPPORTS_MIPS_CMP
Paul Burtone56b6aa2014-01-15 10:31:56 +0000570 select SYS_SUPPORTS_MIPS_CPS
Ralf Baechlef41ae0b2006-06-05 17:24:46 +0100571 select SYS_SUPPORTS_MULTITHREADING
Maksym Kokhan47bf2b02018-11-12 19:00:59 +0200572 select SYS_SUPPORTS_RELOCATABLE
Franck Bui-Huu9693a852007-02-02 17:41:47 +0100573 select SYS_SUPPORTS_SMARTMIPS
James Hoganf35764e2018-01-15 20:54:35 +0000574 select SYS_SUPPORTS_VPE_LOADER
Wu Zhangjin1b93b3c2009-10-14 18:12:16 +0800575 select SYS_SUPPORTS_ZBOOT
Paul Burtone8823d22015-05-22 16:51:02 +0100576 select USE_OF
Thomas Bogendoerfer886ee132020-08-24 18:32:48 +0200577 select WAR_ICACHE_REFILLS
James Hoganabcc82b2015-04-27 15:07:19 +0100578 select ZONE_DMA32 if 64BIT
Linus Torvalds1da177e2005-04-16 15:20:36 -0700579 help
Maciej W. Rozyckif638d192005-02-02 22:23:46 +0000580 This enables support for the MIPS Technologies Malta evaluation
Linus Torvalds1da177e2005-04-16 15:20:36 -0700581 board.
582
Joshua Henderson2572f002016-01-13 18:15:39 -0700583config MACH_PIC32
584 bool "Microchip PIC32 Family"
585 help
586 This enables support for the Microchip PIC32 family of platforms.
587
588 Microchip PIC32 is a family of general-purpose 32 bit MIPS core
589 microcontrollers.
590
Ralf Baechle5e83d432005-10-29 19:32:41 +0100591config MACH_VR41XX
Yoichi Yuasa74142d62007-04-26 19:45:09 +0900592 bool "NEC VR4100 series based machines"
Ralf Baechle42f77542007-10-18 17:48:11 +0100593 select CEVT_R4K
Ralf Baechle940f6b42007-11-24 22:33:28 +0000594 select CSRC_R4K
Ralf Baechle7cf80532005-10-20 22:33:09 +0100595 select SYS_HAS_CPU_VR41XX
Ralf Baechle377cb1b2014-04-29 01:49:24 +0200596 select SYS_SUPPORTS_MIPS16
Linus Walleijd30a2b42016-04-19 11:23:22 +0200597 select GPIOLIB
Ralf Baechle5e83d432005-10-29 19:32:41 +0100598
Lauri Kasanenbaec9702021-01-13 17:11:23 +0200599config MACH_NINTENDO64
600 bool "Nintendo 64 console"
601 select CEVT_R4K
602 select CSRC_R4K
603 select SYS_HAS_CPU_R4300
604 select SYS_SUPPORTS_BIG_ENDIAN
605 select SYS_SUPPORTS_ZBOOT
606 select SYS_SUPPORTS_32BIT_KERNEL
607 select SYS_SUPPORTS_64BIT_KERNEL
608 select DMA_NONCOHERENT
609 select IRQ_MIPS_CPU
610
John Crispinae2b5bb2013-01-20 22:05:30 +0100611config RALINK
612 bool "Ralink based machines"
613 select CEVT_R4K
Arnd Bergmann35f752b2021-05-31 13:51:18 +0200614 select COMMON_CLK
John Crispinae2b5bb2013-01-20 22:05:30 +0100615 select CSRC_R4K
616 select BOOT_RAW
617 select DMA_NONCOHERENT
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200618 select IRQ_MIPS_CPU
John Crispinae2b5bb2013-01-20 22:05:30 +0100619 select USE_OF
620 select SYS_HAS_CPU_MIPS32_R1
621 select SYS_HAS_CPU_MIPS32_R2
622 select SYS_SUPPORTS_32BIT_KERNEL
623 select SYS_SUPPORTS_LITTLE_ENDIAN
Ralf Baechle377cb1b2014-04-29 01:49:24 +0200624 select SYS_SUPPORTS_MIPS16
Chuanhong Guo1f0400d2020-10-13 10:05:47 +0800625 select SYS_SUPPORTS_ZBOOT
John Crispinae2b5bb2013-01-20 22:05:30 +0100626 select SYS_HAS_EARLY_PRINTK
John Crispin2a153f12013-09-04 00:16:59 +0200627 select ARCH_HAS_RESET_CONTROLLER
628 select RESET_CONTROLLER
John Crispinae2b5bb2013-01-20 22:05:30 +0100629
Bert Vermeulen40421472021-01-19 10:21:07 +0100630config MACH_REALTEK_RTL
631 bool "Realtek RTL838x/RTL839x based machines"
632 select MIPS_GENERIC
633 select DMA_NONCOHERENT
634 select IRQ_MIPS_CPU
635 select CSRC_R4K
636 select CEVT_R4K
637 select SYS_HAS_CPU_MIPS32_R1
638 select SYS_HAS_CPU_MIPS32_R2
639 select SYS_SUPPORTS_BIG_ENDIAN
640 select SYS_SUPPORTS_32BIT_KERNEL
641 select SYS_SUPPORTS_MIPS16
642 select SYS_SUPPORTS_MULTITHREADING
643 select SYS_SUPPORTS_VPE_LOADER
Bert Vermeulen40421472021-01-19 10:21:07 +0100644 select BOOT_RAW
645 select PINCTRL
646 select USE_OF
647
Linus Torvalds1da177e2005-04-16 15:20:36 -0700648config SGI_IP22
Martin Michlmayr3fa986f2006-05-09 23:34:53 +0200649 bool "SGI IP22 (Indy/Indigo2)"
Thomas Bogendoerferc0de00b2019-10-09 15:27:17 +0200650 select ARC_MEMORY
Thomas Bogendoerfer39b2d752019-10-09 15:27:14 +0200651 select ARC_PROMLIB
Ralf Baechle0e2794b2012-11-15 20:48:50 +0100652 select FW_ARC
653 select FW_ARC32
Ralf Baechle7a407aa2018-02-05 16:40:00 +0100654 select ARCH_MIGHT_HAVE_PC_SERIO
Linus Torvalds1da177e2005-04-16 15:20:36 -0700655 select BOOT_ELF32
Ralf Baechle42f77542007-10-18 17:48:11 +0100656 select CEVT_R4K
Ralf Baechle940f6b42007-11-24 22:33:28 +0000657 select CSRC_R4K
Thomas Bogendoerfere2defae2007-12-02 13:00:32 +0100658 select DEFAULT_SGI_PARTITION
Linus Torvalds1da177e2005-04-16 15:20:36 -0700659 select DMA_NONCOHERENT
Christoph Hellwig6630a8e2018-11-15 20:05:37 +0100660 select HAVE_EISA
Ralf Baechled865bea2007-10-11 23:46:10 +0100661 select I8253
Thomas Bogendoerfer68de4802007-11-23 20:34:16 +0100662 select I8259
Linus Torvalds1da177e2005-04-16 15:20:36 -0700663 select IP22_CPU_SCACHE
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200664 select IRQ_MIPS_CPU
Ralf Baechleaa414df2006-11-30 01:14:51 +0000665 select GENERIC_ISA_DMA_SUPPORT_BROKEN
Thomas Bogendoerfere2defae2007-12-02 13:00:32 +0100666 select SGI_HAS_I8042
667 select SGI_HAS_INDYDOG
Thomas Bogendoerfer36e5c212008-07-16 14:06:15 +0200668 select SGI_HAS_HAL2
Thomas Bogendoerfere2defae2007-12-02 13:00:32 +0100669 select SGI_HAS_SEEQ
670 select SGI_HAS_WD93
671 select SGI_HAS_ZILOG
Linus Torvalds1da177e2005-04-16 15:20:36 -0700672 select SWAP_IO_SPACE
Ralf Baechle7cf80532005-10-20 22:33:09 +0100673 select SYS_HAS_CPU_R4X00
674 select SYS_HAS_CPU_R5000
Thomas Bogendoerferc0de00b2019-10-09 15:27:17 +0200675 select SYS_HAS_EARLY_PRINTK
Yoichi Yuasaed5ba2f2005-09-03 15:56:21 -0700676 select SYS_SUPPORTS_32BIT_KERNEL
677 select SYS_SUPPORTS_64BIT_KERNEL
Ralf Baechle5e83d432005-10-29 19:32:41 +0100678 select SYS_SUPPORTS_BIG_ENDIAN
Thomas Bogendoerfer802b83622020-08-24 18:32:43 +0200679 select WAR_R4600_V1_INDEX_ICACHEOP
Thomas Bogendoerfer5e5b6522020-08-24 18:32:44 +0200680 select WAR_R4600_V1_HIT_CACHEOP
Thomas Bogendoerfer44def342020-08-24 18:32:45 +0200681 select WAR_R4600_V2_HIT_CACHEOP
Florian Fainelli930beb52014-01-14 09:54:38 -0800682 select MIPS_L1_CACHE_SHIFT_7
Linus Torvalds1da177e2005-04-16 15:20:36 -0700683 help
684 This are the SGI Indy, Challenge S and Indigo2, as well as certain
685 OEM variants like the Tandem CMN B006S. To compile a Linux kernel
686 that runs on these, say Y here.
687
688config SGI_IP27
Martin Michlmayr3fa986f2006-05-09 23:34:53 +0200689 bool "SGI IP27 (Origin200/2000)"
Christoph Hellwig54aed4d2018-06-15 13:08:44 +0200690 select ARCH_HAS_PHYS_TO_DMA
Mike Rapoport397dc002019-09-16 14:13:10 +0300691 select ARCH_SPARSEMEM_ENABLE
Ralf Baechle0e2794b2012-11-15 20:48:50 +0100692 select FW_ARC
693 select FW_ARC64
Thomas Bogendoerfere9422422019-10-22 18:13:15 +0200694 select ARC_CMDLINE_ONLY
Ralf Baechle5e83d432005-10-29 19:32:41 +0100695 select BOOT_ELF64
Thomas Bogendoerfere2defae2007-12-02 13:00:32 +0100696 select DEFAULT_SGI_PARTITION
Christoph Hellwig04100452021-03-01 08:38:32 +0100697 select FORCE_PCI
Ralf Baechle36a88532007-03-01 11:56:43 +0000698 select SYS_HAS_EARLY_PRINTK
Christoph Hellwigeb01d422018-11-15 20:05:32 +0100699 select HAVE_PCI
Thomas Bogendoerfer69a07a42019-02-19 16:57:20 +0100700 select IRQ_MIPS_CPU
Thomas Bogendoerfere6308b62019-05-07 23:09:15 +0200701 select IRQ_DOMAIN_HIERARCHY
Ralf Baechle130e2fb2007-02-06 16:53:15 +0000702 select NR_CPUS_DEFAULT_64
Thomas Bogendoerfera57140e2019-05-07 23:09:13 +0200703 select PCI_DRIVERS_GENERIC
704 select PCI_XTALK_BRIDGE
Ralf Baechle7cf80532005-10-20 22:33:09 +0100705 select SYS_HAS_CPU_R10000
Yoichi Yuasaed5ba2f2005-09-03 15:56:21 -0700706 select SYS_SUPPORTS_64BIT_KERNEL
Ralf Baechle5e83d432005-10-29 19:32:41 +0100707 select SYS_SUPPORTS_BIG_ENDIAN
Ralf Baechled8cb4e12006-06-11 23:03:08 +0100708 select SYS_SUPPORTS_NUMA
Ralf Baechle1a5c5de2006-11-02 17:23:33 +0000709 select SYS_SUPPORTS_SMP
Thomas Bogendoerfer256ec482020-08-24 18:32:49 +0200710 select WAR_R10000_LLSC
Florian Fainelli930beb52014-01-14 09:54:38 -0800711 select MIPS_L1_CACHE_SHIFT_7
Mike Rapoport6c86a302020-08-05 15:51:41 +0300712 select NUMA
Feiyang Chenf8f9f212022-03-19 17:40:02 +0800713 select HAVE_ARCH_NODEDATA_EXTENSION
Linus Torvalds1da177e2005-04-16 15:20:36 -0700714 help
715 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
716 workstations. To compile a Linux kernel that runs on these, say Y
717 here.
718
Thomas Bogendoerfere2defae2007-12-02 13:00:32 +0100719config SGI_IP28
Kees Cook7d607172013-01-16 18:53:19 -0800720 bool "SGI IP28 (Indigo2 R10k)"
Thomas Bogendoerferc0de00b2019-10-09 15:27:17 +0200721 select ARC_MEMORY
Thomas Bogendoerfer39b2d752019-10-09 15:27:14 +0200722 select ARC_PROMLIB
Ralf Baechle0e2794b2012-11-15 20:48:50 +0100723 select FW_ARC
724 select FW_ARC64
Ralf Baechle7a407aa2018-02-05 16:40:00 +0100725 select ARCH_MIGHT_HAVE_PC_SERIO
Thomas Bogendoerfere2defae2007-12-02 13:00:32 +0100726 select BOOT_ELF64
727 select CEVT_R4K
728 select CSRC_R4K
729 select DEFAULT_SGI_PARTITION
730 select DMA_NONCOHERENT
731 select GENERIC_ISA_DMA_SUPPORT_BROKEN
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200732 select IRQ_MIPS_CPU
Christoph Hellwig6630a8e2018-11-15 20:05:37 +0100733 select HAVE_EISA
Thomas Bogendoerfere2defae2007-12-02 13:00:32 +0100734 select I8253
735 select I8259
Thomas Bogendoerfere2defae2007-12-02 13:00:32 +0100736 select SGI_HAS_I8042
737 select SGI_HAS_INDYDOG
Thomas Bogendoerfer5b438c42008-07-10 20:29:55 +0200738 select SGI_HAS_HAL2
Thomas Bogendoerfere2defae2007-12-02 13:00:32 +0100739 select SGI_HAS_SEEQ
740 select SGI_HAS_WD93
741 select SGI_HAS_ZILOG
742 select SWAP_IO_SPACE
743 select SYS_HAS_CPU_R10000
Thomas Bogendoerferc0de00b2019-10-09 15:27:17 +0200744 select SYS_HAS_EARLY_PRINTK
Thomas Bogendoerfere2defae2007-12-02 13:00:32 +0100745 select SYS_SUPPORTS_64BIT_KERNEL
746 select SYS_SUPPORTS_BIG_ENDIAN
Thomas Bogendoerfer256ec482020-08-24 18:32:49 +0200747 select WAR_R10000_LLSC
Thomas Bogendoerferdc24d68d2014-08-19 22:00:07 +0200748 select MIPS_L1_CACHE_SHIFT_7
Enrico Weigelt, metux IT consult371a4152019-03-11 16:54:27 +0100749 help
750 This is the SGI Indigo2 with R10000 processor. To compile a Linux
751 kernel that runs on these, say Y here.
Thomas Bogendoerfere2defae2007-12-02 13:00:32 +0100752
Thomas Bogendoerfer75055762019-10-24 12:18:29 +0200753config SGI_IP30
754 bool "SGI IP30 (Octane/Octane2)"
755 select ARCH_HAS_PHYS_TO_DMA
756 select FW_ARC
757 select FW_ARC64
758 select BOOT_ELF64
759 select CEVT_R4K
760 select CSRC_R4K
Christoph Hellwig04100452021-03-01 08:38:32 +0100761 select FORCE_PCI
Thomas Bogendoerfer75055762019-10-24 12:18:29 +0200762 select SYNC_R4K if SMP
763 select ZONE_DMA32
764 select HAVE_PCI
765 select IRQ_MIPS_CPU
766 select IRQ_DOMAIN_HIERARCHY
Thomas Bogendoerfer75055762019-10-24 12:18:29 +0200767 select PCI_DRIVERS_GENERIC
768 select PCI_XTALK_BRIDGE
769 select SYS_HAS_EARLY_PRINTK
770 select SYS_HAS_CPU_R10000
771 select SYS_SUPPORTS_64BIT_KERNEL
772 select SYS_SUPPORTS_BIG_ENDIAN
773 select SYS_SUPPORTS_SMP
Thomas Bogendoerfer256ec482020-08-24 18:32:49 +0200774 select WAR_R10000_LLSC
Thomas Bogendoerfer75055762019-10-24 12:18:29 +0200775 select MIPS_L1_CACHE_SHIFT_7
776 select ARC_MEMORY
777 help
778 These are the SGI Octane and Octane2 graphics workstations. To
779 compile a Linux kernel that runs on these, say Y here.
780
Linus Torvalds1da177e2005-04-16 15:20:36 -0700781config SGI_IP32
Ralf Baechlecfd2afc2007-07-10 17:33:00 +0100782 bool "SGI IP32 (O2)"
Thomas Bogendoerfer39b2d752019-10-09 15:27:14 +0200783 select ARC_MEMORY
784 select ARC_PROMLIB
Christoph Hellwig03df8222018-06-15 13:08:48 +0200785 select ARCH_HAS_PHYS_TO_DMA
Ralf Baechle0e2794b2012-11-15 20:48:50 +0100786 select FW_ARC
787 select FW_ARC32
Linus Torvalds1da177e2005-04-16 15:20:36 -0700788 select BOOT_ELF32
Ralf Baechle42f77542007-10-18 17:48:11 +0100789 select CEVT_R4K
Ralf Baechle940f6b42007-11-24 22:33:28 +0000790 select CSRC_R4K
Linus Torvalds1da177e2005-04-16 15:20:36 -0700791 select DMA_NONCOHERENT
Christoph Hellwigeb01d422018-11-15 20:05:32 +0100792 select HAVE_PCI
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200793 select IRQ_MIPS_CPU
Linus Torvalds1da177e2005-04-16 15:20:36 -0700794 select R5000_CPU_SCACHE
795 select RM7000_CPU_SCACHE
Ralf Baechle7cf80532005-10-20 22:33:09 +0100796 select SYS_HAS_CPU_R5000
797 select SYS_HAS_CPU_R10000 if BROKEN
798 select SYS_HAS_CPU_RM7000
Ralf Baechledd2f18f2006-01-19 14:55:42 +0000799 select SYS_HAS_CPU_NEVADA
Yoichi Yuasaed5ba2f2005-09-03 15:56:21 -0700800 select SYS_SUPPORTS_64BIT_KERNEL
Ralf Baechle5e83d432005-10-29 19:32:41 +0100801 select SYS_SUPPORTS_BIG_ENDIAN
Thomas Bogendoerfer886ee132020-08-24 18:32:48 +0200802 select WAR_ICACHE_REFILLS
Linus Torvalds1da177e2005-04-16 15:20:36 -0700803 help
804 If you want this kernel to run on SGI O2 workstation, say Y here.
805
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900806config SIBYTE_CRHINE
807 bool "Sibyte BCM91120C-CRhine"
Ralf Baechle5e83d432005-10-29 19:32:41 +0100808 select BOOT_ELF32
Ralf Baechle5e83d432005-10-29 19:32:41 +0100809 select SIBYTE_BCM1120
810 select SWAP_IO_SPACE
Ralf Baechle7cf80532005-10-20 22:33:09 +0100811 select SYS_HAS_CPU_SB1
Ralf Baechle5e83d432005-10-29 19:32:41 +0100812 select SYS_SUPPORTS_BIG_ENDIAN
813 select SYS_SUPPORTS_LITTLE_ENDIAN
814
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900815config SIBYTE_CARMEL
816 bool "Sibyte BCM91120x-Carmel"
Ralf Baechle5e83d432005-10-29 19:32:41 +0100817 select BOOT_ELF32
Ralf Baechle5e83d432005-10-29 19:32:41 +0100818 select SIBYTE_BCM1120
819 select SWAP_IO_SPACE
Ralf Baechle7cf80532005-10-20 22:33:09 +0100820 select SYS_HAS_CPU_SB1
Ralf Baechle5e83d432005-10-29 19:32:41 +0100821 select SYS_SUPPORTS_BIG_ENDIAN
822 select SYS_SUPPORTS_LITTLE_ENDIAN
823
824config SIBYTE_CRHONE
Martin Michlmayr3fa986f2006-05-09 23:34:53 +0200825 bool "Sibyte BCM91125C-CRhone"
Ralf Baechle5e83d432005-10-29 19:32:41 +0100826 select BOOT_ELF32
Ralf Baechle5e83d432005-10-29 19:32:41 +0100827 select SIBYTE_BCM1125
828 select SWAP_IO_SPACE
Ralf Baechle7cf80532005-10-20 22:33:09 +0100829 select SYS_HAS_CPU_SB1
Ralf Baechle5e83d432005-10-29 19:32:41 +0100830 select SYS_SUPPORTS_BIG_ENDIAN
831 select SYS_SUPPORTS_HIGHMEM
832 select SYS_SUPPORTS_LITTLE_ENDIAN
833
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900834config SIBYTE_RHONE
835 bool "Sibyte BCM91125E-Rhone"
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900836 select BOOT_ELF32
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900837 select SIBYTE_BCM1125H
838 select SWAP_IO_SPACE
839 select SYS_HAS_CPU_SB1
840 select SYS_SUPPORTS_BIG_ENDIAN
841 select SYS_SUPPORTS_LITTLE_ENDIAN
842
843config SIBYTE_SWARM
844 bool "Sibyte BCM91250A-SWARM"
845 select BOOT_ELF32
Sebastian Andrzej Siewiorfcf3ca42010-04-18 15:26:36 +0200846 select HAVE_PATA_PLATFORM
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900847 select SIBYTE_SB1250
848 select SWAP_IO_SPACE
849 select SYS_HAS_CPU_SB1
850 select SYS_SUPPORTS_BIG_ENDIAN
851 select SYS_SUPPORTS_HIGHMEM
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900852 select SYS_SUPPORTS_LITTLE_ENDIAN
Ralf Baechlecce335a2007-11-03 02:05:43 +0000853 select ZONE_DMA32 if 64BIT
Maciej W. Rozyckie4849af2018-11-13 22:42:44 +0000854 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900855
856config SIBYTE_LITTLESUR
857 bool "Sibyte BCM91250C2-LittleSur"
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900858 select BOOT_ELF32
Sebastian Andrzej Siewiorfcf3ca42010-04-18 15:26:36 +0200859 select HAVE_PATA_PLATFORM
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900860 select SIBYTE_SB1250
861 select SWAP_IO_SPACE
862 select SYS_HAS_CPU_SB1
863 select SYS_SUPPORTS_BIG_ENDIAN
864 select SYS_SUPPORTS_HIGHMEM
865 select SYS_SUPPORTS_LITTLE_ENDIAN
Maciej W. Rozycki756d6d82018-11-13 22:42:37 +0000866 select ZONE_DMA32 if 64BIT
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900867
868config SIBYTE_SENTOSA
869 bool "Sibyte BCM91250E-Sentosa"
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900870 select BOOT_ELF32
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900871 select SIBYTE_SB1250
872 select SWAP_IO_SPACE
873 select SYS_HAS_CPU_SB1
874 select SYS_SUPPORTS_BIG_ENDIAN
875 select SYS_SUPPORTS_LITTLE_ENDIAN
Maciej W. Rozyckie4849af2018-11-13 22:42:44 +0000876 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900877
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900878config SIBYTE_BIGSUR
879 bool "Sibyte BCM91480B-BigSur"
880 select BOOT_ELF32
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900881 select NR_CPUS_DEFAULT_4
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900882 select SIBYTE_BCM1x80
883 select SWAP_IO_SPACE
884 select SYS_HAS_CPU_SB1
885 select SYS_SUPPORTS_BIG_ENDIAN
Ralf Baechle651194f2007-11-01 21:55:39 +0000886 select SYS_SUPPORTS_HIGHMEM
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900887 select SYS_SUPPORTS_LITTLE_ENDIAN
Ralf Baechlecce335a2007-11-03 02:05:43 +0000888 select ZONE_DMA32 if 64BIT
Maciej W. Rozyckie4849af2018-11-13 22:42:44 +0000889 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900890
Thomas Bogendoerfer14b36af2006-12-05 17:05:44 +0100891config SNI_RM
892 bool "SNI RM200/300/400"
Thomas Bogendoerfer39b2d752019-10-09 15:27:14 +0200893 select ARC_MEMORY
894 select ARC_PROMLIB
Ralf Baechle0e2794b2012-11-15 20:48:50 +0100895 select FW_ARC if CPU_LITTLE_ENDIAN
896 select FW_ARC32 if CPU_LITTLE_ENDIAN
Paul Bolleaaa9fad2013-03-25 09:39:54 +0000897 select FW_SNIPROM if CPU_BIG_ENDIAN
Ralf Baechle5e83d432005-10-29 19:32:41 +0100898 select ARCH_MAY_HAVE_PC_FDC
Ralf Baechlea211a0822018-02-05 15:37:43 +0100899 select ARCH_MIGHT_HAVE_PC_PARPORT
Ralf Baechle7a407aa2018-02-05 16:40:00 +0100900 select ARCH_MIGHT_HAVE_PC_SERIO
Ralf Baechle5e83d432005-10-29 19:32:41 +0100901 select BOOT_ELF32
Ralf Baechle42f77542007-10-18 17:48:11 +0100902 select CEVT_R4K
Ralf Baechle940f6b42007-11-24 22:33:28 +0000903 select CSRC_R4K
Thomas Bogendoerfere2defae2007-12-02 13:00:32 +0100904 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
Ralf Baechle5e83d432005-10-29 19:32:41 +0100905 select DMA_NONCOHERENT
906 select GENERIC_ISA_DMA
Christoph Hellwig6630a8e2018-11-15 20:05:37 +0100907 select HAVE_EISA
Ralf Baechle8a118c32011-06-01 19:05:10 +0100908 select HAVE_PCSPKR_PLATFORM
Christoph Hellwigeb01d422018-11-15 20:05:32 +0100909 select HAVE_PCI
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200910 select IRQ_MIPS_CPU
Ralf Baechled865bea2007-10-11 23:46:10 +0100911 select I8253
Ralf Baechle5e83d432005-10-29 19:32:41 +0100912 select I8259
913 select ISA
Thomas Bogendoerfer564c8362020-09-14 18:05:00 +0200914 select MIPS_L1_CACHE_SHIFT_6
Thomas Bogendoerfer4a0312fc2006-06-13 13:59:01 +0200915 select SWAP_IO_SPACE if CPU_BIG_ENDIAN
Ralf Baechle7cf80532005-10-20 22:33:09 +0100916 select SYS_HAS_CPU_R4X00
Thomas Bogendoerfer4a0312fc2006-06-13 13:59:01 +0200917 select SYS_HAS_CPU_R5000
Thomas Bogendoerferc066a322006-12-28 18:22:32 +0100918 select SYS_HAS_CPU_R10000
Thomas Bogendoerfer4a0312fc2006-06-13 13:59:01 +0200919 select R5000_CPU_SCACHE
Ralf Baechle36a88532007-03-01 11:56:43 +0000920 select SYS_HAS_EARLY_PRINTK
Yoichi Yuasaed5ba2f2005-09-03 15:56:21 -0700921 select SYS_SUPPORTS_32BIT_KERNEL
Kees Cook7d607172013-01-16 18:53:19 -0800922 select SYS_SUPPORTS_64BIT_KERNEL
Thomas Bogendoerfer4a0312fc2006-06-13 13:59:01 +0200923 select SYS_SUPPORTS_BIG_ENDIAN
Ralf Baechle5e83d432005-10-29 19:32:41 +0100924 select SYS_SUPPORTS_HIGHMEM
925 select SYS_SUPPORTS_LITTLE_ENDIAN
Thomas Bogendoerfer44def342020-08-24 18:32:45 +0200926 select WAR_R4600_V2_HIT_CACHEOP
Linus Torvalds1da177e2005-04-16 15:20:36 -0700927 help
Thomas Bogendoerfer14b36af2006-12-05 17:05:44 +0100928 The SNI RM200/300/400 are MIPS-based machines manufactured by
929 Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
Ralf Baechle5e83d432005-10-29 19:32:41 +0100930 Technology and now in turn merged with Fujitsu. Say Y here to
931 support this machine type.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700932
Atsushi Nemotoedcaf1a2008-07-11 23:27:54 +0900933config MACH_TX49XX
934 bool "Toshiba TX49 series based machines"
Thomas Bogendoerfer24a1c022020-08-24 18:32:47 +0200935 select WAR_TX49XX_ICACHE_INDEX_INV
Ralf Baechle23fbee92005-07-25 22:45:45 +0000936
Ralf Baechle73b43902008-07-16 16:12:25 +0100937config MIKROTIK_RB532
938 bool "Mikrotik RB532 boards"
939 select CEVT_R4K
940 select CSRC_R4K
941 select DMA_NONCOHERENT
Christoph Hellwigeb01d422018-11-15 20:05:32 +0100942 select HAVE_PCI
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200943 select IRQ_MIPS_CPU
Ralf Baechle73b43902008-07-16 16:12:25 +0100944 select SYS_HAS_CPU_MIPS32_R1
945 select SYS_SUPPORTS_32BIT_KERNEL
946 select SYS_SUPPORTS_LITTLE_ENDIAN
947 select SWAP_IO_SPACE
948 select BOOT_RAW
Linus Walleijd30a2b42016-04-19 11:23:22 +0200949 select GPIOLIB
Florian Fainelli930beb52014-01-14 09:54:38 -0800950 select MIPS_L1_CACHE_SHIFT_4
Ralf Baechle73b43902008-07-16 16:12:25 +0100951 help
952 Support the Mikrotik(tm) RouterBoard 532 series,
953 based on the IDT RC32434 SoC.
954
David Daney9ddebc42013-05-22 15:10:46 +0000955config CAVIUM_OCTEON_SOC
956 bool "Cavium Networks Octeon SoC based boards"
David Daneya86c7f72008-12-11 15:33:38 -0800957 select CEVT_R4K
Christoph Hellwigea8c64a2018-01-10 16:21:13 +0100958 select ARCH_HAS_PHYS_TO_DMA
Christoph Hellwig1753d502018-11-15 20:05:36 +0100959 select HAVE_RAPIDIO
Christoph Hellwigd4a451d2018-04-03 16:24:20 +0200960 select PHYS_ADDR_T_64BIT
David Daneya86c7f72008-12-11 15:33:38 -0800961 select SYS_SUPPORTS_64BIT_KERNEL
962 select SYS_SUPPORTS_BIG_ENDIAN
Ralf Baechlef65aad42012-10-17 00:39:09 +0200963 select EDAC_SUPPORT
Borislav Petkovb01aec92015-05-21 19:59:31 +0200964 select EDAC_ATOMIC_SCRUB
David Daney73569d82015-03-20 19:11:58 +0300965 select SYS_SUPPORTS_LITTLE_ENDIAN
966 select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
David Daneya86c7f72008-12-11 15:33:38 -0800967 select SYS_HAS_EARLY_PRINTK
David Daney5e6833892009-02-02 11:30:59 -0800968 select SYS_HAS_CPU_CAVIUM_OCTEON
Christoph Hellwigeb01d422018-11-15 20:05:32 +0100969 select HAVE_PCI
Masahiro Yamada78bdbba2020-03-25 16:45:29 +0900970 select HAVE_PLAT_DELAY
971 select HAVE_PLAT_FW_INIT_CMDLINE
972 select HAVE_PLAT_MEMCPY
David Daneyf00e0012010-10-01 13:27:30 -0700973 select ZONE_DMA32
Linus Walleijd30a2b42016-04-19 11:23:22 +0200974 select GPIOLIB
David Daney6e511162014-05-28 23:52:05 +0200975 select USE_OF
976 select ARCH_SPARSEMEM_ENABLE
977 select SYS_SUPPORTS_SMP
David Daney7820b842017-09-28 12:34:04 -0500978 select NR_CPUS_DEFAULT_64
979 select MIPS_NR_CPU_NR_MAP_1024
Andrew Brestickere3264792014-08-21 13:04:22 -0700980 select BUILTIN_DTB
Julian Brahaf766b282021-03-26 01:34:56 -0400981 select MTD
David Daney8c1e6b12015-03-05 17:31:30 +0300982 select MTD_COMPLEX_MAPPINGS
Christoph Hellwig09230cb2018-04-24 09:00:54 +0200983 select SWIOTLB
Steven J. Hill3ff72be2016-12-13 14:25:37 -0600984 select SYS_SUPPORTS_RELOCATABLE
David Daneya86c7f72008-12-11 15:33:38 -0800985 help
986 This option supports all of the Octeon reference boards from Cavium
987 Networks. It builds a kernel that dynamically determines the Octeon
988 CPU type and supports all known board reference implementations.
989 Some of the supported boards are:
990 EBT3000
991 EBH3000
992 EBH3100
993 Thunder
994 Kodama
995 Hikari
996 Say Y here for most Octeon reference boards.
997
Linus Torvalds1da177e2005-04-16 15:20:36 -0700998endchoice
999
Ralf Baechlee8c7c482008-09-16 19:12:16 +02001000source "arch/mips/alchemy/Kconfig"
Sergey Ryazanov3b12308f2014-10-29 03:18:39 +04001001source "arch/mips/ath25/Kconfig"
Gabor Juhosd4a67d92011-01-04 21:28:14 +01001002source "arch/mips/ath79/Kconfig"
Hauke Mehrtensa656ffc2011-07-23 01:20:13 +02001003source "arch/mips/bcm47xx/Kconfig"
Maxime Bizone7300d02009-08-18 13:23:37 +01001004source "arch/mips/bcm63xx/Kconfig"
Kevin Cernekee8945e372014-12-25 09:49:20 -08001005source "arch/mips/bmips/Kconfig"
Paul Burtoneed0eab2016-10-05 18:18:20 +01001006source "arch/mips/generic/Kconfig"
Paul Cercueila103e9b2020-09-06 21:29:33 +02001007source "arch/mips/ingenic/Kconfig"
Ralf Baechle5e83d432005-10-29 19:32:41 +01001008source "arch/mips/jazz/Kconfig"
John Crispin8ec6d932011-03-30 09:27:48 +02001009source "arch/mips/lantiq/Kconfig"
Joshua Henderson2572f002016-01-13 18:15:39 -07001010source "arch/mips/pic32/Kconfig"
John Crispinae2b5bb2013-01-20 22:05:30 +01001011source "arch/mips/ralink/Kconfig"
Ralf Baechle29c48692005-02-07 01:27:14 +00001012source "arch/mips/sgi-ip27/Kconfig"
Ralf Baechle38b18f722005-02-03 14:28:23 +00001013source "arch/mips/sibyte/Kconfig"
Atsushi Nemoto22b1d702008-07-11 00:31:36 +09001014source "arch/mips/txx9/Kconfig"
Ralf Baechle5e83d432005-10-29 19:32:41 +01001015source "arch/mips/vr41xx/Kconfig"
David Daneya86c7f72008-12-11 15:33:38 -08001016source "arch/mips/cavium-octeon/Kconfig"
Jiaxun Yang71e2f4d2019-10-20 22:43:14 +08001017source "arch/mips/loongson2ef/Kconfig"
Huacai Chen30ad29b2015-04-21 10:00:35 +08001018source "arch/mips/loongson32/Kconfig"
1019source "arch/mips/loongson64/Kconfig"
Ralf Baechle38b18f722005-02-03 14:28:23 +00001020
Ralf Baechle5e83d432005-10-29 19:32:41 +01001021endmenu
1022
Akinobu Mita3c9ee7e2006-03-26 01:39:30 -08001023config GENERIC_HWEIGHT
1024 bool
1025 default y
1026
Linus Torvalds1da177e2005-04-16 15:20:36 -07001027config GENERIC_CALIBRATE_DELAY
1028 bool
1029 default y
1030
Ingo Molnarae1e9132008-11-11 09:05:16 +01001031config SCHED_OMIT_FRAME_POINTER
Atsushi Nemoto1cc89032006-04-04 13:11:45 +09001032 bool
1033 default y
1034
Linus Torvalds1da177e2005-04-16 15:20:36 -07001035#
1036# Select some configuration options automatically based on user selections.
1037#
Ralf Baechle0e2794b2012-11-15 20:48:50 +01001038config FW_ARC
Linus Torvalds1da177e2005-04-16 15:20:36 -07001039 bool
Linus Torvalds1da177e2005-04-16 15:20:36 -07001040
Ralf Baechle61ed2422005-09-15 08:52:34 +00001041config ARCH_MAY_HAVE_PC_FDC
1042 bool
1043
Marc St-Jean9267a302007-06-14 15:55:31 -06001044config BOOT_RAW
1045 bool
1046
Ralf Baechle217dd112007-11-01 01:57:55 +00001047config CEVT_BCM1480
1048 bool
1049
Yoichi Yuasa6457d9f2008-04-25 12:11:44 +09001050config CEVT_DS1287
1051 bool
1052
Yoichi Yuasa1097c6a2007-10-22 19:43:15 +09001053config CEVT_GT641XX
1054 bool
1055
Ralf Baechle42f77542007-10-18 17:48:11 +01001056config CEVT_R4K
1057 bool
1058
Ralf Baechle217dd112007-11-01 01:57:55 +00001059config CEVT_SB1250
1060 bool
1061
Atsushi Nemoto229f7732007-10-25 01:34:09 +09001062config CEVT_TXX9
1063 bool
1064
Ralf Baechle217dd112007-11-01 01:57:55 +00001065config CSRC_BCM1480
1066 bool
1067
Yoichi Yuasa42474172008-04-24 09:48:40 +09001068config CSRC_IOASIC
1069 bool
1070
Ralf Baechle940f6b42007-11-24 22:33:28 +00001071config CSRC_R4K
Serge Semin38586422020-05-21 17:07:23 +03001072 select CLOCKSOURCE_WATCHDOG if CPU_FREQ
Ralf Baechle940f6b42007-11-24 22:33:28 +00001073 bool
1074
Ralf Baechle217dd112007-11-01 01:57:55 +00001075config CSRC_SB1250
1076 bool
1077
Alex Smitha7f4df42015-10-21 09:57:44 +01001078config MIPS_CLOCK_VSYSCALL
1079 def_bool CSRC_R4K || CLKSRC_MIPS_GIC
1080
Atsushi Nemotoa9aec7f2008-04-05 00:55:41 +09001081config GPIO_TXX9
Linus Walleijd30a2b42016-04-19 11:23:22 +02001082 select GPIOLIB
Atsushi Nemotoa9aec7f2008-04-05 00:55:41 +09001083 bool
1084
Ralf Baechle0e2794b2012-11-15 20:48:50 +01001085config FW_CFE
Aurelien Jarnodf78b5c2007-09-05 08:58:26 +02001086 bool
1087
Ralf Baechle40e084a2015-07-29 22:44:53 +02001088config ARCH_SUPPORTS_UPROBES
1089 bool
1090
Paul Burton20d33062016-10-05 18:18:16 +01001091config DMA_PERDEV_COHERENT
1092 bool
Christoph Hellwig347cb6a2019-01-07 13:36:20 -05001093 select ARCH_HAS_SETUP_DMA_OPS
Christoph Hellwig5748e1b2018-08-16 16:47:53 +03001094 select DMA_NONCOHERENT
Paul Burton20d33062016-10-05 18:18:16 +01001095
Ralf Baechle4ce588c2005-09-03 15:56:19 -07001096config DMA_NONCOHERENT
1097 bool
Christoph Hellwigdb914272019-08-26 09:22:13 +02001098 #
1099 # MIPS allows mixing "slightly different" Cacheability and Coherency
1100 # Attribute bits. It is believed that the uncached access through
1101 # KSEG1 and the implementation specific "uncached accelerated" used
1102 # by pgprot_writcombine can be mixed, and the latter sometimes provides
1103 # significant advantages.
1104 #
Christoph Hellwig419e2f12019-08-26 09:03:44 +02001105 select ARCH_HAS_DMA_WRITE_COMBINE
Christoph Hellwigfa7e2242020-02-21 15:55:43 -08001106 select ARCH_HAS_DMA_PREP_COHERENT
Christoph Hellwigf8c55dc2018-06-15 13:08:46 +02001107 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
Christoph Hellwigfa7e2242020-02-21 15:55:43 -08001108 select ARCH_HAS_DMA_SET_UNCACHED
Christoph Hellwig34dc0ea2019-10-29 11:01:37 +01001109 select DMA_NONCOHERENT_MMAP
Christoph Hellwig34dc0ea2019-10-29 11:01:37 +01001110 select NEED_DMA_MAP_STATE
Ralf Baechle4ce588c2005-09-03 15:56:19 -07001111
Ralf Baechle36a88532007-03-01 11:56:43 +00001112config SYS_HAS_EARLY_PRINTK
Linus Torvalds1da177e2005-04-16 15:20:36 -07001113 bool
Linus Torvalds1da177e2005-04-16 15:20:36 -07001114
Ralf Baechle1b2bc752009-06-23 10:00:31 +01001115config SYS_SUPPORTS_HOTPLUG_CPU
Ralf Baechledbb74542007-08-07 14:52:17 +01001116 bool
Ralf Baechledbb74542007-08-07 14:52:17 +01001117
Linus Torvalds1da177e2005-04-16 15:20:36 -07001118config MIPS_BONITO64
1119 bool
Linus Torvalds1da177e2005-04-16 15:20:36 -07001120
1121config MIPS_MSC
1122 bool
Linus Torvalds1da177e2005-04-16 15:20:36 -07001123
Ralf Baechle39b8d522008-04-28 17:14:26 +01001124config SYNC_R4K
1125 bool
1126
Uwe Kleine-Königce816fa2014-04-07 15:39:19 -07001127config NO_IOPORT_MAP
Maciej W. Rozyckid388d682007-05-29 15:08:07 +01001128 def_bool n
1129
Markos Chandras4e0748f2014-11-13 11:25:27 +00001130config GENERIC_CSUM
Alexander Lobakin18d84e2e2020-01-22 13:58:50 +03001131 def_bool CPU_NO_LOAD_STORE_LR
Markos Chandras4e0748f2014-11-13 11:25:27 +00001132
Ralf Baechle8313da32007-08-24 16:48:30 +01001133config GENERIC_ISA_DMA
1134 bool
1135 select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
Namhyung Kima35bee82010-10-18 12:55:21 +09001136 select ISA_DMA_API
Ralf Baechle8313da32007-08-24 16:48:30 +01001137
Ralf Baechleaa414df2006-11-30 01:14:51 +00001138config GENERIC_ISA_DMA_SUPPORT_BROKEN
1139 bool
Ralf Baechle8313da32007-08-24 16:48:30 +01001140 select GENERIC_ISA_DMA
Ralf Baechleaa414df2006-11-30 01:14:51 +00001141
Masahiro Yamada78bdbba2020-03-25 16:45:29 +09001142config HAVE_PLAT_DELAY
1143 bool
1144
1145config HAVE_PLAT_FW_INIT_CMDLINE
1146 bool
1147
1148config HAVE_PLAT_MEMCPY
1149 bool
1150
Namhyung Kima35bee82010-10-18 12:55:21 +09001151config ISA_DMA_API
1152 bool
1153
Matt Redfearn8c530ea2016-03-31 10:05:39 +01001154config SYS_SUPPORTS_RELOCATABLE
1155 bool
1156 help
Enrico Weigelt, metux IT consult371a4152019-03-11 16:54:27 +01001157 Selected if the platform supports relocating the kernel.
1158 The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
1159 to allow access to command line and entropy sources.
Matt Redfearn8c530ea2016-03-31 10:05:39 +01001160
Ralf Baechle5e83d432005-10-29 19:32:41 +01001161#
Masanari Iida6b2aac42012-04-14 00:14:11 +09001162# Endianness selection. Sufficiently obscure so many users don't know what to
Ralf Baechle5e83d432005-10-29 19:32:41 +01001163# answer,so we try hard to limit the available choices. Also the use of a
1164# choice statement should be more obvious to the user.
1165#
1166choice
Masanari Iida6b2aac42012-04-14 00:14:11 +09001167 prompt "Endianness selection"
Linus Torvalds1da177e2005-04-16 15:20:36 -07001168 help
1169 Some MIPS machines can be configured for either little or big endian
Ralf Baechle5e83d432005-10-29 19:32:41 +01001170 byte order. These modes require different kernels and a different
Matt LaPlante3cb2fcc2006-11-30 05:22:59 +01001171 Linux distribution. In general there is one preferred byteorder for a
Ralf Baechle5e83d432005-10-29 19:32:41 +01001172 particular system but some systems are just as commonly used in the
David Sterba3dde6ad2007-05-09 07:12:20 +02001173 one or the other endianness.
Ralf Baechle5e83d432005-10-29 19:32:41 +01001174
1175config CPU_BIG_ENDIAN
1176 bool "Big endian"
1177 depends on SYS_SUPPORTS_BIG_ENDIAN
1178
1179config CPU_LITTLE_ENDIAN
1180 bool "Little endian"
1181 depends on SYS_SUPPORTS_LITTLE_ENDIAN
Ralf Baechle5e83d432005-10-29 19:32:41 +01001182
1183endchoice
1184
David Daney22b07632010-07-23 18:41:43 -07001185config EXPORT_UASM
1186 bool
1187
Ralf Baechle21162452007-02-09 17:08:58 +00001188config SYS_SUPPORTS_APM_EMULATION
1189 bool
1190
Ralf Baechle5e83d432005-10-29 19:32:41 +01001191config SYS_SUPPORTS_BIG_ENDIAN
1192 bool
1193
1194config SYS_SUPPORTS_LITTLE_ENDIAN
1195 bool
Linus Torvalds1da177e2005-04-16 15:20:36 -07001196
David Daneyaa1762f2012-10-17 00:48:10 +02001197config MIPS_HUGE_TLB_SUPPORT
1198 def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
1199
Marc St-Jean9267a302007-06-14 15:55:31 -06001200config IRQ_MSP_SLP
1201 bool
1202
1203config IRQ_MSP_CIC
1204 bool
1205
Atsushi Nemoto8420fd02007-08-02 23:35:53 +09001206config IRQ_TXX9
1207 bool
1208
Yoichi Yuasad5ab1a62007-09-13 23:51:26 +09001209config IRQ_GT641XX
1210 bool
1211
Yoichi Yuasa252161e2007-03-14 21:51:26 +09001212config PCI_GT64XXX_PCI0
Linus Torvalds1da177e2005-04-16 15:20:36 -07001213 bool
Linus Torvalds1da177e2005-04-16 15:20:36 -07001214
Thomas Bogendoerfera57140e2019-05-07 23:09:13 +02001215config PCI_XTALK_BRIDGE
1216 bool
1217
Marc St-Jean9267a302007-06-14 15:55:31 -06001218config NO_EXCEPT_FILL
1219 bool
1220
Markos Chandrasa7e07b12014-11-13 13:32:03 +00001221config MIPS_SPRAM
1222 bool
1223
Linus Torvalds1da177e2005-04-16 15:20:36 -07001224config SWAP_IO_SPACE
1225 bool
1226
Thomas Bogendoerfere2defae2007-12-02 13:00:32 +01001227config SGI_HAS_INDYDOG
1228 bool
1229
Thomas Bogendoerfer5b438c42008-07-10 20:29:55 +02001230config SGI_HAS_HAL2
1231 bool
1232
Thomas Bogendoerfere2defae2007-12-02 13:00:32 +01001233config SGI_HAS_SEEQ
1234 bool
1235
1236config SGI_HAS_WD93
1237 bool
1238
1239config SGI_HAS_ZILOG
1240 bool
1241
1242config SGI_HAS_I8042
1243 bool
1244
1245config DEFAULT_SGI_PARTITION
1246 bool
1247
Ralf Baechle0e2794b2012-11-15 20:48:50 +01001248config FW_ARC32
Ralf Baechle5e83d432005-10-29 19:32:41 +01001249 bool
1250
Paul Bolleaaa9fad2013-03-25 09:39:54 +00001251config FW_SNIPROM
Thomas Bogendoerfer231a35d2008-01-04 23:31:07 +01001252 bool
1253
Linus Torvalds1da177e2005-04-16 15:20:36 -07001254config BOOT_ELF32
1255 bool
Linus Torvalds1da177e2005-04-16 15:20:36 -07001256
Florian Fainelli930beb52014-01-14 09:54:38 -08001257config MIPS_L1_CACHE_SHIFT_4
1258 bool
1259
1260config MIPS_L1_CACHE_SHIFT_5
1261 bool
1262
1263config MIPS_L1_CACHE_SHIFT_6
1264 bool
1265
1266config MIPS_L1_CACHE_SHIFT_7
1267 bool
1268
Linus Torvalds1da177e2005-04-16 15:20:36 -07001269config MIPS_L1_CACHE_SHIFT
1270 int
Florian Fainellia4c02012014-01-14 09:54:39 -08001271 default "7" if MIPS_L1_CACHE_SHIFT_7
Kevin Cernekee5432eeb2014-12-25 09:49:09 -08001272 default "6" if MIPS_L1_CACHE_SHIFT_6
1273 default "5" if MIPS_L1_CACHE_SHIFT_5
1274 default "4" if MIPS_L1_CACHE_SHIFT_4
Linus Torvalds1da177e2005-04-16 15:20:36 -07001275 default "5"
1276
Thomas Bogendoerfere9422422019-10-22 18:13:15 +02001277config ARC_CMDLINE_ONLY
1278 bool
1279
Linus Torvalds1da177e2005-04-16 15:20:36 -07001280config ARC_CONSOLE
1281 bool "ARC console support"
Thomas Bogendoerfere2defae2007-12-02 13:00:32 +01001282 depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001283
1284config ARC_MEMORY
1285 bool
Linus Torvalds1da177e2005-04-16 15:20:36 -07001286
1287config ARC_PROMLIB
1288 bool
Linus Torvalds1da177e2005-04-16 15:20:36 -07001289
Ralf Baechle0e2794b2012-11-15 20:48:50 +01001290config FW_ARC64
Linus Torvalds1da177e2005-04-16 15:20:36 -07001291 bool
Linus Torvalds1da177e2005-04-16 15:20:36 -07001292
1293config BOOT_ELF64
1294 bool
Linus Torvalds1da177e2005-04-16 15:20:36 -07001295
Linus Torvalds1da177e2005-04-16 15:20:36 -07001296menu "CPU selection"
1297
1298choice
1299 prompt "CPU type"
1300 default CPU_R4X00
1301
Jiaxun Yang268a2d62019-10-20 22:43:13 +08001302config CPU_LOONGSON64
Huacai Chencaed1d12019-11-04 14:11:21 +08001303 bool "Loongson 64-bit CPU"
Jiaxun Yang268a2d62019-10-20 22:43:13 +08001304 depends on SYS_HAS_CPU_LOONGSON64
Christoph Hellwigd3bc81b2018-06-15 13:08:41 +02001305 select ARCH_HAS_PHYS_TO_DMA
Jiaxun Yang51522212020-01-13 18:15:00 +08001306 select CPU_MIPSR2
1307 select CPU_HAS_PREFETCH
Huacai Chen0e476d92014-03-21 18:44:07 +08001308 select CPU_SUPPORTS_64BIT_KERNEL
1309 select CPU_SUPPORTS_HIGHMEM
1310 select CPU_SUPPORTS_HUGEPAGES
Huacai Chen75074452019-09-21 21:50:27 +08001311 select CPU_SUPPORTS_MSA
Jiaxun Yang51522212020-01-13 18:15:00 +08001312 select CPU_DIEI_BROKEN if !LOONGSON3_ENHANCEMENT
1313 select CPU_MIPSR2_IRQ_VI
Huacai Chen0e476d92014-03-21 18:44:07 +08001314 select WEAK_ORDERING
1315 select WEAK_REORDERING_BEYOND_LLSC
Huacai Chen75074452019-09-21 21:50:27 +08001316 select MIPS_ASID_BITS_VARIABLE
Huacai Chenb2edcfc2016-03-03 09:45:09 +08001317 select MIPS_PGD_C0_CONTEXT
Huacai Chen17c99d92017-03-16 21:00:28 +08001318 select MIPS_L1_CACHE_SHIFT_6
Jackie Liu7f3b3c22021-09-13 14:19:08 +08001319 select MIPS_FP_SUPPORT
Linus Walleijd30a2b42016-04-19 11:23:22 +02001320 select GPIOLIB
Christoph Hellwig09230cb2018-04-24 09:00:54 +02001321 select SWIOTLB
Huacai Chen0f783552020-05-23 15:56:41 +08001322 select HAVE_KVM
Huacai Chen0e476d92014-03-21 18:44:07 +08001323 help
Huacai Chencaed1d12019-11-04 14:11:21 +08001324 The Loongson GSx64(GS264/GS464/GS464E/GS464V) series of processor
1325 cores implements the MIPS64R2 instruction set with many extensions,
1326 including most 64-bit Loongson-2 (2H, 2K) and Loongson-3 (3A1000,
1327 3B1000, 3B1500, 3A2000, 3A3000 and 3A4000) processors. However, old
1328 Loongson-2E/2F is not covered here and will be removed in future.
Huacai Chen0e476d92014-03-21 18:44:07 +08001329
Huacai Chencaed1d12019-11-04 14:11:21 +08001330config LOONGSON3_ENHANCEMENT
1331 bool "New Loongson-3 CPU Enhancements"
Huacai Chen1e820da32016-03-03 09:45:13 +08001332 default n
Jiaxun Yang268a2d62019-10-20 22:43:13 +08001333 depends on CPU_LOONGSON64
Huacai Chen1e820da32016-03-03 09:45:13 +08001334 help
Huacai Chencaed1d12019-11-04 14:11:21 +08001335 New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A
Huacai Chen1e820da32016-03-03 09:45:13 +08001336 R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
Jiaxun Yang268a2d62019-10-20 22:43:13 +08001337 FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User
Huacai Chen1e820da32016-03-03 09:45:13 +08001338 Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
1339 Fast TLB refill support, etc.
1340
1341 This option enable those enhancements which are not probed at run
1342 time. If you want a generic kernel to run on all Loongson 3 machines,
1343 please say 'N' here. If you want a high-performance kernel to run on
Huacai Chencaed1d12019-11-04 14:11:21 +08001344 new Loongson-3 machines only, please say 'Y' here.
Huacai Chen1e820da32016-03-03 09:45:13 +08001345
Huacai Chene02e07e2019-01-15 16:04:54 +08001346config CPU_LOONGSON3_WORKAROUNDS
Xi Ruoyao3f059a72021-08-29 20:49:09 +08001347 bool "Loongson-3 LLSC Workarounds"
Huacai Chene02e07e2019-01-15 16:04:54 +08001348 default y if SMP
Jiaxun Yang268a2d62019-10-20 22:43:13 +08001349 depends on CPU_LOONGSON64
Huacai Chene02e07e2019-01-15 16:04:54 +08001350 help
Huacai Chencaed1d12019-11-04 14:11:21 +08001351 Loongson-3 processors have the llsc issues which require workarounds.
Huacai Chene02e07e2019-01-15 16:04:54 +08001352 Without workarounds the system may hang unexpectedly.
1353
Xi Ruoyao3f059a72021-08-29 20:49:09 +08001354 Say Y, unless you know what you are doing.
Huacai Chene02e07e2019-01-15 16:04:54 +08001355
WANG Xueruiec7a9312020-05-23 21:37:01 +08001356config CPU_LOONGSON3_CPUCFG_EMULATION
1357 bool "Emulate the CPUCFG instruction on older Loongson cores"
1358 default y
1359 depends on CPU_LOONGSON64
1360 help
1361 Loongson-3A R4 and newer have the CPUCFG instruction available for
1362 userland to query CPU capabilities, much like CPUID on x86. This
1363 option provides emulation of the instruction on older Loongson
1364 cores, back to Loongson-3A1000.
1365
1366 If unsure, please say Y.
1367
Wu Zhangjin3702bba2009-07-02 23:27:41 +08001368config CPU_LOONGSON2E
1369 bool "Loongson 2E"
1370 depends on SYS_HAS_CPU_LOONGSON2E
Jiaxun Yang268a2d62019-10-20 22:43:13 +08001371 select CPU_LOONGSON2EF
Fuxin Zhang2a21c732007-06-06 14:52:43 +08001372 help
1373 The Loongson 2E processor implements the MIPS III instruction set
1374 with many extensions.
1375
Lucas De Marchi25985ed2011-03-30 22:57:33 -03001376 It has an internal FPGA northbridge, which is compatible to
Wu Zhangjin6f7a2512009-11-06 18:45:05 +08001377 bonito64.
1378
1379config CPU_LOONGSON2F
1380 bool "Loongson 2F"
1381 depends on SYS_HAS_CPU_LOONGSON2F
Jiaxun Yang268a2d62019-10-20 22:43:13 +08001382 select CPU_LOONGSON2EF
Linus Walleijd30a2b42016-04-19 11:23:22 +02001383 select GPIOLIB
Wu Zhangjin6f7a2512009-11-06 18:45:05 +08001384 help
1385 The Loongson 2F processor implements the MIPS III instruction set
1386 with many extensions.
1387
1388 Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
1389 have a similar programming interface with FPGA northbridge used in
1390 Loongson2E.
1391
Kelvin Cheungca585cf2012-07-25 16:17:24 +02001392config CPU_LOONGSON1B
1393 bool "Loongson 1B"
1394 depends on SYS_HAS_CPU_LOONGSON1B
Huacai Chenb2afb642019-11-04 14:11:20 +08001395 select CPU_LOONGSON32
Kelvin Cheung9ec88b62016-04-06 20:34:54 +08001396 select LEDS_GPIO_REGISTER
Kelvin Cheungca585cf2012-07-25 16:17:24 +02001397 help
1398 The Loongson 1B is a 32-bit SoC, which implements the MIPS32
谢致邦 (XIE Zhibang)968dc5a02017-06-01 18:41:34 +08001399 Release 1 instruction set and part of the MIPS32 Release 2
1400 instruction set.
Kelvin Cheungca585cf2012-07-25 16:17:24 +02001401
Yang Ling12e32802016-05-19 12:29:30 +08001402config CPU_LOONGSON1C
1403 bool "Loongson 1C"
1404 depends on SYS_HAS_CPU_LOONGSON1C
Huacai Chenb2afb642019-11-04 14:11:20 +08001405 select CPU_LOONGSON32
Yang Ling12e32802016-05-19 12:29:30 +08001406 select LEDS_GPIO_REGISTER
1407 help
1408 The Loongson 1C is a 32-bit SoC, which implements the MIPS32
谢致邦 (XIE Zhibang)968dc5a02017-06-01 18:41:34 +08001409 Release 1 instruction set and part of the MIPS32 Release 2
1410 instruction set.
Yang Ling12e32802016-05-19 12:29:30 +08001411
Ralf Baechle6e760c82005-07-06 12:08:11 +00001412config CPU_MIPS32_R1
1413 bool "MIPS32 Release 1"
Ralf Baechle7cf80532005-10-20 22:33:09 +01001414 depends on SYS_HAS_CPU_MIPS32_R1
Ralf Baechle6e760c82005-07-06 12:08:11 +00001415 select CPU_HAS_PREFETCH
Ralf Baechle797798c2005-08-10 15:17:11 +00001416 select CPU_SUPPORTS_32BIT_KERNEL
Ralf Baechleec28f302006-03-05 00:45:33 +00001417 select CPU_SUPPORTS_HIGHMEM
Ralf Baechle6e760c82005-07-06 12:08:11 +00001418 help
Ralf Baechle5e83d432005-10-29 19:32:41 +01001419 Choose this option to build a kernel for release 1 or later of the
Ralf Baechle1e5f1ca2005-07-12 14:51:22 +00001420 MIPS32 architecture. Most modern embedded systems with a 32-bit
1421 MIPS processor are based on a MIPS32 processor. If you know the
1422 specific type of processor in your system, choose those that one
1423 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1424 Release 2 of the MIPS32 architecture is available since several
1425 years so chances are you even have a MIPS32 Release 2 processor
1426 in which case you should choose CPU_MIPS32_R2 instead for better
1427 performance.
1428
1429config CPU_MIPS32_R2
1430 bool "MIPS32 Release 2"
Ralf Baechle7cf80532005-10-20 22:33:09 +01001431 depends on SYS_HAS_CPU_MIPS32_R2
Ralf Baechle1e5f1ca2005-07-12 14:51:22 +00001432 select CPU_HAS_PREFETCH
Ralf Baechle797798c2005-08-10 15:17:11 +00001433 select CPU_SUPPORTS_32BIT_KERNEL
Ralf Baechleec28f302006-03-05 00:45:33 +00001434 select CPU_SUPPORTS_HIGHMEM
Paul Burtona5e9a692014-01-27 15:23:10 +00001435 select CPU_SUPPORTS_MSA
Sanjay Lal2235a542012-11-21 18:33:59 -08001436 select HAVE_KVM
Ralf Baechle1e5f1ca2005-07-12 14:51:22 +00001437 help
Ralf Baechle5e83d432005-10-29 19:32:41 +01001438 Choose this option to build a kernel for release 2 or later of the
Ralf Baechle6e760c82005-07-06 12:08:11 +00001439 MIPS32 architecture. Most modern embedded systems with a 32-bit
1440 MIPS processor are based on a MIPS32 processor. If you know the
1441 specific type of processor in your system, choose those that one
1442 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001443
Serge Seminab7c01f2020-05-21 17:07:14 +03001444config CPU_MIPS32_R5
1445 bool "MIPS32 Release 5"
1446 depends on SYS_HAS_CPU_MIPS32_R5
1447 select CPU_HAS_PREFETCH
1448 select CPU_SUPPORTS_32BIT_KERNEL
1449 select CPU_SUPPORTS_HIGHMEM
1450 select CPU_SUPPORTS_MSA
1451 select HAVE_KVM
1452 select MIPS_O32_FP64_SUPPORT
1453 help
1454 Choose this option to build a kernel for release 5 or later of the
1455 MIPS32 architecture. New MIPS processors, starting with the Warrior
1456 family, are based on a MIPS32r5 processor. If you own an older
1457 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1458
Leonid Yegoshin7fd08ca2014-10-27 10:34:11 +00001459config CPU_MIPS32_R6
Markos Chandras674d10e2015-07-16 13:24:46 +01001460 bool "MIPS32 Release 6"
Leonid Yegoshin7fd08ca2014-10-27 10:34:11 +00001461 depends on SYS_HAS_CPU_MIPS32_R6
1462 select CPU_HAS_PREFETCH
Alexander Lobakin18d84e2e2020-01-22 13:58:50 +03001463 select CPU_NO_LOAD_STORE_LR
Leonid Yegoshin7fd08ca2014-10-27 10:34:11 +00001464 select CPU_SUPPORTS_32BIT_KERNEL
1465 select CPU_SUPPORTS_HIGHMEM
1466 select CPU_SUPPORTS_MSA
1467 select HAVE_KVM
1468 select MIPS_O32_FP64_SUPPORT
1469 help
1470 Choose this option to build a kernel for release 6 or later of the
1471 MIPS32 architecture. New MIPS processors, starting with the Warrior
1472 family, are based on a MIPS32r6 processor. If you own an older
1473 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1474
Ralf Baechle6e760c82005-07-06 12:08:11 +00001475config CPU_MIPS64_R1
1476 bool "MIPS64 Release 1"
Ralf Baechle7cf80532005-10-20 22:33:09 +01001477 depends on SYS_HAS_CPU_MIPS64_R1
Ralf Baechle797798c2005-08-10 15:17:11 +00001478 select CPU_HAS_PREFETCH
Yoichi Yuasaed5ba2f2005-09-03 15:56:21 -07001479 select CPU_SUPPORTS_32BIT_KERNEL
1480 select CPU_SUPPORTS_64BIT_KERNEL
Ralf Baechleec28f302006-03-05 00:45:33 +00001481 select CPU_SUPPORTS_HIGHMEM
David Daney9cffd1542009-05-27 17:47:46 -07001482 select CPU_SUPPORTS_HUGEPAGES
Ralf Baechle6e760c82005-07-06 12:08:11 +00001483 help
1484 Choose this option to build a kernel for release 1 or later of the
1485 MIPS64 architecture. Many modern embedded systems with a 64-bit
1486 MIPS processor are based on a MIPS64 processor. If you know the
1487 specific type of processor in your system, choose those that one
1488 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
Ralf Baechle1e5f1ca2005-07-12 14:51:22 +00001489 Release 2 of the MIPS64 architecture is available since several
1490 years so chances are you even have a MIPS64 Release 2 processor
1491 in which case you should choose CPU_MIPS64_R2 instead for better
1492 performance.
1493
1494config CPU_MIPS64_R2
1495 bool "MIPS64 Release 2"
Ralf Baechle7cf80532005-10-20 22:33:09 +01001496 depends on SYS_HAS_CPU_MIPS64_R2
Ralf Baechle797798c2005-08-10 15:17:11 +00001497 select CPU_HAS_PREFETCH
Ralf Baechle1e5f1ca2005-07-12 14:51:22 +00001498 select CPU_SUPPORTS_32BIT_KERNEL
1499 select CPU_SUPPORTS_64BIT_KERNEL
Ralf Baechleec28f302006-03-05 00:45:33 +00001500 select CPU_SUPPORTS_HIGHMEM
David Daney9cffd1542009-05-27 17:47:46 -07001501 select CPU_SUPPORTS_HUGEPAGES
Paul Burtona5e9a692014-01-27 15:23:10 +00001502 select CPU_SUPPORTS_MSA
James Hogan40a2df42016-07-08 11:53:31 +01001503 select HAVE_KVM
Ralf Baechle1e5f1ca2005-07-12 14:51:22 +00001504 help
1505 Choose this option to build a kernel for release 2 or later of the
1506 MIPS64 architecture. Many modern embedded systems with a 64-bit
1507 MIPS processor are based on a MIPS64 processor. If you know the
1508 specific type of processor in your system, choose those that one
1509 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001510
Serge Seminab7c01f2020-05-21 17:07:14 +03001511config CPU_MIPS64_R5
1512 bool "MIPS64 Release 5"
1513 depends on SYS_HAS_CPU_MIPS64_R5
1514 select CPU_HAS_PREFETCH
1515 select CPU_SUPPORTS_32BIT_KERNEL
1516 select CPU_SUPPORTS_64BIT_KERNEL
1517 select CPU_SUPPORTS_HIGHMEM
1518 select CPU_SUPPORTS_HUGEPAGES
1519 select CPU_SUPPORTS_MSA
1520 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1521 select HAVE_KVM
1522 help
1523 Choose this option to build a kernel for release 5 or later of the
1524 MIPS64 architecture. This is a intermediate MIPS architecture
1525 release partly implementing release 6 features. Though there is no
1526 any hardware known to be based on this release.
1527
Leonid Yegoshin7fd08ca2014-10-27 10:34:11 +00001528config CPU_MIPS64_R6
Markos Chandras674d10e2015-07-16 13:24:46 +01001529 bool "MIPS64 Release 6"
Leonid Yegoshin7fd08ca2014-10-27 10:34:11 +00001530 depends on SYS_HAS_CPU_MIPS64_R6
1531 select CPU_HAS_PREFETCH
Alexander Lobakin18d84e2e2020-01-22 13:58:50 +03001532 select CPU_NO_LOAD_STORE_LR
Leonid Yegoshin7fd08ca2014-10-27 10:34:11 +00001533 select CPU_SUPPORTS_32BIT_KERNEL
1534 select CPU_SUPPORTS_64BIT_KERNEL
1535 select CPU_SUPPORTS_HIGHMEM
Paul Burtonafd375d2019-02-02 02:21:53 +00001536 select CPU_SUPPORTS_HUGEPAGES
Leonid Yegoshin7fd08ca2014-10-27 10:34:11 +00001537 select CPU_SUPPORTS_MSA
James Hogan2e6c7742017-02-16 12:39:01 +00001538 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
James Hogan40a2df42016-07-08 11:53:31 +01001539 select HAVE_KVM
Leonid Yegoshin7fd08ca2014-10-27 10:34:11 +00001540 help
1541 Choose this option to build a kernel for release 6 or later of the
1542 MIPS64 architecture. New MIPS processors, starting with the Warrior
1543 family, are based on a MIPS64r6 processor. If you own an older
1544 processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
1545
Serge Semin281e3ae2020-05-21 17:07:15 +03001546config CPU_P5600
1547 bool "MIPS Warrior P5600"
1548 depends on SYS_HAS_CPU_P5600
1549 select CPU_HAS_PREFETCH
1550 select CPU_SUPPORTS_32BIT_KERNEL
1551 select CPU_SUPPORTS_HIGHMEM
1552 select CPU_SUPPORTS_MSA
Serge Semin281e3ae2020-05-21 17:07:15 +03001553 select CPU_SUPPORTS_CPUFREQ
1554 select CPU_MIPSR2_IRQ_VI
1555 select CPU_MIPSR2_IRQ_EI
1556 select HAVE_KVM
1557 select MIPS_O32_FP64_SUPPORT
1558 help
1559 Choose this option to build a kernel for MIPS Warrior P5600 CPU.
1560 It's based on MIPS32r5 ISA with XPA, EVA, dual/quad issue exec pipes,
1561 MMU with two-levels TLB, UCA, MSA, MDU core level features and system
1562 level features like up to six P5600 calculation cores, CM2 with L2
1563 cache, IOCU/IOMMU (though might be unused depending on the system-
1564 specific IP core configuration), GIC, CPC, virtualisation module,
1565 eJTAG and PDtrace.
1566
Linus Torvalds1da177e2005-04-16 15:20:36 -07001567config CPU_R3000
1568 bool "R3000"
Ralf Baechle7cf80532005-10-20 22:33:09 +01001569 depends on SYS_HAS_CPU_R3000
Ralf Baechlef7062dd2006-04-24 14:58:53 +01001570 select CPU_HAS_WB
Paul Burton54746822019-08-31 15:40:43 +00001571 select CPU_R3K_TLB
Yoichi Yuasaed5ba2f2005-09-03 15:56:21 -07001572 select CPU_SUPPORTS_32BIT_KERNEL
Ralf Baechle797798c2005-08-10 15:17:11 +00001573 select CPU_SUPPORTS_HIGHMEM
Linus Torvalds1da177e2005-04-16 15:20:36 -07001574 help
1575 Please make sure to pick the right CPU type. Linux/MIPS is not
1576 designed to be generic, i.e. Kernels compiled for R3000 CPUs will
1577 *not* work on R4000 machines and vice versa. However, since most
1578 of the supported machines have an R4000 (or similar) CPU, R4x00
1579 might be a safe bet. If the resulting kernel does not work,
1580 try to recompile with R3000.
1581
Linus Torvalds1da177e2005-04-16 15:20:36 -07001582config CPU_VR41XX
1583 bool "R41xx"
Ralf Baechle7cf80532005-10-20 22:33:09 +01001584 depends on SYS_HAS_CPU_VR41XX
Yoichi Yuasaed5ba2f2005-09-03 15:56:21 -07001585 select CPU_SUPPORTS_32BIT_KERNEL
1586 select CPU_SUPPORTS_64BIT_KERNEL
Linus Torvalds1da177e2005-04-16 15:20:36 -07001587 help
Ralf Baechle5e83d432005-10-29 19:32:41 +01001588 The options selects support for the NEC VR4100 series of processors.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001589 Only choose this option if you have one of these processors as a
1590 kernel built with this option will not run on any other type of
1591 processor or vice versa.
1592
Lauri Kasanen65ce6192021-01-13 17:10:07 +02001593config CPU_R4300
1594 bool "R4300"
1595 depends on SYS_HAS_CPU_R4300
1596 select CPU_SUPPORTS_32BIT_KERNEL
1597 select CPU_SUPPORTS_64BIT_KERNEL
Lauri Kasanen65ce6192021-01-13 17:10:07 +02001598 help
1599 MIPS Technologies R4300-series processors.
1600
Linus Torvalds1da177e2005-04-16 15:20:36 -07001601config CPU_R4X00
1602 bool "R4x00"
Ralf Baechle7cf80532005-10-20 22:33:09 +01001603 depends on SYS_HAS_CPU_R4X00
Yoichi Yuasaed5ba2f2005-09-03 15:56:21 -07001604 select CPU_SUPPORTS_32BIT_KERNEL
1605 select CPU_SUPPORTS_64BIT_KERNEL
Ralf Baechle970d0322012-10-18 13:54:15 +02001606 select CPU_SUPPORTS_HUGEPAGES
Linus Torvalds1da177e2005-04-16 15:20:36 -07001607 help
1608 MIPS Technologies R4000-series processors other than 4300, including
1609 the R4000, R4400, R4600, and 4700.
1610
1611config CPU_TX49XX
1612 bool "R49XX"
Ralf Baechle7cf80532005-10-20 22:33:09 +01001613 depends on SYS_HAS_CPU_TX49XX
Atsushi Nemotode862b42006-03-17 12:59:22 +09001614 select CPU_HAS_PREFETCH
Yoichi Yuasaed5ba2f2005-09-03 15:56:21 -07001615 select CPU_SUPPORTS_32BIT_KERNEL
1616 select CPU_SUPPORTS_64BIT_KERNEL
Ralf Baechle970d0322012-10-18 13:54:15 +02001617 select CPU_SUPPORTS_HUGEPAGES
Linus Torvalds1da177e2005-04-16 15:20:36 -07001618
1619config CPU_R5000
1620 bool "R5000"
Ralf Baechle7cf80532005-10-20 22:33:09 +01001621 depends on SYS_HAS_CPU_R5000
Yoichi Yuasaed5ba2f2005-09-03 15:56:21 -07001622 select CPU_SUPPORTS_32BIT_KERNEL
1623 select CPU_SUPPORTS_64BIT_KERNEL
Ralf Baechle970d0322012-10-18 13:54:15 +02001624 select CPU_SUPPORTS_HUGEPAGES
Linus Torvalds1da177e2005-04-16 15:20:36 -07001625 help
1626 MIPS Technologies R5000-series processors other than the Nevada.
1627
Shinya Kuribayashi542c1022008-10-24 01:27:57 +09001628config CPU_R5500
1629 bool "R5500"
1630 depends on SYS_HAS_CPU_R5500
Shinya Kuribayashi542c1022008-10-24 01:27:57 +09001631 select CPU_SUPPORTS_32BIT_KERNEL
1632 select CPU_SUPPORTS_64BIT_KERNEL
David Daney9cffd1542009-05-27 17:47:46 -07001633 select CPU_SUPPORTS_HUGEPAGES
Shinya Kuribayashi542c1022008-10-24 01:27:57 +09001634 help
1635 NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
1636 instruction set.
1637
Linus Torvalds1da177e2005-04-16 15:20:36 -07001638config CPU_NEVADA
1639 bool "RM52xx"
Ralf Baechle7cf80532005-10-20 22:33:09 +01001640 depends on SYS_HAS_CPU_NEVADA
Yoichi Yuasaed5ba2f2005-09-03 15:56:21 -07001641 select CPU_SUPPORTS_32BIT_KERNEL
1642 select CPU_SUPPORTS_64BIT_KERNEL
Ralf Baechle970d0322012-10-18 13:54:15 +02001643 select CPU_SUPPORTS_HUGEPAGES
Linus Torvalds1da177e2005-04-16 15:20:36 -07001644 help
1645 QED / PMC-Sierra RM52xx-series ("Nevada") processors.
1646
Linus Torvalds1da177e2005-04-16 15:20:36 -07001647config CPU_R10000
1648 bool "R10000"
Ralf Baechle7cf80532005-10-20 22:33:09 +01001649 depends on SYS_HAS_CPU_R10000
Ralf Baechle5e83d432005-10-29 19:32:41 +01001650 select CPU_HAS_PREFETCH
Yoichi Yuasaed5ba2f2005-09-03 15:56:21 -07001651 select CPU_SUPPORTS_32BIT_KERNEL
1652 select CPU_SUPPORTS_64BIT_KERNEL
Ralf Baechle797798c2005-08-10 15:17:11 +00001653 select CPU_SUPPORTS_HIGHMEM
Ralf Baechle970d0322012-10-18 13:54:15 +02001654 select CPU_SUPPORTS_HUGEPAGES
Linus Torvalds1da177e2005-04-16 15:20:36 -07001655 help
1656 MIPS Technologies R10000-series processors.
1657
1658config CPU_RM7000
1659 bool "RM7000"
Ralf Baechle7cf80532005-10-20 22:33:09 +01001660 depends on SYS_HAS_CPU_RM7000
Ralf Baechle5e83d432005-10-29 19:32:41 +01001661 select CPU_HAS_PREFETCH
Yoichi Yuasaed5ba2f2005-09-03 15:56:21 -07001662 select CPU_SUPPORTS_32BIT_KERNEL
1663 select CPU_SUPPORTS_64BIT_KERNEL
Ralf Baechle797798c2005-08-10 15:17:11 +00001664 select CPU_SUPPORTS_HIGHMEM
Ralf Baechle970d0322012-10-18 13:54:15 +02001665 select CPU_SUPPORTS_HUGEPAGES
Linus Torvalds1da177e2005-04-16 15:20:36 -07001666
1667config CPU_SB1
1668 bool "SB1"
Ralf Baechle7cf80532005-10-20 22:33:09 +01001669 depends on SYS_HAS_CPU_SB1
Yoichi Yuasaed5ba2f2005-09-03 15:56:21 -07001670 select CPU_SUPPORTS_32BIT_KERNEL
1671 select CPU_SUPPORTS_64BIT_KERNEL
Ralf Baechle797798c2005-08-10 15:17:11 +00001672 select CPU_SUPPORTS_HIGHMEM
Ralf Baechle970d0322012-10-18 13:54:15 +02001673 select CPU_SUPPORTS_HUGEPAGES
Ralf Baechle0004a9d2006-10-31 03:45:07 +00001674 select WEAK_ORDERING
Linus Torvalds1da177e2005-04-16 15:20:36 -07001675
David Daneya86c7f72008-12-11 15:33:38 -08001676config CPU_CAVIUM_OCTEON
1677 bool "Cavium Octeon processor"
David Daney5e6833892009-02-02 11:30:59 -08001678 depends on SYS_HAS_CPU_CAVIUM_OCTEON
David Daneya86c7f72008-12-11 15:33:38 -08001679 select CPU_HAS_PREFETCH
1680 select CPU_SUPPORTS_64BIT_KERNEL
David Daneya86c7f72008-12-11 15:33:38 -08001681 select WEAK_ORDERING
David Daneya86c7f72008-12-11 15:33:38 -08001682 select CPU_SUPPORTS_HIGHMEM
David Daney9cffd1542009-05-27 17:47:46 -07001683 select CPU_SUPPORTS_HUGEPAGES
Ben Hutchingsdf115f32015-05-25 20:27:29 +01001684 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1685 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
Florian Fainelli930beb52014-01-14 09:54:38 -08001686 select MIPS_L1_CACHE_SHIFT_7
James Hogan0ae3abc2017-03-14 10:25:51 +00001687 select HAVE_KVM
David Daneya86c7f72008-12-11 15:33:38 -08001688 help
1689 The Cavium Octeon processor is a highly integrated chip containing
1690 many ethernet hardware widgets for networking tasks. The processor
1691 can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
1692 Full details can be found at http://www.caviumnetworks.com.
1693
Jonas Gorskicd746242013-12-18 14:12:02 +01001694config CPU_BMIPS
1695 bool "Broadcom BMIPS"
1696 depends on SYS_HAS_CPU_BMIPS
1697 select CPU_MIPS32
Jonas Gorskife7f62c2013-12-18 14:12:05 +01001698 select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
Jonas Gorskicd746242013-12-18 14:12:02 +01001699 select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
1700 select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
1701 select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
1702 select CPU_SUPPORTS_32BIT_KERNEL
1703 select DMA_NONCOHERENT
Ralf Baechle67e38cf2015-05-26 18:20:06 +02001704 select IRQ_MIPS_CPU
Jonas Gorskicd746242013-12-18 14:12:02 +01001705 select SWAP_IO_SPACE
1706 select WEAK_ORDERING
Kevin Cernekeec1c0c462010-10-17 10:56:53 -07001707 select CPU_SUPPORTS_HIGHMEM
Jonas Gorski69aaf9c2013-12-18 14:12:04 +01001708 select CPU_HAS_PREFETCH
Markus Mayera8d709b2017-02-07 13:58:54 -08001709 select CPU_SUPPORTS_CPUFREQ
1710 select MIPS_EXTERNAL_TIMER
Florian Fainellibf8bde42021-10-20 11:48:47 -07001711 select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU
Kevin Cernekeec1c0c462010-10-17 10:56:53 -07001712 help
Jonas Gorskife7f62c2013-12-18 14:12:05 +01001713 Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
Kevin Cernekeec1c0c462010-10-17 10:56:53 -07001714
Linus Torvalds1da177e2005-04-16 15:20:36 -07001715endchoice
1716
Leonid Yegoshina6e18782013-12-03 10:22:26 +00001717config CPU_MIPS32_3_5_FEATURES
1718 bool "MIPS32 Release 3.5 Features"
1719 depends on SYS_HAS_CPU_MIPS32_R3_5
Serge Semin281e3ae2020-05-21 17:07:15 +03001720 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_MIPS32_R6 || \
1721 CPU_P5600
Leonid Yegoshina6e18782013-12-03 10:22:26 +00001722 help
1723 Choose this option to build a kernel for release 2 or later of the
1724 MIPS32 architecture including features from the 3.5 release such as
1725 support for Enhanced Virtual Addressing (EVA).
1726
1727config CPU_MIPS32_3_5_EVA
1728 bool "Enhanced Virtual Addressing (EVA)"
1729 depends on CPU_MIPS32_3_5_FEATURES
1730 select EVA
1731 default y
1732 help
1733 Choose this option if you want to enable the Enhanced Virtual
1734 Addressing (EVA) on your MIPS32 core (such as proAptiv).
1735 One of its primary benefits is an increase in the maximum size
1736 of lowmem (up to 3GB). If unsure, say 'N' here.
1737
Steven J. Hillc5b36782015-02-26 18:16:38 -06001738config CPU_MIPS32_R5_FEATURES
1739 bool "MIPS32 Release 5 Features"
1740 depends on SYS_HAS_CPU_MIPS32_R5
Serge Semin281e3ae2020-05-21 17:07:15 +03001741 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_P5600
Steven J. Hillc5b36782015-02-26 18:16:38 -06001742 help
1743 Choose this option to build a kernel for release 2 or later of the
1744 MIPS32 architecture including features from release 5 such as
1745 support for Extended Physical Addressing (XPA).
1746
1747config CPU_MIPS32_R5_XPA
1748 bool "Extended Physical Addressing (XPA)"
1749 depends on CPU_MIPS32_R5_FEATURES
1750 depends on !EVA
1751 depends on !PAGE_SIZE_4KB
1752 depends on SYS_SUPPORTS_HIGHMEM
1753 select XPA
1754 select HIGHMEM
Christoph Hellwigd4a451d2018-04-03 16:24:20 +02001755 select PHYS_ADDR_T_64BIT
Steven J. Hillc5b36782015-02-26 18:16:38 -06001756 default n
1757 help
1758 Choose this option if you want to enable the Extended Physical
1759 Addressing (XPA) on your MIPS32 core (such as P5600 series). The
1760 benefit is to increase physical addressing equal to or greater
1761 than 40 bits. Note that this has the side effect of turning on
1762 64-bit addressing which in turn makes the PTEs 64-bit in size.
1763 If unsure, say 'N' here.
1764
Wu Zhangjin622844b2010-04-10 20:04:42 +08001765if CPU_LOONGSON2F
1766config CPU_NOP_WORKAROUNDS
1767 bool
1768
1769config CPU_JUMP_WORKAROUNDS
1770 bool
1771
1772config CPU_LOONGSON2F_WORKAROUNDS
1773 bool "Loongson 2F Workarounds"
1774 default y
1775 select CPU_NOP_WORKAROUNDS
1776 select CPU_JUMP_WORKAROUNDS
1777 help
1778 Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
1779 require workarounds. Without workarounds the system may hang
1780 unexpectedly. For more information please refer to the gas
1781 -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
1782
1783 Loongson 2F03 and later have fixed these issues and no workarounds
1784 are needed. The workarounds have no significant side effect on them
1785 but may decrease the performance of the system so this option should
1786 be disabled unless the kernel is intended to be run on 2F01 or 2F02
1787 systems.
1788
1789 If unsure, please say Y.
1790endif # CPU_LOONGSON2F
1791
Wu Zhangjin1b93b3c2009-10-14 18:12:16 +08001792config SYS_SUPPORTS_ZBOOT
1793 bool
1794 select HAVE_KERNEL_GZIP
1795 select HAVE_KERNEL_BZIP2
Florian Fainelli31c48672013-09-16 16:55:20 +01001796 select HAVE_KERNEL_LZ4
Wu Zhangjin1b93b3c2009-10-14 18:12:16 +08001797 select HAVE_KERNEL_LZMA
Wu Zhangjinfe1d45e02010-01-15 20:34:46 +08001798 select HAVE_KERNEL_LZO
Florian Fainelli4e23eb62013-09-11 11:51:41 +01001799 select HAVE_KERNEL_XZ
Paul Cercueila510b612020-09-01 16:26:51 +02001800 select HAVE_KERNEL_ZSTD
Wu Zhangjin1b93b3c2009-10-14 18:12:16 +08001801
1802config SYS_SUPPORTS_ZBOOT_UART16550
1803 bool
1804 select SYS_SUPPORTS_ZBOOT
1805
Alban Bedeldbb98312015-12-10 10:57:21 +01001806config SYS_SUPPORTS_ZBOOT_UART_PROM
1807 bool
1808 select SYS_SUPPORTS_ZBOOT
1809
Jiaxun Yang268a2d62019-10-20 22:43:13 +08001810config CPU_LOONGSON2EF
Wu Zhangjin3702bba2009-07-02 23:27:41 +08001811 bool
1812 select CPU_SUPPORTS_32BIT_KERNEL
1813 select CPU_SUPPORTS_64BIT_KERNEL
1814 select CPU_SUPPORTS_HIGHMEM
Ralf Baechle970d0322012-10-18 13:54:15 +02001815 select CPU_SUPPORTS_HUGEPAGES
Christoph Hellwige9050862018-06-20 09:11:15 +02001816 select ARCH_HAS_PHYS_TO_DMA
Wu Zhangjin3702bba2009-07-02 23:27:41 +08001817
Huacai Chenb2afb642019-11-04 14:11:20 +08001818config CPU_LOONGSON32
Kelvin Cheungca585cf2012-07-25 16:17:24 +02001819 bool
1820 select CPU_MIPS32
Jiaxun Yang7e280f62019-01-22 21:04:12 +08001821 select CPU_MIPSR2
Kelvin Cheungca585cf2012-07-25 16:17:24 +02001822 select CPU_HAS_PREFETCH
1823 select CPU_SUPPORTS_32BIT_KERNEL
1824 select CPU_SUPPORTS_HIGHMEM
Kelvin Cheungf29ad102014-10-10 11:40:01 +08001825 select CPU_SUPPORTS_CPUFREQ
Kelvin Cheungca585cf2012-07-25 16:17:24 +02001826
Jonas Gorskife7f62c2013-12-18 14:12:05 +01001827config CPU_BMIPS32_3300
Jonas Gorski04fa8bf2013-12-18 14:12:06 +01001828 select SMP_UP if SMP
Kevin Cernekee1bbb6c12011-11-10 22:30:24 -08001829 bool
Jonas Gorskicd746242013-12-18 14:12:02 +01001830
1831config CPU_BMIPS4350
1832 bool
1833 select SYS_SUPPORTS_SMP
1834 select SYS_SUPPORTS_HOTPLUG_CPU
1835
1836config CPU_BMIPS4380
1837 bool
Kevin Cernekeebbf2ba62014-10-20 21:27:58 -07001838 select MIPS_L1_CACHE_SHIFT_6
Jonas Gorskicd746242013-12-18 14:12:02 +01001839 select SYS_SUPPORTS_SMP
1840 select SYS_SUPPORTS_HOTPLUG_CPU
Florian Fainellib4720802016-02-09 12:55:53 -08001841 select CPU_HAS_RIXI
Jonas Gorskicd746242013-12-18 14:12:02 +01001842
1843config CPU_BMIPS5000
1844 bool
Jonas Gorskicd746242013-12-18 14:12:02 +01001845 select MIPS_CPU_SCACHE
Kevin Cernekeebbf2ba62014-10-20 21:27:58 -07001846 select MIPS_L1_CACHE_SHIFT_7
Jonas Gorskicd746242013-12-18 14:12:02 +01001847 select SYS_SUPPORTS_SMP
1848 select SYS_SUPPORTS_HOTPLUG_CPU
Florian Fainellib4720802016-02-09 12:55:53 -08001849 select CPU_HAS_RIXI
Kevin Cernekee1bbb6c12011-11-10 22:30:24 -08001850
Jiaxun Yang268a2d62019-10-20 22:43:13 +08001851config SYS_HAS_CPU_LOONGSON64
Huacai Chen0e476d92014-03-21 18:44:07 +08001852 bool
1853 select CPU_SUPPORTS_CPUFREQ
Huacai Chenb2edcfc2016-03-03 09:45:09 +08001854 select CPU_HAS_RIXI
Huacai Chen0e476d92014-03-21 18:44:07 +08001855
Wu Zhangjin3702bba2009-07-02 23:27:41 +08001856config SYS_HAS_CPU_LOONGSON2E
Fuxin Zhang2a21c732007-06-06 14:52:43 +08001857 bool
1858
Wu Zhangjin6f7a2512009-11-06 18:45:05 +08001859config SYS_HAS_CPU_LOONGSON2F
1860 bool
Wu Zhangjin55045ff2009-11-11 13:39:12 +08001861 select CPU_SUPPORTS_CPUFREQ
1862 select CPU_SUPPORTS_ADDRWINCFG if 64BIT
Wu Zhangjin6f7a2512009-11-06 18:45:05 +08001863
Kelvin Cheungca585cf2012-07-25 16:17:24 +02001864config SYS_HAS_CPU_LOONGSON1B
1865 bool
1866
Yang Ling12e32802016-05-19 12:29:30 +08001867config SYS_HAS_CPU_LOONGSON1C
1868 bool
1869
Ralf Baechle7cf80532005-10-20 22:33:09 +01001870config SYS_HAS_CPU_MIPS32_R1
1871 bool
1872
1873config SYS_HAS_CPU_MIPS32_R2
1874 bool
1875
Leonid Yegoshina6e18782013-12-03 10:22:26 +00001876config SYS_HAS_CPU_MIPS32_R3_5
1877 bool
1878
Steven J. Hillc5b36782015-02-26 18:16:38 -06001879config SYS_HAS_CPU_MIPS32_R5
1880 bool
Paul Burton9ae1f262019-02-04 13:52:58 -08001881 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
Steven J. Hillc5b36782015-02-26 18:16:38 -06001882
Leonid Yegoshin7fd08ca2014-10-27 10:34:11 +00001883config SYS_HAS_CPU_MIPS32_R6
1884 bool
Paul Burton9ae1f262019-02-04 13:52:58 -08001885 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
Leonid Yegoshin7fd08ca2014-10-27 10:34:11 +00001886
Ralf Baechle7cf80532005-10-20 22:33:09 +01001887config SYS_HAS_CPU_MIPS64_R1
1888 bool
1889
1890config SYS_HAS_CPU_MIPS64_R2
1891 bool
1892
Lukas Bulwahnfd4eb902021-12-13 12:16:35 +01001893config SYS_HAS_CPU_MIPS64_R5
1894 bool
1895 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1896
Leonid Yegoshin7fd08ca2014-10-27 10:34:11 +00001897config SYS_HAS_CPU_MIPS64_R6
1898 bool
Paul Burton9ae1f262019-02-04 13:52:58 -08001899 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
Leonid Yegoshin7fd08ca2014-10-27 10:34:11 +00001900
Serge Semin281e3ae2020-05-21 17:07:15 +03001901config SYS_HAS_CPU_P5600
1902 bool
1903 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1904
Ralf Baechle7cf80532005-10-20 22:33:09 +01001905config SYS_HAS_CPU_R3000
1906 bool
1907
Ralf Baechle7cf80532005-10-20 22:33:09 +01001908config SYS_HAS_CPU_VR41XX
1909 bool
1910
Lauri Kasanen65ce6192021-01-13 17:10:07 +02001911config SYS_HAS_CPU_R4300
1912 bool
1913
Ralf Baechle7cf80532005-10-20 22:33:09 +01001914config SYS_HAS_CPU_R4X00
1915 bool
1916
1917config SYS_HAS_CPU_TX49XX
1918 bool
1919
1920config SYS_HAS_CPU_R5000
1921 bool
1922
Shinya Kuribayashi542c1022008-10-24 01:27:57 +09001923config SYS_HAS_CPU_R5500
1924 bool
1925
Ralf Baechle7cf80532005-10-20 22:33:09 +01001926config SYS_HAS_CPU_NEVADA
1927 bool
1928
Ralf Baechle7cf80532005-10-20 22:33:09 +01001929config SYS_HAS_CPU_R10000
1930 bool
Paul Burton9ae1f262019-02-04 13:52:58 -08001931 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
Ralf Baechle7cf80532005-10-20 22:33:09 +01001932
1933config SYS_HAS_CPU_RM7000
1934 bool
1935
Ralf Baechle7cf80532005-10-20 22:33:09 +01001936config SYS_HAS_CPU_SB1
1937 bool
1938
David Daney5e6833892009-02-02 11:30:59 -08001939config SYS_HAS_CPU_CAVIUM_OCTEON
1940 bool
1941
Jonas Gorskicd746242013-12-18 14:12:02 +01001942config SYS_HAS_CPU_BMIPS
Kevin Cernekeec1c0c462010-10-17 10:56:53 -07001943 bool
1944
Jonas Gorskife7f62c2013-12-18 14:12:05 +01001945config SYS_HAS_CPU_BMIPS32_3300
Kevin Cernekeec1c0c462010-10-17 10:56:53 -07001946 bool
Jonas Gorskicd746242013-12-18 14:12:02 +01001947 select SYS_HAS_CPU_BMIPS
Kevin Cernekeec1c0c462010-10-17 10:56:53 -07001948
1949config SYS_HAS_CPU_BMIPS4350
1950 bool
Jonas Gorskicd746242013-12-18 14:12:02 +01001951 select SYS_HAS_CPU_BMIPS
Kevin Cernekeec1c0c462010-10-17 10:56:53 -07001952
1953config SYS_HAS_CPU_BMIPS4380
1954 bool
Jonas Gorskicd746242013-12-18 14:12:02 +01001955 select SYS_HAS_CPU_BMIPS
Kevin Cernekeec1c0c462010-10-17 10:56:53 -07001956
1957config SYS_HAS_CPU_BMIPS5000
1958 bool
Jonas Gorskicd746242013-12-18 14:12:02 +01001959 select SYS_HAS_CPU_BMIPS
Hauke Mehrtensf263f2a2018-12-09 16:49:57 +01001960 select ARCH_HAS_SYNC_DMA_FOR_CPU
Kevin Cernekeec1c0c462010-10-17 10:56:53 -07001961
Ralf Baechle17099b12007-07-14 13:24:05 +01001962#
1963# CPU may reorder R->R, R->W, W->R, W->W
1964# Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
1965#
Ralf Baechle0004a9d2006-10-31 03:45:07 +00001966config WEAK_ORDERING
1967 bool
Ralf Baechle17099b12007-07-14 13:24:05 +01001968
1969#
1970# CPU may reorder reads and writes beyond LL/SC
1971# CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
1972#
1973config WEAK_REORDERING_BEYOND_LLSC
1974 bool
Ralf Baechle5e83d432005-10-29 19:32:41 +01001975endmenu
1976
1977#
Chris Dearmanc09b47d2006-06-20 17:15:20 +01001978# These two indicate any level of the MIPS32 and MIPS64 architecture
Ralf Baechle5e83d432005-10-29 19:32:41 +01001979#
1980config CPU_MIPS32
1981 bool
Serge Seminab7c01f2020-05-21 17:07:14 +03001982 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R5 || \
Serge Semin281e3ae2020-05-21 17:07:15 +03001983 CPU_MIPS32_R6 || CPU_P5600
Ralf Baechle5e83d432005-10-29 19:32:41 +01001984
1985config CPU_MIPS64
1986 bool
Serge Seminab7c01f2020-05-21 17:07:14 +03001987 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R5 || \
Jason A. Donenfeld5a4fa442021-02-28 00:02:36 +01001988 CPU_MIPS64_R6 || CPU_LOONGSON64 || CPU_CAVIUM_OCTEON
Ralf Baechle5e83d432005-10-29 19:32:41 +01001989
1990#
Paul Burton57eeaced2018-11-08 23:44:55 +00001991# These indicate the revision of the architecture
Ralf Baechle5e83d432005-10-29 19:32:41 +01001992#
1993config CPU_MIPSR1
1994 bool
1995 default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
1996
1997config CPU_MIPSR2
1998 bool
David Daneya86c7f72008-12-11 15:33:38 -08001999 default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
Florian Fainelli8256b172016-02-09 12:55:51 -08002000 select CPU_HAS_RIXI
Jiaxun Yangba9196d2020-01-13 18:14:59 +08002001 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
Markos Chandrasa7e07b12014-11-13 13:32:03 +00002002 select MIPS_SPRAM
Ralf Baechle5e83d432005-10-29 19:32:41 +01002003
Serge Seminab7c01f2020-05-21 17:07:14 +03002004config CPU_MIPSR5
2005 bool
Serge Semin281e3ae2020-05-21 17:07:15 +03002006 default y if CPU_MIPS32_R5 || CPU_MIPS64_R5 || CPU_P5600
Serge Seminab7c01f2020-05-21 17:07:14 +03002007 select CPU_HAS_RIXI
2008 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2009 select MIPS_SPRAM
2010
Leonid Yegoshin7fd08ca2014-10-27 10:34:11 +00002011config CPU_MIPSR6
2012 bool
2013 default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
Florian Fainelli8256b172016-02-09 12:55:51 -08002014 select CPU_HAS_RIXI
Jiaxun Yangba9196d2020-01-13 18:14:59 +08002015 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
Paul Burton87321fd2016-05-06 13:35:03 +01002016 select HAVE_ARCH_BITREVERSE
Paul Burton2db003a2016-05-06 14:36:24 +01002017 select MIPS_ASID_BITS_VARIABLE
Marcin Nowakowski4a5dc51e2018-02-09 22:11:06 +00002018 select MIPS_CRC_SUPPORT
Markos Chandrasa7e07b12014-11-13 13:32:03 +00002019 select MIPS_SPRAM
Ralf Baechle5e83d432005-10-29 19:32:41 +01002020
Paul Burton57eeaced2018-11-08 23:44:55 +00002021config TARGET_ISA_REV
2022 int
2023 default 1 if CPU_MIPSR1
2024 default 2 if CPU_MIPSR2
Serge Seminab7c01f2020-05-21 17:07:14 +03002025 default 5 if CPU_MIPSR5
Paul Burton57eeaced2018-11-08 23:44:55 +00002026 default 6 if CPU_MIPSR6
2027 default 0
2028 help
2029 Reflects the ISA revision being targeted by the kernel build. This
2030 is effectively the Kconfig equivalent of MIPS_ISA_REV.
2031
Leonid Yegoshina6e18782013-12-03 10:22:26 +00002032config EVA
2033 bool
2034
Steven J. Hillc5b36782015-02-26 18:16:38 -06002035config XPA
2036 bool
2037
Ralf Baechle5e83d432005-10-29 19:32:41 +01002038config SYS_SUPPORTS_32BIT_KERNEL
2039 bool
2040config SYS_SUPPORTS_64BIT_KERNEL
2041 bool
2042config CPU_SUPPORTS_32BIT_KERNEL
2043 bool
2044config CPU_SUPPORTS_64BIT_KERNEL
2045 bool
Wu Zhangjin55045ff2009-11-11 13:39:12 +08002046config CPU_SUPPORTS_CPUFREQ
2047 bool
2048config CPU_SUPPORTS_ADDRWINCFG
2049 bool
David Daney9cffd1542009-05-27 17:47:46 -07002050config CPU_SUPPORTS_HUGEPAGES
2051 bool
Lukas Bulwahna670c82d2021-12-13 12:16:42 +01002052 depends on !(32BIT && (PHYS_ADDR_T_64BIT || EVA))
David Daney82622282009-10-14 12:16:56 -07002053config MIPS_PGD_C0_CONTEXT
2054 bool
Huang Peic6972fb2021-03-13 09:39:27 +08002055 depends on 64BIT
Thomas Bogendoerfer95b8a5e2021-10-20 14:49:13 +02002056 default y if (CPU_MIPSR2 || CPU_MIPSR6)
Ralf Baechle5e83d432005-10-29 19:32:41 +01002057
David Daney8192c9e2008-09-23 00:04:26 -07002058#
2059# Set to y for ptrace access to watch registers.
2060#
2061config HARDWARE_WATCHPOINTS
Enrico Weigelt, metux IT consult371a4152019-03-11 16:54:27 +01002062 bool
2063 default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
David Daney8192c9e2008-09-23 00:04:26 -07002064
Ralf Baechle5e83d432005-10-29 19:32:41 +01002065menu "Kernel type"
2066
2067choice
Ralf Baechle5e83d432005-10-29 19:32:41 +01002068 prompt "Kernel code model"
2069 help
2070 You should only select this option if you have a workload that
2071 actually benefits from 64-bit processing or if your machine has
2072 large memory. You will only be presented a single option in this
2073 menu if your system does not support both 32-bit and 64-bit kernels.
2074
2075config 32BIT
2076 bool "32-bit kernel"
2077 depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
2078 select TRAD_SIGNALS
2079 help
2080 Select this option if you want to build a 32-bit kernel.
Ralf Baechlef17c4ca2015-07-23 12:02:09 +02002081
Ralf Baechle5e83d432005-10-29 19:32:41 +01002082config 64BIT
2083 bool "64-bit kernel"
2084 depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
2085 help
2086 Select this option if you want to build a 64-bit kernel.
2087
2088endchoice
2089
Leonid Yegoshin1e321fa2015-05-14 18:34:43 -07002090config MIPS_VA_BITS_48
2091 bool "48 bits virtual memory"
2092 depends on 64BIT
2093 help
Alex Belits3377e222017-02-16 17:27:34 -08002094 Support a maximum at least 48 bits of application virtual
2095 memory. Default is 40 bits or less, depending on the CPU.
2096 For page sizes 16k and above, this option results in a small
2097 memory overhead for page tables. For 4k page size, a fourth
2098 level of page tables is added which imposes both a memory
2099 overhead as well as slower TLB fault handling.
2100
Leonid Yegoshin1e321fa2015-05-14 18:34:43 -07002101 If unsure, say N.
2102
YunQiang Su79876cc2021-12-22 13:43:46 +00002103config ZBOOT_LOAD_ADDRESS
2104 hex "Compressed kernel load address"
2105 default 0xffffffff80400000 if BCM47XX
2106 default 0x0
2107 depends on SYS_SUPPORTS_ZBOOT
2108 help
2109 The address to load compressed kernel, aka vmlinuz.
2110
2111 This is only used if non-zero.
2112
Linus Torvalds1da177e2005-04-16 15:20:36 -07002113choice
2114 prompt "Kernel page size"
2115 default PAGE_SIZE_4KB
2116
2117config PAGE_SIZE_4KB
2118 bool "4kB"
Jiaxun Yang268a2d62019-10-20 22:43:13 +08002119 depends on !CPU_LOONGSON2EF && !CPU_LOONGSON64
Linus Torvalds1da177e2005-04-16 15:20:36 -07002120 help
Enrico Weigelt, metux IT consult371a4152019-03-11 16:54:27 +01002121 This option select the standard 4kB Linux page size. On some
2122 R3000-family processors this is the only available page size. Using
2123 4kB page size will minimize memory consumption and is therefore
2124 recommended for low memory systems.
Linus Torvalds1da177e2005-04-16 15:20:36 -07002125
2126config PAGE_SIZE_8KB
2127 bool "8kB"
Paul Burtonc2aeaae2019-07-22 22:00:03 +00002128 depends on CPU_CAVIUM_OCTEON
Leonid Yegoshin1e321fa2015-05-14 18:34:43 -07002129 depends on !MIPS_VA_BITS_48
Linus Torvalds1da177e2005-04-16 15:20:36 -07002130 help
2131 Using 8kB page size will result in higher performance kernel at
2132 the price of higher memory consumption. This option is available
Paul Burtonc2aeaae2019-07-22 22:00:03 +00002133 only on cnMIPS processors. Note that you will need a suitable Linux
2134 distribution to support this.
Linus Torvalds1da177e2005-04-16 15:20:36 -07002135
2136config PAGE_SIZE_16KB
2137 bool "16kB"
Thomas Bogendoerfer455481f2022-02-22 10:04:28 +01002138 depends on !CPU_R3000
Linus Torvalds1da177e2005-04-16 15:20:36 -07002139 help
2140 Using 16kB page size will result in higher performance kernel at
2141 the price of higher memory consumption. This option is available on
Ralf Baechle714bfad2006-05-17 14:04:30 +01002142 all non-R3000 family processors. Note that you will need a suitable
2143 Linux distribution to support this.
Linus Torvalds1da177e2005-04-16 15:20:36 -07002144
Ralf Baechlec52399b2009-04-02 14:07:10 +02002145config PAGE_SIZE_32KB
2146 bool "32kB"
2147 depends on CPU_CAVIUM_OCTEON
Leonid Yegoshin1e321fa2015-05-14 18:34:43 -07002148 depends on !MIPS_VA_BITS_48
Ralf Baechlec52399b2009-04-02 14:07:10 +02002149 help
2150 Using 32kB page size will result in higher performance kernel at
2151 the price of higher memory consumption. This option is available
2152 only on cnMIPS cores. Note that you will need a suitable Linux
2153 distribution to support this.
2154
Linus Torvalds1da177e2005-04-16 15:20:36 -07002155config PAGE_SIZE_64KB
2156 bool "64kB"
Thomas Bogendoerfer455481f2022-02-22 10:04:28 +01002157 depends on !CPU_R3000
Linus Torvalds1da177e2005-04-16 15:20:36 -07002158 help
2159 Using 64kB page size will result in higher performance kernel at
2160 the price of higher memory consumption. This option is available on
2161 all non-R3000 family processor. Not that at the time of this
Ralf Baechle714bfad2006-05-17 14:04:30 +01002162 writing this option is still high experimental.
Linus Torvalds1da177e2005-04-16 15:20:36 -07002163
2164endchoice
2165
David Daneyc9bace72010-10-11 14:52:45 -07002166config FORCE_MAX_ZONEORDER
2167 int "Maximum zone order"
Alex Smithe4362d12014-01-21 11:22:35 +00002168 range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2169 default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2170 range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2171 default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2172 range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2173 default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
Paul Cercueilef923a72020-09-17 15:35:28 +02002174 range 0 64
David Daneyc9bace72010-10-11 14:52:45 -07002175 default "11"
2176 help
2177 The kernel memory allocator divides physically contiguous memory
2178 blocks into "zones", where each zone is a power of two number of
2179 pages. This option selects the largest power of two that the kernel
2180 keeps in the memory allocator. If you need to allocate very large
2181 blocks of physically contiguous memory, then you may need to
2182 increase this value.
2183
2184 This config option is actually maximum order plus one. For example,
2185 a value of 11 means that the largest free memory block is 2^10 pages.
2186
2187 The page size is not necessarily 4KB. Keep this in mind
2188 when choosing a value for this option.
2189
Linus Torvalds1da177e2005-04-16 15:20:36 -07002190config BOARD_SCACHE
2191 bool
2192
2193config IP22_CPU_SCACHE
2194 bool
2195 select BOARD_SCACHE
2196
Chris Dearman9318c512006-06-20 17:15:20 +01002197#
2198# Support for a MIPS32 / MIPS64 style S-caches
2199#
2200config MIPS_CPU_SCACHE
2201 bool
2202 select BOARD_SCACHE
2203
Linus Torvalds1da177e2005-04-16 15:20:36 -07002204config R5000_CPU_SCACHE
2205 bool
2206 select BOARD_SCACHE
2207
2208config RM7000_CPU_SCACHE
2209 bool
2210 select BOARD_SCACHE
2211
2212config SIBYTE_DMA_PAGEOPS
2213 bool "Use DMA to clear/copy pages"
2214 depends on CPU_SB1
2215 help
2216 Instead of using the CPU to zero and copy pages, use a Data Mover
2217 channel. These DMA channels are otherwise unused by the standard
2218 SiByte Linux port. Seems to give a small performance benefit.
2219
2220config CPU_HAS_PREFETCH
Ralf Baechlec8094b52005-08-05 14:28:54 +00002221 bool
Linus Torvalds1da177e2005-04-16 15:20:36 -07002222
Florian Fainelli3165c842012-01-31 18:18:43 +01002223config CPU_GENERIC_DUMP_TLB
2224 bool
Thomas Bogendoerfer455481f2022-02-22 10:04:28 +01002225 default y if !CPU_R3000
Florian Fainelli3165c842012-01-31 18:18:43 +01002226
Paul Burtonc92e47e2018-11-07 23:14:02 +00002227config MIPS_FP_SUPPORT
Paul Burton183b40f2018-11-07 23:14:11 +00002228 bool "Floating Point support" if EXPERT
2229 default y
2230 help
2231 Select y to include support for floating point in the kernel
2232 including initialization of FPU hardware, FP context save & restore
2233 and emulation of an FPU where necessary. Without this support any
2234 userland program attempting to use floating point instructions will
2235 receive a SIGILL.
2236
2237 If you know that your userland will not attempt to use floating point
2238 instructions then you can say n here to shrink the kernel a little.
2239
2240 If unsure, say y.
Paul Burtonc92e47e2018-11-07 23:14:02 +00002241
Paul Burton97f7dcb2018-11-07 23:14:02 +00002242config CPU_R2300_FPU
2243 bool
Paul Burtonc92e47e2018-11-07 23:14:02 +00002244 depends on MIPS_FP_SUPPORT
Thomas Bogendoerfer455481f2022-02-22 10:04:28 +01002245 default y if CPU_R3000
Paul Burton97f7dcb2018-11-07 23:14:02 +00002246
Paul Burton54746822019-08-31 15:40:43 +00002247config CPU_R3K_TLB
2248 bool
2249
Florian Fainelli91405eb2012-01-31 18:18:44 +01002250config CPU_R4K_FPU
2251 bool
Paul Burtonc92e47e2018-11-07 23:14:02 +00002252 depends on MIPS_FP_SUPPORT
Paul Burton97f7dcb2018-11-07 23:14:02 +00002253 default y if !CPU_R2300_FPU
Florian Fainelli91405eb2012-01-31 18:18:44 +01002254
Florian Fainelli62cedc42012-01-31 18:18:45 +01002255config CPU_R4K_CACHE_TLB
2256 bool
Paul Burton54746822019-08-31 15:40:43 +00002257 default y if !(CPU_R3K_TLB || CPU_SB1 || CPU_CAVIUM_OCTEON)
Florian Fainelli62cedc42012-01-31 18:18:45 +01002258
Ralf Baechle59d6ab82006-10-06 17:36:20 +01002259config MIPS_MT_SMP
Markos Chandrasa92b7f82014-04-08 11:59:10 +01002260 bool "MIPS MT SMP support (1 TC on each available VPE)"
Paul Burton5cbf9682017-08-07 16:01:16 -07002261 default y
Paul Burton527f1022017-08-07 16:18:04 -07002262 depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS
Ralf Baechle59d6ab82006-10-06 17:36:20 +01002263 select CPU_MIPSR2_IRQ_VI
Chris Dearmand725cf32007-05-08 14:05:39 +01002264 select CPU_MIPSR2_IRQ_EI
Steven J. Hillc080faa2013-10-04 16:23:28 -05002265 select SYNC_R4K
Ralf Baechle59d6ab82006-10-06 17:36:20 +01002266 select MIPS_MT
2267 select SMP
Ralf Baechle87353d82007-11-19 12:23:51 +00002268 select SMP_UP
Steven J. Hillc080faa2013-10-04 16:23:28 -05002269 select SYS_SUPPORTS_SMP
2270 select SYS_SUPPORTS_SCHED_SMT
Al Cooper399aaa22012-07-13 16:44:53 -04002271 select MIPS_PERF_SHARED_TC_COUNTERS
Ralf Baechle59d6ab82006-10-06 17:36:20 +01002272 help
Steven J. Hillc080faa2013-10-04 16:23:28 -05002273 This is a kernel model which is known as SMVP. This is supported
2274 on cores with the MT ASE and uses the available VPEs to implement
2275 virtual processors which supports SMP. This is equivalent to the
2276 Intel Hyperthreading feature. For further information go to
2277 <http://www.imgtec.com/mips/mips-multithreading.asp>.
Ralf Baechle59d6ab82006-10-06 17:36:20 +01002278
Ralf Baechlef41ae0b2006-06-05 17:24:46 +01002279config MIPS_MT
2280 bool
2281
Ralf Baechle0ab7aef2007-03-02 20:42:04 +00002282config SCHED_SMT
2283 bool "SMT (multithreading) scheduler support"
2284 depends on SYS_SUPPORTS_SCHED_SMT
2285 default n
2286 help
2287 SMT scheduler support improves the CPU scheduler's decision making
2288 when dealing with MIPS MT enabled cores at a cost of slightly
2289 increased overhead in some places. If unsure say N here.
2290
2291config SYS_SUPPORTS_SCHED_SMT
2292 bool
2293
Ralf Baechlef41ae0b2006-06-05 17:24:46 +01002294config SYS_SUPPORTS_MULTITHREADING
2295 bool
2296
Ralf Baechlef088fc82006-04-05 09:45:47 +01002297config MIPS_MT_FPAFF
2298 bool "Dynamic FPU affinity for FP-intensive threads"
Ralf Baechlef088fc82006-04-05 09:45:47 +01002299 default y
Ralf Baechleb6336482014-05-23 16:29:44 +02002300 depends on MIPS_MT_SMP
Ralf Baechle07cc0c92007-07-27 19:31:10 +01002301
Leonid Yegoshinb0a668f2014-12-03 15:47:03 +00002302config MIPSR2_TO_R6_EMULATOR
2303 bool "MIPS R2-to-R6 emulator"
Paul Burton9eaa9a82016-10-17 15:34:37 +01002304 depends on CPU_MIPSR6
Paul Burtonc92e47e2018-11-07 23:14:02 +00002305 depends on MIPS_FP_SUPPORT
Leonid Yegoshinb0a668f2014-12-03 15:47:03 +00002306 default y
2307 help
2308 Choose this option if you want to run non-R6 MIPS userland code.
2309 Even if you say 'Y' here, the emulator will still be disabled by
Markos Chandras07edf0d2015-03-10 12:30:56 +00002310 default. You can enable it using the 'mipsr2emu' kernel option.
Leonid Yegoshinb0a668f2014-12-03 15:47:03 +00002311 The only reason this is a build-time option is to save ~14K from the
2312 final kernel image.
Leonid Yegoshinb0a668f2014-12-03 15:47:03 +00002313
James Hoganf35764e2018-01-15 20:54:35 +00002314config SYS_SUPPORTS_VPE_LOADER
2315 bool
2316 depends on SYS_SUPPORTS_MULTITHREADING
2317 help
2318 Indicates that the platform supports the VPE loader, and provides
2319 physical_memsize.
2320
Ralf Baechle07cc0c92007-07-27 19:31:10 +01002321config MIPS_VPE_LOADER
2322 bool "VPE loader support."
James Hoganf35764e2018-01-15 20:54:35 +00002323 depends on SYS_SUPPORTS_VPE_LOADER && MODULES
Ralf Baechle07cc0c92007-07-27 19:31:10 +01002324 select CPU_MIPSR2_IRQ_VI
2325 select CPU_MIPSR2_IRQ_EI
Ralf Baechle07cc0c92007-07-27 19:31:10 +01002326 select MIPS_MT
2327 help
2328 Includes a loader for loading an elf relocatable object
2329 onto another VPE and running it.
Ralf Baechlef088fc82006-04-05 09:45:47 +01002330
Deng-Cheng Zhu17a1d522013-10-30 15:52:07 -05002331config MIPS_VPE_LOADER_CMP
2332 bool
2333 default "y"
2334 depends on MIPS_VPE_LOADER && MIPS_CMP
2335
Deng-Cheng Zhu1a2a6d72013-10-30 15:52:06 -05002336config MIPS_VPE_LOADER_MT
2337 bool
2338 default "y"
2339 depends on MIPS_VPE_LOADER && !MIPS_CMP
2340
Ralf Baechlee01402b2005-07-14 15:57:16 +00002341config MIPS_VPE_LOADER_TOM
2342 bool "Load VPE program into memory hidden from linux"
2343 depends on MIPS_VPE_LOADER
2344 default y
2345 help
2346 The loader can use memory that is present but has been hidden from
2347 Linux using the kernel command line option "mem=xxMB". It's up to
2348 you to ensure the amount you put in the option and the space your
2349 program requires is less or equal to the amount physically present.
2350
Ralf Baechlee01402b2005-07-14 15:57:16 +00002351config MIPS_VPE_APSP_API
Ralf Baechle5e83d432005-10-29 19:32:41 +01002352 bool "Enable support for AP/SP API (RTLX)"
2353 depends on MIPS_VPE_LOADER
Ralf Baechlee01402b2005-07-14 15:57:16 +00002354
Deng-Cheng Zhuda615cf2014-01-01 16:29:03 +01002355config MIPS_VPE_APSP_API_CMP
2356 bool
2357 default "y"
2358 depends on MIPS_VPE_APSP_API && MIPS_CMP
2359
Deng-Cheng Zhu2c973ef2014-01-01 16:26:46 +01002360config MIPS_VPE_APSP_API_MT
2361 bool
2362 default "y"
2363 depends on MIPS_VPE_APSP_API && !MIPS_CMP
2364
Ralf Baechle4a16ff42008-10-04 00:06:29 +01002365config MIPS_CMP
Paul Burton5cac93b2014-01-15 10:32:00 +00002366 bool "MIPS CMP framework support (DEPRECATED)"
Markos Chandras56763192015-07-09 10:40:38 +01002367 depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
Markos Chandrasb10b43b2014-07-22 09:29:34 +01002368 select SMP
Tim Andersoneb9b5142009-06-17 16:40:34 -07002369 select SYNC_R4K
Markos Chandrasb10b43b2014-07-22 09:29:34 +01002370 select SYS_SUPPORTS_SMP
Ralf Baechle4a16ff42008-10-04 00:06:29 +01002371 select WEAK_ORDERING
2372 default n
2373 help
Paul Burton044505c2014-01-15 10:31:58 +00002374 Select this if you are using a bootloader which implements the "CMP
2375 framework" protocol (ie. YAMON) and want your kernel to make use of
2376 its ability to start secondary CPUs.
Ralf Baechle4a16ff42008-10-04 00:06:29 +01002377
Paul Burton5cac93b2014-01-15 10:32:00 +00002378 Unless you have a specific need, you should use CONFIG_MIPS_CPS
2379 instead of this.
2380
Paul Burton0ee958e2014-01-15 10:31:53 +00002381config MIPS_CPS
2382 bool "MIPS Coherent Processing System support"
Paul Burton5a3e7c02016-02-03 03:15:33 +00002383 depends on SYS_SUPPORTS_MIPS_CPS
Paul Burton0ee958e2014-01-15 10:31:53 +00002384 select MIPS_CM
Paul Burton1d8f1f52014-04-14 14:13:57 +01002385 select MIPS_CPS_PM if HOTPLUG_CPU
Paul Burton0ee958e2014-01-15 10:31:53 +00002386 select SMP
2387 select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
Paul Burton1d8f1f52014-04-14 14:13:57 +01002388 select SYS_SUPPORTS_HOTPLUG_CPU
Paul Burtonc8b77122017-06-02 14:48:52 -07002389 select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6
Paul Burton0ee958e2014-01-15 10:31:53 +00002390 select SYS_SUPPORTS_SMP
2391 select WEAK_ORDERING
Wei Lid8d32762020-12-03 14:54:43 +08002392 select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU
Paul Burton0ee958e2014-01-15 10:31:53 +00002393 help
2394 Select this if you wish to run an SMP kernel across multiple cores
2395 within a MIPS Coherent Processing System. When this option is
2396 enabled the kernel will probe for other cores and boot them with
2397 no external assistance. It is safe to enable this when hardware
2398 support is unavailable.
2399
Paul Burton3179d372014-04-14 11:00:56 +01002400config MIPS_CPS_PM
Markos Chandras39a59592014-09-18 16:09:49 +01002401 depends on MIPS_CPS
Paul Burton3179d372014-04-14 11:00:56 +01002402 bool
2403
Paul Burton9f98f3d2014-01-15 10:31:51 +00002404config MIPS_CM
2405 bool
Paul Burton3c9b4162017-08-12 19:49:42 -07002406 select MIPS_CPC
Paul Burton9f98f3d2014-01-15 10:31:51 +00002407
Paul Burton9c38cf42014-01-15 10:31:52 +00002408config MIPS_CPC
2409 bool
Ralf Baechle26009902006-04-05 09:45:45 +01002410
Linus Torvalds1da177e2005-04-16 15:20:36 -07002411config SB1_PASS_2_WORKAROUNDS
2412 bool
2413 depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
2414 default y
2415
2416config SB1_PASS_2_1_WORKAROUNDS
2417 bool
2418 depends on CPU_SB1 && CPU_SB1_PASS_2
2419 default y
2420
Markos Chandras9e2b5372014-07-21 08:46:14 +01002421choice
2422 prompt "SmartMIPS or microMIPS ASE support"
2423
2424config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
2425 bool "None"
2426 help
2427 Select this if you want neither microMIPS nor SmartMIPS support
2428
Franck Bui-Huu9693a852007-02-02 17:41:47 +01002429config CPU_HAS_SMARTMIPS
2430 depends on SYS_SUPPORTS_SMARTMIPS
Markos Chandras9e2b5372014-07-21 08:46:14 +01002431 bool "SmartMIPS"
Franck Bui-Huu9693a852007-02-02 17:41:47 +01002432 help
2433 SmartMIPS is a extension of the MIPS32 architecture aimed at
2434 increased security at both hardware and software level for
2435 smartcards. Enabling this option will allow proper use of the
2436 SmartMIPS instructions by Linux applications. However a kernel with
2437 this option will not work on a MIPS core without SmartMIPS core. If
2438 you don't know you probably don't have SmartMIPS and should say N
2439 here.
2440
Steven J. Hillbce86082013-03-25 13:27:11 -05002441config CPU_MICROMIPS
Leonid Yegoshin7fd08ca2014-10-27 10:34:11 +00002442 depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
Markos Chandras9e2b5372014-07-21 08:46:14 +01002443 bool "microMIPS"
Steven J. Hillbce86082013-03-25 13:27:11 -05002444 help
2445 When this option is enabled the kernel will be built using the
2446 microMIPS ISA
2447
Markos Chandras9e2b5372014-07-21 08:46:14 +01002448endchoice
2449
Paul Burtona5e9a692014-01-27 15:23:10 +00002450config CPU_HAS_MSA
Paul Burton0ce34172015-07-27 12:58:27 -07002451 bool "Support for the MIPS SIMD Architecture"
Paul Burtona5e9a692014-01-27 15:23:10 +00002452 depends on CPU_SUPPORTS_MSA
Paul Burtonc92e47e2018-11-07 23:14:02 +00002453 depends on MIPS_FP_SUPPORT
Paul Burton2a6cb6692014-07-11 16:47:14 +01002454 depends on 64BIT || MIPS_O32_FP64_SUPPORT
Paul Burtona5e9a692014-01-27 15:23:10 +00002455 help
2456 MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
2457 and a set of SIMD instructions to operate on them. When this option
Paul Burton1db1af82014-01-27 15:23:11 +00002458 is enabled the kernel will support allocating & switching MSA
2459 vector register contexts. If you know that your kernel will only be
2460 running on CPUs which do not support MSA or that your userland will
2461 not be making use of it then you may wish to say N here to reduce
2462 the size & complexity of your kernel.
Paul Burtona5e9a692014-01-27 15:23:10 +00002463
2464 If unsure, say Y.
2465
Linus Torvalds1da177e2005-04-16 15:20:36 -07002466config CPU_HAS_WB
Ralf Baechlef7062dd2006-04-24 14:58:53 +01002467 bool
Ralf Baechlee01402b2005-07-14 15:57:16 +00002468
Kevin Cernekeedf0ac8a2011-11-16 01:25:45 +00002469config XKS01
2470 bool
2471
Jiaxun Yangba9196d2020-01-13 18:14:59 +08002472config CPU_HAS_DIEI
2473 depends on !CPU_DIEI_BROKEN
2474 bool
2475
2476config CPU_DIEI_BROKEN
2477 bool
2478
Florian Fainelli8256b172016-02-09 12:55:51 -08002479config CPU_HAS_RIXI
2480 bool
2481
Alexander Lobakin18d84e2e2020-01-22 13:58:50 +03002482config CPU_NO_LOAD_STORE_LR
Yasha Cherikovsky932afde2018-09-26 14:16:15 +03002483 bool
2484 help
Alexander Lobakin18d84e2e2020-01-22 13:58:50 +03002485 CPU lacks support for unaligned load and store instructions:
Yasha Cherikovsky932afde2018-09-26 14:16:15 +03002486 LWL, LWR, SWL, SWR (Load/store word left/right).
Alexander Lobakin18d84e2e2020-01-22 13:58:50 +03002487 LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit
2488 systems).
Yasha Cherikovsky932afde2018-09-26 14:16:15 +03002489
Ralf Baechlef41ae0b2006-06-05 17:24:46 +01002490#
2491# Vectored interrupt mode is an R2 feature
2492#
Ralf Baechlee01402b2005-07-14 15:57:16 +00002493config CPU_MIPSR2_IRQ_VI
Ralf Baechlef41ae0b2006-06-05 17:24:46 +01002494 bool
Ralf Baechlee01402b2005-07-14 15:57:16 +00002495
Ralf Baechlef41ae0b2006-06-05 17:24:46 +01002496#
2497# Extended interrupt mode is an R2 feature
2498#
Ralf Baechlee01402b2005-07-14 15:57:16 +00002499config CPU_MIPSR2_IRQ_EI
Ralf Baechlef41ae0b2006-06-05 17:24:46 +01002500 bool
Ralf Baechlee01402b2005-07-14 15:57:16 +00002501
Linus Torvalds1da177e2005-04-16 15:20:36 -07002502config CPU_HAS_SYNC
2503 bool
2504 depends on !CPU_R3000
2505 default y
2506
2507#
Maciej W. Rozycki20d60d92007-10-23 12:43:11 +01002508# CPU non-features
2509#
Thomas Bogendoerferb56d1ca2022-02-18 11:04:39 +01002510
2511# Work around the "daddi" and "daddiu" CPU errata:
2512#
2513# - The `daddi' instruction fails to trap on overflow.
2514# "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2515# erratum #23
2516#
2517# - The `daddiu' instruction can produce an incorrect result.
2518# "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2519# erratum #41
2520# "MIPS R4000MC Errata, Processor Revision 2.2 and 3.0", erratum
2521# #15
2522# "MIPS R4400PC/SC Errata, Processor Revision 1.0", erratum #7
2523# "MIPS R4400MC Errata, Processor Revision 1.0", erratum #5
Maciej W. Rozycki20d60d92007-10-23 12:43:11 +01002524config CPU_DADDI_WORKAROUNDS
2525 bool
2526
Thomas Bogendoerferb56d1ca2022-02-18 11:04:39 +01002527# Work around certain R4000 CPU errata (as implemented by GCC):
2528#
2529# - A double-word or a variable shift may give an incorrect result
2530# if executed immediately after starting an integer division:
2531# "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2532# erratum #28
2533# "MIPS R4000MC Errata, Processor Revision 2.2 and 3.0", erratum
2534# #19
2535#
2536# - A double-word or a variable shift may give an incorrect result
2537# if executed while an integer multiplication is in progress:
2538# "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2539# errata #16 & #28
2540#
2541# - An integer division may give an incorrect result if started in
2542# a delay slot of a taken branch or a jump:
2543# "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2544# erratum #52
Maciej W. Rozycki20d60d92007-10-23 12:43:11 +01002545config CPU_R4000_WORKAROUNDS
2546 bool
2547 select CPU_R4400_WORKAROUNDS
2548
Thomas Bogendoerferb56d1ca2022-02-18 11:04:39 +01002549# Work around certain R4400 CPU errata (as implemented by GCC):
2550#
2551# - A double-word or a variable shift may give an incorrect result
2552# if executed immediately after starting an integer division:
2553# "MIPS R4400MC Errata, Processor Revision 1.0", erratum #10
2554# "MIPS R4400MC Errata, Processor Revision 2.0 & 3.0", erratum #4
Maciej W. Rozycki20d60d92007-10-23 12:43:11 +01002555config CPU_R4400_WORKAROUNDS
2556 bool
2557
Paul Burton071d2f02019-10-01 23:04:32 +00002558config CPU_R4X00_BUGS64
2559 bool
2560 default y if SYS_HAS_CPU_R4X00 && 64BIT && (TARGET_ISA_REV < 1)
2561
Paul Burton4edf00a2016-05-06 14:36:23 +01002562config MIPS_ASID_SHIFT
2563 int
Thomas Bogendoerfer455481f2022-02-22 10:04:28 +01002564 default 6 if CPU_R3000
Paul Burton4edf00a2016-05-06 14:36:23 +01002565 default 0
2566
2567config MIPS_ASID_BITS
2568 int
Paul Burton2db003a2016-05-06 14:36:24 +01002569 default 0 if MIPS_ASID_BITS_VARIABLE
Thomas Bogendoerfer455481f2022-02-22 10:04:28 +01002570 default 6 if CPU_R3000
Paul Burton4edf00a2016-05-06 14:36:23 +01002571 default 8
2572
Paul Burton2db003a2016-05-06 14:36:24 +01002573config MIPS_ASID_BITS_VARIABLE
2574 bool
2575
Marcin Nowakowski4a5dc51e2018-02-09 22:11:06 +00002576config MIPS_CRC_SUPPORT
2577 bool
2578
Thomas Bogendoerfer802b83622020-08-24 18:32:43 +02002579# R4600 erratum. Due to the lack of errata information the exact
2580# technical details aren't known. I've experimentally found that disabling
2581# interrupts during indexed I-cache flushes seems to be sufficient to deal
2582# with the issue.
2583config WAR_R4600_V1_INDEX_ICACHEOP
2584 bool
2585
Thomas Bogendoerfer5e5b6522020-08-24 18:32:44 +02002586# Pleasures of the R4600 V1.x. Cite from the IDT R4600 V1.7 errata:
2587#
2588# 18. The CACHE instructions Hit_Writeback_Invalidate_D, Hit_Writeback_D,
2589# Hit_Invalidate_D and Create_Dirty_Excl_D should only be
2590# executed if there is no other dcache activity. If the dcache is
Colin Ian King18ff14c2020-10-27 18:34:30 +00002591# accessed for another instruction immediately preceding when these
Thomas Bogendoerfer5e5b6522020-08-24 18:32:44 +02002592# cache instructions are executing, it is possible that the dcache
2593# tag match outputs used by these cache instructions will be
2594# incorrect. These cache instructions should be preceded by at least
2595# four instructions that are not any kind of load or store
2596# instruction.
2597#
2598# This is not allowed: lw
2599# nop
2600# nop
2601# nop
2602# cache Hit_Writeback_Invalidate_D
2603#
2604# This is allowed: lw
2605# nop
2606# nop
2607# nop
2608# nop
2609# cache Hit_Writeback_Invalidate_D
2610config WAR_R4600_V1_HIT_CACHEOP
2611 bool
2612
Thomas Bogendoerfer44def342020-08-24 18:32:45 +02002613# Writeback and invalidate the primary cache dcache before DMA.
2614#
2615# R4600 v2.0 bug: "The CACHE instructions Hit_Writeback_Inv_D,
2616# Hit_Writeback_D, Hit_Invalidate_D and Create_Dirty_Exclusive_D will only
2617# operate correctly if the internal data cache refill buffer is empty. These
2618# CACHE instructions should be separated from any potential data cache miss
2619# by a load instruction to an uncached address to empty the response buffer."
2620# (Revision 2.0 device errata from IDT available on https://www.idt.com/
2621# in .pdf format.)
2622config WAR_R4600_V2_HIT_CACHEOP
2623 bool
2624
Thomas Bogendoerfer24a1c022020-08-24 18:32:47 +02002625# From TX49/H2 manual: "If the instruction (i.e. CACHE) is issued for
2626# the line which this instruction itself exists, the following
2627# operation is not guaranteed."
2628#
2629# Workaround: do two phase flushing for Index_Invalidate_I
2630config WAR_TX49XX_ICACHE_INDEX_INV
2631 bool
2632
Thomas Bogendoerfer886ee132020-08-24 18:32:48 +02002633# The RM7000 processors and the E9000 cores have a bug (though PMC-Sierra
2634# opposes it being called that) where invalid instructions in the same
2635# I-cache line worth of instructions being fetched may case spurious
2636# exceptions.
2637config WAR_ICACHE_REFILLS
2638 bool
2639
Thomas Bogendoerfer256ec482020-08-24 18:32:49 +02002640# On the R10000 up to version 2.6 (not sure about 2.7) there is a bug that
2641# may cause ll / sc and lld / scd sequences to execute non-atomically.
2642config WAR_R10000_LLSC
2643 bool
2644
Thomas Bogendoerfera7fbed92020-08-24 18:32:50 +02002645# 34K core erratum: "Problems Executing the TLBR Instruction"
2646config WAR_MIPS34K_MISSED_ITLB
2647 bool
2648
Maciej W. Rozycki20d60d92007-10-23 12:43:11 +01002649#
Linus Torvalds1da177e2005-04-16 15:20:36 -07002650# - Highmem only makes sense for the 32-bit kernel.
2651# - The current highmem code will only work properly on physically indexed
2652# caches such as R3000, SB1, R7000 or those that look like they're virtually
2653# indexed such as R4000/R4400 SC and MC versions or R10000. So for the
2654# moment we protect the user and offer the highmem option only on machines
2655# where it's known to be safe. This will not offer highmem on a few systems
2656# such as MIPS32 and MIPS64 CPUs which may have virtual and physically
2657# indexed CPUs but we're playing safe.
Ralf Baechle797798c2005-08-10 15:17:11 +00002658# - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
2659# know they might have memory configurations that could make use of highmem
2660# support.
Linus Torvalds1da177e2005-04-16 15:20:36 -07002661#
2662config HIGHMEM
2663 bool "High Memory Support"
Leonid Yegoshina6e18782013-12-03 10:22:26 +00002664 depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
Thomas Gleixnera4c33e82020-11-03 10:27:25 +01002665 select KMAP_LOCAL
Ralf Baechle797798c2005-08-10 15:17:11 +00002666
2667config CPU_SUPPORTS_HIGHMEM
2668 bool
2669
2670config SYS_SUPPORTS_HIGHMEM
2671 bool
Linus Torvalds1da177e2005-04-16 15:20:36 -07002672
Franck Bui-Huu9693a852007-02-02 17:41:47 +01002673config SYS_SUPPORTS_SMARTMIPS
2674 bool
2675
Steven J. Hilla6a48342013-02-05 16:52:02 -06002676config SYS_SUPPORTS_MICROMIPS
2677 bool
2678
Ralf Baechle377cb1b2014-04-29 01:49:24 +02002679config SYS_SUPPORTS_MIPS16
2680 bool
2681 help
2682 This option must be set if a kernel might be executed on a MIPS16-
2683 enabled CPU even if MIPS16 is not actually being used. In other
2684 words, it makes the kernel MIPS16-tolerant.
2685
Paul Burtona5e9a692014-01-27 15:23:10 +00002686config CPU_SUPPORTS_MSA
2687 bool
2688
Yoichi Yuasab4819b52005-06-25 14:54:31 -07002689config ARCH_FLATMEM_ENABLE
2690 def_bool y
Jiaxun Yang268a2d62019-10-20 22:43:13 +08002691 depends on !NUMA && !CPU_LOONGSON2EF
Yoichi Yuasab4819b52005-06-25 14:54:31 -07002692
Atsushi Nemotob1c6cd42006-07-03 00:09:47 +09002693config ARCH_SPARSEMEM_ENABLE
2694 bool
Mike Rapoport397dc002019-09-16 14:13:10 +03002695 select SPARSEMEM_STATIC if !SGI_IP27
Atsushi Nemoto31473742006-07-03 00:09:47 +09002696
Ralf Baechled8cb4e12006-06-11 23:03:08 +01002697config NUMA
2698 bool "NUMA Support"
2699 depends on SYS_SUPPORTS_NUMA
Tiezhu Yangcf8194e2020-12-03 20:32:52 +08002700 select SMP
Kefeng Wang7ecd19c2022-01-19 18:07:41 -08002701 select HAVE_SETUP_PER_CPU_AREA
2702 select NEED_PER_CPU_EMBED_FIRST_CHUNK
Ralf Baechled8cb4e12006-06-11 23:03:08 +01002703 help
2704 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
2705 Access). This option improves performance on systems with more
2706 than two nodes; on two node systems it is generally better to
Randy Dunlap172a37e2020-01-31 17:55:43 -08002707 leave it disabled; on single node systems leave this option
Ralf Baechled8cb4e12006-06-11 23:03:08 +01002708 disabled.
2709
2710config SYS_SUPPORTS_NUMA
2711 bool
2712
Feiyang Chenf8f9f212022-03-19 17:40:02 +08002713config HAVE_ARCH_NODEDATA_EXTENSION
2714 bool
2715
Matt Redfearn8c530ea2016-03-31 10:05:39 +01002716config RELOCATABLE
2717 bool "Relocatable kernel"
Serge Seminab7c01f2020-05-21 17:07:14 +03002718 depends on SYS_SUPPORTS_RELOCATABLE
2719 depends on CPU_MIPS32_R2 || CPU_MIPS64_R2 || \
2720 CPU_MIPS32_R5 || CPU_MIPS64_R5 || \
2721 CPU_MIPS32_R6 || CPU_MIPS64_R6 || \
Jinyang Hea307a4c2020-11-25 18:07:46 +08002722 CPU_P5600 || CAVIUM_OCTEON_SOC || \
2723 CPU_LOONGSON64
Matt Redfearn8c530ea2016-03-31 10:05:39 +01002724 help
2725 This builds a kernel image that retains relocation information
2726 so it can be loaded someplace besides the default 1MB.
2727 The relocations make the kernel binary about 15% larger,
2728 but are discarded at runtime
2729
Matt Redfearn069fd762016-03-31 10:05:34 +01002730config RELOCATION_TABLE_SIZE
2731 hex "Relocation table size"
2732 depends on RELOCATABLE
2733 range 0x0 0x01000000
Jinyang Hea307a4c2020-11-25 18:07:46 +08002734 default "0x00200000" if CPU_LOONGSON64
Matt Redfearn069fd762016-03-31 10:05:34 +01002735 default "0x00100000"
Masahiro Yamadaa7f7f622020-06-14 01:50:22 +09002736 help
Matt Redfearn069fd762016-03-31 10:05:34 +01002737 A table of relocation data will be appended to the kernel binary
2738 and parsed at boot to fix up the relocated kernel.
2739
2740 This option allows the amount of space reserved for the table to be
2741 adjusted, although the default of 1Mb should be ok in most cases.
2742
2743 The build will fail and a valid size suggested if this is too small.
2744
2745 If unsure, leave at the default value.
2746
Matt Redfearn405bc8f2016-03-31 10:05:41 +01002747config RANDOMIZE_BASE
2748 bool "Randomize the address of the kernel image"
2749 depends on RELOCATABLE
Masahiro Yamadaa7f7f622020-06-14 01:50:22 +09002750 help
Enrico Weigelt, metux IT consult371a4152019-03-11 16:54:27 +01002751 Randomizes the physical and virtual address at which the
2752 kernel image is loaded, as a security feature that
2753 deters exploit attempts relying on knowledge of the location
2754 of kernel internals.
Matt Redfearn405bc8f2016-03-31 10:05:41 +01002755
Enrico Weigelt, metux IT consult371a4152019-03-11 16:54:27 +01002756 Entropy is generated using any coprocessor 0 registers available.
Matt Redfearn405bc8f2016-03-31 10:05:41 +01002757
Enrico Weigelt, metux IT consult371a4152019-03-11 16:54:27 +01002758 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
Matt Redfearn405bc8f2016-03-31 10:05:41 +01002759
Enrico Weigelt, metux IT consult371a4152019-03-11 16:54:27 +01002760 If unsure, say N.
Matt Redfearn405bc8f2016-03-31 10:05:41 +01002761
2762config RANDOMIZE_BASE_MAX_OFFSET
2763 hex "Maximum kASLR offset" if EXPERT
2764 depends on RANDOMIZE_BASE
2765 range 0x0 0x40000000 if EVA || 64BIT
2766 range 0x0 0x08000000
2767 default "0x01000000"
Masahiro Yamadaa7f7f622020-06-14 01:50:22 +09002768 help
Matt Redfearn405bc8f2016-03-31 10:05:41 +01002769 When kASLR is active, this provides the maximum offset that will
2770 be applied to the kernel image. It should be set according to the
2771 amount of physical RAM available in the target system minus
2772 PHYSICAL_START and must be a power of 2.
2773
2774 This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
2775 EVA or 64-bit. The default is 16Mb.
2776
Yasunori Gotoc80d79d2006-04-10 22:53:53 -07002777config NODES_SHIFT
2778 int
2779 default "6"
Mike Rapoporta9ee6cf2021-06-28 19:43:01 -07002780 depends on NUMA
Yasunori Gotoc80d79d2006-04-10 22:53:53 -07002781
Deng-Cheng Zhu14f70012010-10-12 19:37:22 +08002782config HW_PERF_EVENTS
2783 bool "Enable hardware performance counter support for perf events"
Thomas Bogendoerfer95b8a5e2021-10-20 14:49:13 +02002784 depends on PERF_EVENTS && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_LOONGSON64)
Deng-Cheng Zhu14f70012010-10-12 19:37:22 +08002785 default y
2786 help
2787 Enable hardware performance counter support for perf events. If
2788 disabled, perf events will use software events only.
2789
Tiezhu Yangbe8fa1c2020-02-05 12:08:33 +08002790config DMI
2791 bool "Enable DMI scanning"
2792 depends on MACH_LOONGSON64
2793 select DMI_SCAN_MACHINE_NON_EFI_FALLBACK
2794 default y
2795 help
2796 Enabled scanning of DMI to identify machine quirks. Say Y
2797 here unless you have verified that your setup is not
2798 affected by entries in the DMI blacklist. Required by PNP
2799 BIOS code.
2800
Linus Torvalds1da177e2005-04-16 15:20:36 -07002801config SMP
2802 bool "Multi-Processing support"
Ralf Baechlee73ea272006-06-04 11:51:46 +01002803 depends on SYS_SUPPORTS_SMP
2804 help
Linus Torvalds1da177e2005-04-16 15:20:36 -07002805 This enables support for systems with more than one CPU. If you have
Robert Graffham4a474152014-01-23 15:55:29 -08002806 a system with only one CPU, say N. If you have a system with more
2807 than one CPU, say Y.
Linus Torvalds1da177e2005-04-16 15:20:36 -07002808
Robert Graffham4a474152014-01-23 15:55:29 -08002809 If you say N here, the kernel will run on uni- and multiprocessor
Linus Torvalds1da177e2005-04-16 15:20:36 -07002810 machines, but will use only one CPU of a multiprocessor machine. If
2811 you say Y here, the kernel will run on many, but not all,
Robert Graffham4a474152014-01-23 15:55:29 -08002812 uniprocessor machines. On a uniprocessor machine, the kernel
Linus Torvalds1da177e2005-04-16 15:20:36 -07002813 will run faster if you say N here.
2814
2815 People using multiprocessor machines who say Y here should also say
2816 Y to "Enhanced Real Time Clock Support", below.
2817
Adrian Bunk03502fa2008-02-03 15:50:21 +02002818 See also the SMP-HOWTO available at
Alexander A. Klimovef054ad2020-07-14 21:12:26 +02002819 <https://www.tldp.org/docs.html#howto>.
Linus Torvalds1da177e2005-04-16 15:20:36 -07002820
2821 If you don't know what to do here, say N.
2822
Matt Redfearn7840d612016-07-07 08:50:40 +01002823config HOTPLUG_CPU
2824 bool "Support for hot-pluggable CPUs"
2825 depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
2826 help
2827 Say Y here to allow turning CPUs off and on. CPUs can be
2828 controlled through /sys/devices/system/cpu.
2829 (Note: power management support will enable this option
2830 automatically on SMP systems. )
2831 Say N if you want to disable CPU hotplug.
2832
Ralf Baechle87353d82007-11-19 12:23:51 +00002833config SMP_UP
2834 bool
2835
Ralf Baechle4a16ff42008-10-04 00:06:29 +01002836config SYS_SUPPORTS_MIPS_CMP
2837 bool
2838
Paul Burton0ee958e2014-01-15 10:31:53 +00002839config SYS_SUPPORTS_MIPS_CPS
2840 bool
2841
Ralf Baechlee73ea272006-06-04 11:51:46 +01002842config SYS_SUPPORTS_SMP
2843 bool
2844
Ralf Baechle130e2fb2007-02-06 16:53:15 +00002845config NR_CPUS_DEFAULT_4
2846 bool
2847
2848config NR_CPUS_DEFAULT_8
2849 bool
2850
2851config NR_CPUS_DEFAULT_16
2852 bool
2853
2854config NR_CPUS_DEFAULT_32
2855 bool
2856
2857config NR_CPUS_DEFAULT_64
2858 bool
2859
Linus Torvalds1da177e2005-04-16 15:20:36 -07002860config NR_CPUS
Jayachandran Ca91796a2014-04-29 20:07:40 +05302861 int "Maximum number of CPUs (2-256)"
2862 range 2 256
Linus Torvalds1da177e2005-04-16 15:20:36 -07002863 depends on SMP
Ralf Baechle130e2fb2007-02-06 16:53:15 +00002864 default "4" if NR_CPUS_DEFAULT_4
2865 default "8" if NR_CPUS_DEFAULT_8
2866 default "16" if NR_CPUS_DEFAULT_16
2867 default "32" if NR_CPUS_DEFAULT_32
2868 default "64" if NR_CPUS_DEFAULT_64
Linus Torvalds1da177e2005-04-16 15:20:36 -07002869 help
2870 This allows you to specify the maximum number of CPUs which this
2871 kernel will support. The maximum supported value is 32 for 32-bit
2872 kernel and 64 for 64-bit kernels; the minimum value which makes
Atsushi Nemoto72ede9b2007-03-18 01:01:39 +09002873 sense is 1 for Qemu (useful only for kernel debugging purposes)
2874 and 2 for all others.
Linus Torvalds1da177e2005-04-16 15:20:36 -07002875
2876 This is purely to save memory - each supported CPU adds
Atsushi Nemoto72ede9b2007-03-18 01:01:39 +09002877 approximately eight kilobytes to the kernel image. For best
2878 performance should round up your number of processors to the next
2879 power of two.
Linus Torvalds1da177e2005-04-16 15:20:36 -07002880
Al Cooper399aaa22012-07-13 16:44:53 -04002881config MIPS_PERF_SHARED_TC_COUNTERS
2882 bool
2883
David Daney7820b842017-09-28 12:34:04 -05002884config MIPS_NR_CPU_NR_MAP_1024
2885 bool
2886
2887config MIPS_NR_CPU_NR_MAP
2888 int
2889 depends on SMP
2890 default 1024 if MIPS_NR_CPU_NR_MAP_1024
2891 default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024
2892
Atsushi Nemoto1723b4a2006-06-20 00:19:13 +09002893#
2894# Timer Interrupt Frequency Configuration
2895#
2896
2897choice
2898 prompt "Timer frequency"
2899 default HZ_250
2900 help
Enrico Weigelt, metux IT consult371a4152019-03-11 16:54:27 +01002901 Allows the configuration of the timer frequency.
Atsushi Nemoto1723b4a2006-06-20 00:19:13 +09002902
Paul Burton67596572015-09-22 10:16:39 -07002903 config HZ_24
2904 bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
2905
Atsushi Nemoto1723b4a2006-06-20 00:19:13 +09002906 config HZ_48
Ralf Baechle0f873582008-02-25 16:55:29 +00002907 bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
Atsushi Nemoto1723b4a2006-06-20 00:19:13 +09002908
2909 config HZ_100
2910 bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
2911
2912 config HZ_128
2913 bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
2914
2915 config HZ_250
2916 bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
2917
2918 config HZ_256
2919 bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
2920
2921 config HZ_1000
2922 bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
2923
2924 config HZ_1024
2925 bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
2926
2927endchoice
2928
Paul Burton67596572015-09-22 10:16:39 -07002929config SYS_SUPPORTS_24HZ
2930 bool
2931
Atsushi Nemoto1723b4a2006-06-20 00:19:13 +09002932config SYS_SUPPORTS_48HZ
2933 bool
2934
2935config SYS_SUPPORTS_100HZ
2936 bool
2937
2938config SYS_SUPPORTS_128HZ
2939 bool
2940
2941config SYS_SUPPORTS_250HZ
2942 bool
2943
2944config SYS_SUPPORTS_256HZ
2945 bool
2946
2947config SYS_SUPPORTS_1000HZ
2948 bool
2949
2950config SYS_SUPPORTS_1024HZ
2951 bool
2952
2953config SYS_SUPPORTS_ARBIT_HZ
2954 bool
Paul Burton67596572015-09-22 10:16:39 -07002955 default y if !SYS_SUPPORTS_24HZ && \
2956 !SYS_SUPPORTS_48HZ && \
2957 !SYS_SUPPORTS_100HZ && \
2958 !SYS_SUPPORTS_128HZ && \
2959 !SYS_SUPPORTS_250HZ && \
2960 !SYS_SUPPORTS_256HZ && \
2961 !SYS_SUPPORTS_1000HZ && \
Atsushi Nemoto1723b4a2006-06-20 00:19:13 +09002962 !SYS_SUPPORTS_1024HZ
2963
2964config HZ
2965 int
Paul Burton67596572015-09-22 10:16:39 -07002966 default 24 if HZ_24
Atsushi Nemoto1723b4a2006-06-20 00:19:13 +09002967 default 48 if HZ_48
2968 default 100 if HZ_100
2969 default 128 if HZ_128
2970 default 250 if HZ_250
2971 default 256 if HZ_256
2972 default 1000 if HZ_1000
2973 default 1024 if HZ_1024
2974
Deng-Cheng Zhu96685b12015-03-07 10:30:19 -08002975config SCHED_HRTICK
2976 def_bool HIGH_RES_TIMERS
2977
Atsushi Nemotoea6e9422007-01-16 23:29:11 +09002978config KEXEC
Kees Cook7d607172013-01-16 18:53:19 -08002979 bool "Kexec system call"
Dave Young2965faa2015-09-09 15:38:55 -07002980 select KEXEC_CORE
Atsushi Nemotoea6e9422007-01-16 23:29:11 +09002981 help
2982 kexec is a system call that implements the ability to shutdown your
2983 current kernel, and to start another kernel. It is like a reboot
David Sterba3dde6ad2007-05-09 07:12:20 +02002984 but it is independent of the system firmware. And like a reboot
Atsushi Nemotoea6e9422007-01-16 23:29:11 +09002985 you can start any kernel with it, not just Linux.
2986
Matt LaPlante01dd2fb2007-10-20 01:34:40 +02002987 The name comes from the similarity to the exec system call.
Atsushi Nemotoea6e9422007-01-16 23:29:11 +09002988
2989 It is an ongoing process to be certain the hardware in a machine
2990 is properly shutdown, so do not be surprised if this code does not
Geert Uytterhoevenbf220692013-08-20 21:38:03 +02002991 initially work for you. As of this writing the exact hardware
2992 interface is strongly in flux, so no good recommendation can be
2993 made.
Atsushi Nemotoea6e9422007-01-16 23:29:11 +09002994
Ralf Baechle7aa1c8f2012-10-11 18:14:58 +02002995config CRASH_DUMP
Marcin Nowakowskibff323d2016-12-02 09:58:29 +01002996 bool "Kernel crash dumps"
2997 help
Ralf Baechle7aa1c8f2012-10-11 18:14:58 +02002998 Generate crash dump after being started by kexec.
2999 This should be normally only set in special crash dump kernels
3000 which are loaded in the main kernel with kexec-tools into
3001 a specially reserved region and then later executed after
3002 a crash by kdump/kexec. The crash dump kernel must be compiled
3003 to a memory address not used by the main kernel or firmware using
3004 PHYSICAL_START.
3005
3006config PHYSICAL_START
Marcin Nowakowskibff323d2016-12-02 09:58:29 +01003007 hex "Physical address where the kernel is loaded"
Maciej W. Rozycki8bda3e22018-03-26 19:11:51 +01003008 default "0xffffffff84000000"
Marcin Nowakowskibff323d2016-12-02 09:58:29 +01003009 depends on CRASH_DUMP
3010 help
Ralf Baechle7aa1c8f2012-10-11 18:14:58 +02003011 This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
3012 If you plan to use kernel for capturing the crash dump change
3013 this value to start of the reserved region (the "X" value as
3014 specified in the "crashkernel=YM@XM" command line boot parameter
3015 passed to the panic-ed kernel).
3016
Paul Burton597ce172013-11-22 13:12:07 +00003017config MIPS_O32_FP64_SUPPORT
Paul Burtonb7f1e272018-11-07 23:13:58 +00003018 bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6
Paul Burton597ce172013-11-22 13:12:07 +00003019 depends on 32BIT || MIPS32_O32
Paul Burton597ce172013-11-22 13:12:07 +00003020 help
3021 When this is enabled, the kernel will support use of 64-bit floating
3022 point registers with binaries using the O32 ABI along with the
3023 EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
3024 32-bit MIPS systems this support is at the cost of increasing the
3025 size and complexity of the compiled FPU emulator. Thus if you are
3026 running a MIPS32 system and know that none of your userland binaries
3027 will require 64-bit floating point, you may wish to reduce the size
3028 of your kernel & potentially improve FP emulation performance by
3029 saying N here.
3030
Paul Burton06e2e882014-02-14 17:55:18 +00003031 Although binutils currently supports use of this flag the details
3032 concerning its effect upon the O32 ABI in userland are still being
Colin Ian King18ff14c2020-10-27 18:34:30 +00003033 worked on. In order to avoid userland becoming dependent upon current
Paul Burton06e2e882014-02-14 17:55:18 +00003034 behaviour before the details have been finalised, this option should
3035 be considered experimental and only enabled by those working upon
3036 said details.
3037
3038 If unsure, say N.
Paul Burton597ce172013-11-22 13:12:07 +00003039
Dezhong Diaof2ffa5a2010-10-13 00:52:46 -06003040config USE_OF
Jonas Gorski0b3e06f2012-09-18 11:28:54 +02003041 bool
Dezhong Diaof2ffa5a2010-10-13 00:52:46 -06003042 select OF
Stephen Neuendorffere6ce1322010-11-18 15:54:56 -08003043 select OF_EARLY_FLATTREE
Grant Likelyabd23632012-02-24 08:07:06 -07003044 select IRQ_DOMAIN
Dezhong Diaof2ffa5a2010-10-13 00:52:46 -06003045
Dengcheng Zhu2fe8ea32018-09-11 14:49:24 -07003046config UHI_BOOT
3047 bool
3048
Andrew Bresticker7fafb062014-08-21 13:04:20 -07003049config BUILTIN_DTB
3050 bool
3051
Jonas Gorski1da8f172015-04-12 12:24:58 +02003052choice
Jonas Gorski5b24d522015-10-12 13:13:01 +02003053 prompt "Kernel appended dtb support" if USE_OF
Jonas Gorski1da8f172015-04-12 12:24:58 +02003054 default MIPS_NO_APPENDED_DTB
3055
3056 config MIPS_NO_APPENDED_DTB
3057 bool "None"
3058 help
3059 Do not enable appended dtb support.
3060
Aaro Koskinen87db5372015-09-11 17:46:14 +03003061 config MIPS_ELF_APPENDED_DTB
3062 bool "vmlinux"
3063 help
3064 With this option, the boot code will look for a device tree binary
3065 DTB) included in the vmlinux ELF section .appended_dtb. By default
3066 it is empty and the DTB can be appended using binutils command
3067 objcopy:
3068
3069 objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
3070
Colin Ian King18ff14c2020-10-27 18:34:30 +00003071 This is meant as a backward compatibility convenience for those
Aaro Koskinen87db5372015-09-11 17:46:14 +03003072 systems with a bootloader that can't be upgraded to accommodate
3073 the documented boot protocol using a device tree.
3074
Jonas Gorski1da8f172015-04-12 12:24:58 +02003075 config MIPS_RAW_APPENDED_DTB
Jonas Gorskib8f54f22016-06-20 11:27:36 +02003076 bool "vmlinux.bin or vmlinuz.bin"
Jonas Gorski1da8f172015-04-12 12:24:58 +02003077 help
3078 With this option, the boot code will look for a device tree binary
Jonas Gorskib8f54f22016-06-20 11:27:36 +02003079 DTB) appended to raw vmlinux.bin or vmlinuz.bin.
Jonas Gorski1da8f172015-04-12 12:24:58 +02003080 (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
3081
3082 This is meant as a backward compatibility convenience for those
3083 systems with a bootloader that can't be upgraded to accommodate
3084 the documented boot protocol using a device tree.
3085
3086 Beware that there is very little in terms of protection against
3087 this option being confused by leftover garbage in memory that might
3088 look like a DTB header after a reboot if no actual DTB is appended
3089 to vmlinux.bin. Do not leave this option active in a production kernel
3090 if you don't intend to always append a DTB.
3091endchoice
3092
Jonas Gorski20249722015-10-12 13:13:02 +02003093choice
3094 prompt "Kernel command line type" if !CMDLINE_OVERRIDE
Jonas Gorski2bcef9b2015-10-12 13:13:03 +02003095 default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
Jiaxun Yang87fcfa72020-03-25 11:55:02 +08003096 !MACH_LOONGSON64 && !MIPS_MALTA && \
Jonas Gorski2bcef9b2015-10-12 13:13:03 +02003097 !CAVIUM_OCTEON_SOC
Jonas Gorski20249722015-10-12 13:13:02 +02003098 default MIPS_CMDLINE_FROM_BOOTLOADER
3099
3100 config MIPS_CMDLINE_FROM_DTB
3101 depends on USE_OF
3102 bool "Dtb kernel arguments if available"
3103
3104 config MIPS_CMDLINE_DTB_EXTEND
3105 depends on USE_OF
3106 bool "Extend dtb kernel arguments with bootloader arguments"
3107
3108 config MIPS_CMDLINE_FROM_BOOTLOADER
3109 bool "Bootloader kernel arguments if available"
Rabin Vincented47e152016-04-28 11:03:09 +02003110
3111 config MIPS_CMDLINE_BUILTIN_EXTEND
3112 depends on CMDLINE_BOOL
3113 bool "Extend builtin kernel arguments with bootloader arguments"
Jonas Gorski20249722015-10-12 13:13:02 +02003114endchoice
3115
Ralf Baechle5e83d432005-10-29 19:32:41 +01003116endmenu
3117
Atsushi Nemoto1df0f0f2006-09-26 23:44:01 +09003118config LOCKDEP_SUPPORT
3119 bool
3120 default y
3121
3122config STACKTRACE_SUPPORT
3123 bool
3124 default y
3125
Kirill A. Shutemova728ab52015-04-14 15:45:51 -07003126config PGTABLE_LEVELS
3127 int
Alex Belits3377e222017-02-16 17:27:34 -08003128 default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
Huang Pei41ce0972021-11-25 18:59:48 +08003129 default 3 if 64BIT && (!PAGE_SIZE_64KB || MIPS_VA_BITS_48)
Kirill A. Shutemova728ab52015-04-14 15:45:51 -07003130 default 2
3131
Paul Burton6c359eb2018-07-27 18:23:20 -07003132config MIPS_AUTO_PFN_OFFSET
3133 bool
3134
Linus Torvalds1da177e2005-04-16 15:20:36 -07003135menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
3136
Paul Burtonc5611df2016-10-05 18:18:12 +01003137config PCI_DRIVERS_GENERIC
Christoph Hellwig2eac9c22018-11-15 20:05:33 +01003138 select PCI_DOMAINS_GENERIC if PCI
Paul Burtonc5611df2016-10-05 18:18:12 +01003139 bool
3140
3141config PCI_DRIVERS_LEGACY
3142 def_bool !PCI_DRIVERS_GENERIC
3143 select NO_GENERIC_PCI_IOPORT_MAP
Christoph Hellwig2eac9c22018-11-15 20:05:33 +01003144 select PCI_DOMAINS if PCI
Linus Torvalds1da177e2005-04-16 15:20:36 -07003145
3146#
3147# ISA support is now enabled via select. Too many systems still have the one
3148# or other ISA chip on the board that users don't know about so don't expect
3149# users to choose the right thing ...
3150#
3151config ISA
3152 bool
3153
Linus Torvalds1da177e2005-04-16 15:20:36 -07003154config TC
3155 bool "TURBOchannel support"
3156 depends on MACH_DECSTATION
3157 help
Justin P. Mattock50a23e62010-10-16 10:36:23 -07003158 TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
3159 processors. TURBOchannel programming specifications are available
3160 at:
3161 <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
3162 and:
3163 <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
3164 Linux driver support status is documented at:
3165 <http://www.linux-mips.org/wiki/DECstation>
Linus Torvalds1da177e2005-04-16 15:20:36 -07003166
Linus Torvalds1da177e2005-04-16 15:20:36 -07003167config MMU
3168 bool
3169 default y
3170
Matt Redfearn109c32f2016-11-24 17:32:45 +00003171config ARCH_MMAP_RND_BITS_MIN
3172 default 12 if 64BIT
3173 default 8
3174
3175config ARCH_MMAP_RND_BITS_MAX
3176 default 18 if 64BIT
3177 default 15
3178
3179config ARCH_MMAP_RND_COMPAT_BITS_MIN
Enrico Weigelt, metux IT consult371a4152019-03-11 16:54:27 +01003180 default 8
Matt Redfearn109c32f2016-11-24 17:32:45 +00003181
3182config ARCH_MMAP_RND_COMPAT_BITS_MAX
Enrico Weigelt, metux IT consult371a4152019-03-11 16:54:27 +01003183 default 15
Matt Redfearn109c32f2016-11-24 17:32:45 +00003184
Ralf Baechled865bea2007-10-11 23:46:10 +01003185config I8253
3186 bool
Russell King798778b2011-05-08 19:03:03 +01003187 select CLKSRC_I8253
Thomas Gleixner2d026122011-06-09 13:08:27 +00003188 select CLKEVT_I8253
Wu Zhangjin9726b432009-11-17 01:32:58 +08003189 select MIPS_EXTERNAL_TIMER
Linus Torvalds1da177e2005-04-16 15:20:36 -07003190endmenu
3191
Linus Torvalds1da177e2005-04-16 15:20:36 -07003192config TRAD_SIGNALS
3193 bool
Linus Torvalds1da177e2005-04-16 15:20:36 -07003194
Linus Torvalds1da177e2005-04-16 15:20:36 -07003195config MIPS32_COMPAT
Ralf Baechle78aaf952014-12-19 01:18:03 +01003196 bool
Linus Torvalds1da177e2005-04-16 15:20:36 -07003197
3198config COMPAT
3199 bool
Linus Torvalds1da177e2005-04-16 15:20:36 -07003200
Atsushi Nemoto05e43962006-11-07 18:02:44 +09003201config SYSVIPC_COMPAT
3202 bool
Atsushi Nemoto05e43962006-11-07 18:02:44 +09003203
Linus Torvalds1da177e2005-04-16 15:20:36 -07003204config MIPS32_O32
3205 bool "Kernel support for o32 binaries"
Ralf Baechle78aaf952014-12-19 01:18:03 +01003206 depends on 64BIT
3207 select ARCH_WANT_OLD_COMPAT_IPC
3208 select COMPAT
3209 select MIPS32_COMPAT
3210 select SYSVIPC_COMPAT if SYSVIPC
Linus Torvalds1da177e2005-04-16 15:20:36 -07003211 help
3212 Select this option if you want to run o32 binaries. These are pure
3213 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
3214 existing binaries are in this format.
3215
3216 If unsure, say Y.
3217
3218config MIPS32_N32
3219 bool "Kernel support for n32 binaries"
Ralf Baechlec22eacfe2015-01-03 12:10:23 +01003220 depends on 64BIT
Arnd Bergmann5a9372f2019-01-10 17:24:31 +01003221 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
Ralf Baechle78aaf952014-12-19 01:18:03 +01003222 select COMPAT
3223 select MIPS32_COMPAT
3224 select SYSVIPC_COMPAT if SYSVIPC
Linus Torvalds1da177e2005-04-16 15:20:36 -07003225 help
3226 Select this option if you want to run n32 binaries. These are
3227 64-bit binaries using 32-bit quantities for addressing and certain
3228 data that would normally be 64-bit. They are used in special
3229 cases.
3230
3231 If unsure, say N.
3232
Nathan Chancellord49fc692022-01-25 15:19:25 -07003233config CC_HAS_MNO_BRANCH_LIKELY
3234 def_bool y
3235 depends on $(cc-option,-mno-branch-likely)
3236
Ralf Baechle21162452007-02-09 17:08:58 +00003237menu "Power management options"
Rodolfo Giometti952fa952006-06-05 17:43:10 +02003238
Wu Zhangjin363c55c2009-06-04 20:27:10 +08003239config ARCH_HIBERNATION_POSSIBLE
3240 def_bool y
Ralf Baechle3f5b3e12009-07-02 11:48:07 +01003241 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
Wu Zhangjin363c55c2009-06-04 20:27:10 +08003242
Johannes Bergf4cb5702007-12-08 02:14:00 +01003243config ARCH_SUSPEND_POSSIBLE
3244 def_bool y
Ralf Baechle3f5b3e12009-07-02 11:48:07 +01003245 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
Johannes Bergf4cb5702007-12-08 02:14:00 +01003246
Ralf Baechle21162452007-02-09 17:08:58 +00003247source "kernel/power/Kconfig"
Rodolfo Giometti952fa952006-06-05 17:43:10 +02003248
Linus Torvalds1da177e2005-04-16 15:20:36 -07003249endmenu
3250
Viresh Kumar7a998932013-04-04 12:54:21 +00003251config MIPS_EXTERNAL_TIMER
3252 bool
3253
Viresh Kumar7a998932013-04-04 12:54:21 +00003254menu "CPU Power Management"
Paul Burtonc095eba2014-04-14 16:24:22 +01003255
3256if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
Viresh Kumar7a998932013-04-04 12:54:21 +00003257source "drivers/cpufreq/Kconfig"
Viresh Kumar7a998932013-04-04 12:54:21 +00003258endif
Wu Zhangjin9726b432009-11-17 01:32:58 +08003259
Paul Burtonc095eba2014-04-14 16:24:22 +01003260source "drivers/cpuidle/Kconfig"
3261
3262endmenu
3263
Sanjay Lal2235a542012-11-21 18:33:59 -08003264source "arch/mips/kvm/Kconfig"
Nathan Chancellore91946d2020-04-28 15:14:16 -07003265
3266source "arch/mips/vdso/Kconfig"