Greg Kroah-Hartman | b244131 | 2017-11-01 15:07:57 +0100 | [diff] [blame] | 1 | # SPDX-License-Identifier: GPL-2.0 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2 | config MIPS |
| 3 | bool |
| 4 | default y |
Yury Norov | 942fa98 | 2018-05-16 11:18:49 +0300 | [diff] [blame] | 5 | select ARCH_32BIT_OFF_T if !64BIT |
Paul Burton | ea6a373 | 2018-11-07 23:14:09 +0000 | [diff] [blame] | 6 | select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT |
Kees Cook | b847bd6 | 2022-03-09 14:09:39 -0800 | [diff] [blame] | 7 | select ARCH_HAS_CURRENT_STACK_POINTER if !CC_IS_CLANG || CLANG_VERSION >= 140000 |
Florian Fainelli | dfad83c | 2021-03-30 20:22:07 -0700 | [diff] [blame] | 8 | select ARCH_HAS_DEBUG_VIRTUAL if !64BIT |
Alexander Lobakin | 34c01e4 | 2020-01-22 13:58:51 +0300 | [diff] [blame] | 9 | select ARCH_HAS_FORTIFY_SOURCE |
| 10 | select ARCH_HAS_KCOV |
Tiezhu Yang | 66633ab | 2021-03-25 20:50:01 +0800 | [diff] [blame] | 11 | select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE if !EVA |
Alexander Lobakin | 34c01e4 | 2020-01-22 13:58:51 +0300 | [diff] [blame] | 12 | select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI) |
Arnd Bergmann | e622699 | 2021-05-17 09:22:34 +0200 | [diff] [blame] | 13 | select ARCH_HAS_STRNCPY_FROM_USER |
| 14 | select ARCH_HAS_STRNLEN_USER |
Matt Redfearn | 1259798 | 2017-05-15 10:46:35 +0100 | [diff] [blame] | 15 | select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST |
Hassan Naveed | 1e35918 | 2018-11-19 16:49:37 -0800 | [diff] [blame] | 16 | select ARCH_HAS_UBSAN_SANITIZE_ALL |
Xingxing Su | 8b3165e | 2020-12-03 15:22:51 +0800 | [diff] [blame] | 17 | select ARCH_HAS_GCOV_PROFILE_ALL |
Nick Desaulniers | c55944c | 2021-04-07 10:35:43 -0700 | [diff] [blame] | 18 | select ARCH_KEEP_MEMBLOCK |
Matt Redfearn | 1259798 | 2017-05-15 10:46:35 +0100 | [diff] [blame] | 19 | select ARCH_SUPPORTS_UPROBES |
Ralf Baechle | 1ee3630 | 2015-09-29 12:19:48 +0200 | [diff] [blame] | 20 | select ARCH_USE_BUILTIN_BSWAP |
Matt Redfearn | 1259798 | 2017-05-15 10:46:35 +0100 | [diff] [blame] | 21 | select ARCH_USE_CMPXCHG_LOCKREF if 64BIT |
Anshuman Khandual | dce4456 | 2021-04-29 22:55:15 -0700 | [diff] [blame] | 22 | select ARCH_USE_MEMTEST |
Paul Burton | 25da4e9 | 2017-06-09 17:26:42 -0700 | [diff] [blame] | 23 | select ARCH_USE_QUEUED_RWLOCKS |
Paul Burton | 0b17c96 | 2017-06-09 17:26:43 -0700 | [diff] [blame] | 24 | select ARCH_USE_QUEUED_SPINLOCKS |
Anshuman Khandual | 855f9a8 | 2021-05-04 18:38:13 -0700 | [diff] [blame] | 25 | select ARCH_SUPPORTS_HUGETLBFS if CPU_SUPPORTS_HUGEPAGES |
Alexandre Ghiti | 9035bd2 | 2019-09-23 15:39:18 -0700 | [diff] [blame] | 26 | select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU |
Matt Redfearn | 1259798 | 2017-05-15 10:46:35 +0100 | [diff] [blame] | 27 | select ARCH_WANT_IPC_PARSE_VERSION |
Alexander Lobakin | d3a4e0f | 2021-01-10 11:57:01 +0000 | [diff] [blame] | 28 | select ARCH_WANT_LD_ORPHAN_WARN |
Shile Zhang | 1091670 | 2019-12-04 08:46:31 +0800 | [diff] [blame] | 29 | select BUILDTIME_TABLE_SORT |
Matt Redfearn | 1259798 | 2017-05-15 10:46:35 +0100 | [diff] [blame] | 30 | select CLONE_BACKWARDS |
Paul Burton | 57eeaced | 2018-11-08 23:44:55 +0000 | [diff] [blame] | 31 | select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1) |
Matt Redfearn | 1259798 | 2017-05-15 10:46:35 +0100 | [diff] [blame] | 32 | select CPU_PM if CPU_IDLE |
| 33 | select GENERIC_ATOMIC64 if !64BIT |
Matt Redfearn | 1259798 | 2017-05-15 10:46:35 +0100 | [diff] [blame] | 34 | select GENERIC_CMOS_UPDATE |
| 35 | select GENERIC_CPU_AUTOPROBE |
Vincenzo Frascino | 24640f2 | 2019-06-21 10:52:46 +0100 | [diff] [blame] | 36 | select GENERIC_GETTIMEOFDAY |
Paul Burton | b962aeb | 2018-08-29 14:54:00 -0700 | [diff] [blame] | 37 | select GENERIC_IOMAP |
Matt Redfearn | 1259798 | 2017-05-15 10:46:35 +0100 | [diff] [blame] | 38 | select GENERIC_IRQ_PROBE |
| 39 | select GENERIC_IRQ_SHOW |
Christoph Hellwig | 6630a8e | 2018-11-15 20:05:37 +0100 | [diff] [blame] | 40 | select GENERIC_ISA_DMA if EISA |
Antony Pavlov | 740129b | 2018-04-11 08:50:19 +0100 | [diff] [blame] | 41 | select GENERIC_LIB_ASHLDI3 |
| 42 | select GENERIC_LIB_ASHRDI3 |
| 43 | select GENERIC_LIB_CMPDI2 |
| 44 | select GENERIC_LIB_LSHRDI3 |
| 45 | select GENERIC_LIB_UCMPDI2 |
Matt Redfearn | 1259798 | 2017-05-15 10:46:35 +0100 | [diff] [blame] | 46 | select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC |
| 47 | select GENERIC_SMP_IDLE_THREAD |
| 48 | select GENERIC_TIME_VSYSCALL |
Christoph Hellwig | 446f062 | 2019-07-11 20:56:52 -0700 | [diff] [blame] | 49 | select GUP_GET_PTE_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT |
Paul Burton | 906d441 | 2018-08-20 15:36:18 -0700 | [diff] [blame] | 50 | select HAVE_ARCH_COMPILER_H |
Matt Redfearn | 1259798 | 2017-05-15 10:46:35 +0100 | [diff] [blame] | 51 | select HAVE_ARCH_JUMP_LABEL |
Arnd Bergmann | 42b2099 | 2021-01-22 12:02:51 +0100 | [diff] [blame] | 52 | select HAVE_ARCH_KGDB if MIPS_FP_SUPPORT |
Matt Redfearn | 109c32f | 2016-11-24 17:32:45 +0000 | [diff] [blame] | 53 | select HAVE_ARCH_MMAP_RND_BITS if MMU |
| 54 | select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT |
Markos Chandras | 490b004 | 2014-01-22 14:40:04 +0000 | [diff] [blame] | 55 | select HAVE_ARCH_SECCOMP_FILTER |
Ralf Baechle | c0ff3c5 | 2012-08-17 08:22:04 +0200 | [diff] [blame] | 56 | select HAVE_ARCH_TRACEHOOK |
Daniel Silsby | 45e03e6 | 2019-07-15 17:40:01 -0400 | [diff] [blame] | 57 | select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES |
Masahiro Yamada | 2ff2b7e | 2019-08-19 14:54:20 +0900 | [diff] [blame] | 58 | select HAVE_ASM_MODVERSIONS |
Matt Redfearn | 1259798 | 2017-05-15 10:46:35 +0100 | [diff] [blame] | 59 | select HAVE_CONTEXT_TRACKING |
Frederic Weisbecker | 490f561 | 2020-01-27 16:41:52 +0100 | [diff] [blame] | 60 | select HAVE_TIF_NOHZ |
Wu Zhangjin | 64575f9 | 2010-10-27 18:59:09 +0800 | [diff] [blame] | 61 | select HAVE_C_RECORDMCOUNT |
Matt Redfearn | 1259798 | 2017-05-15 10:46:35 +0100 | [diff] [blame] | 62 | select HAVE_DEBUG_KMEMLEAK |
| 63 | select HAVE_DEBUG_STACKOVERFLOW |
Matt Redfearn | 1259798 | 2017-05-15 10:46:35 +0100 | [diff] [blame] | 64 | select HAVE_DMA_CONTIGUOUS |
| 65 | select HAVE_DYNAMIC_FTRACE |
Johan Almbladh | 01bdc58 | 2021-10-05 18:54:07 +0200 | [diff] [blame] | 66 | select HAVE_EBPF_JIT if !CPU_MICROMIPS && \ |
| 67 | !CPU_DADDI_WORKAROUNDS && \ |
| 68 | !CPU_R4000_WORKAROUNDS && \ |
| 69 | !CPU_R4400_WORKAROUNDS |
Matt Redfearn | 1259798 | 2017-05-15 10:46:35 +0100 | [diff] [blame] | 70 | select HAVE_EXIT_THREAD |
Christoph Hellwig | 67a929e | 2019-07-11 20:57:14 -0700 | [diff] [blame] | 71 | select HAVE_FAST_GUP |
Matt Redfearn | 1259798 | 2017-05-15 10:46:35 +0100 | [diff] [blame] | 72 | select HAVE_FTRACE_MCOUNT_RECORD |
Wu Zhangjin | 29c5d34 | 2009-11-20 20:34:34 +0800 | [diff] [blame] | 73 | select HAVE_FUNCTION_GRAPH_TRACER |
Matt Redfearn | 1259798 | 2017-05-15 10:46:35 +0100 | [diff] [blame] | 74 | select HAVE_FUNCTION_TRACER |
Alexander Lobakin | 34c01e4 | 2020-01-22 13:58:51 +0300 | [diff] [blame] | 75 | select HAVE_GCC_PLUGINS |
| 76 | select HAVE_GENERIC_VDSO |
Hassan Naveed | b3a428b | 2018-10-29 18:27:41 -0700 | [diff] [blame] | 77 | select HAVE_IOREMAP_PROT |
Matt Redfearn | 1259798 | 2017-05-15 10:46:35 +0100 | [diff] [blame] | 78 | select HAVE_IRQ_EXIT_ON_IRQ_STACK |
| 79 | select HAVE_IRQ_TIME_ACCOUNTING |
David Daney | c1bf207 | 2010-08-03 11:22:20 -0700 | [diff] [blame] | 80 | select HAVE_KPROBES |
| 81 | select HAVE_KRETPROBES |
Paul Burton | c0436b5 | 2018-11-21 21:56:36 +0000 | [diff] [blame] | 82 | select HAVE_LD_DEAD_CODE_DATA_ELIMINATION |
David Howells | 786d35d | 2012-09-28 14:31:03 +0930 | [diff] [blame] | 83 | select HAVE_MOD_ARCH_SPECIFIC |
Petr Mladek | 42a0bb3 | 2016-05-20 17:00:33 -0700 | [diff] [blame] | 84 | select HAVE_NMI |
Matt Redfearn | 1259798 | 2017-05-15 10:46:35 +0100 | [diff] [blame] | 85 | select HAVE_PERF_EVENTS |
Tiezhu Yang | 1ddc96b | 2021-02-04 11:35:22 +0800 | [diff] [blame] | 86 | select HAVE_PERF_REGS |
| 87 | select HAVE_PERF_USER_STACK_DUMP |
Marcin Nowakowski | 08bccf4 | 2016-09-02 10:13:21 +0200 | [diff] [blame] | 88 | select HAVE_REGS_AND_STACK_ACCESS_API |
Paul Burton | 9ea141a | 2018-06-14 10:13:53 -0700 | [diff] [blame] | 89 | select HAVE_RSEQ |
Hassan Naveed | 16c0f03 | 2019-11-15 23:44:49 +0000 | [diff] [blame] | 90 | select HAVE_SPARSE_SYSCALL_NR |
Masahiro Yamada | d148eac | 2018-06-14 19:36:45 +0900 | [diff] [blame] | 91 | select HAVE_STACKPROTECTOR |
Matt Redfearn | 1259798 | 2017-05-15 10:46:35 +0100 | [diff] [blame] | 92 | select HAVE_SYSCALL_TRACEPOINTS |
Ben Hutchings | a3f1431 | 2017-10-04 03:46:14 +0100 | [diff] [blame] | 93 | select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP |
Matt Redfearn | 1259798 | 2017-05-15 10:46:35 +0100 | [diff] [blame] | 94 | select IRQ_FORCED_THREADING |
Christoph Hellwig | 6630a8e | 2018-11-15 20:05:37 +0100 | [diff] [blame] | 95 | select ISA if EISA |
Matt Redfearn | 1259798 | 2017-05-15 10:46:35 +0100 | [diff] [blame] | 96 | select MODULES_USE_ELF_REL if MODULES |
Alexander Lobakin | 34c01e4 | 2020-01-22 13:58:51 +0300 | [diff] [blame] | 97 | select MODULES_USE_ELF_RELA if MODULES && 64BIT |
Matt Redfearn | 1259798 | 2017-05-15 10:46:35 +0100 | [diff] [blame] | 98 | select PERF_USE_VMALLOC |
Thomas Gleixner | 981aa1d | 2020-09-28 12:13:07 +0200 | [diff] [blame] | 99 | select PCI_MSI_ARCH_FALLBACKS if PCI_MSI |
Arnd Bergmann | 05a0a34 | 2018-08-28 16:26:30 +0200 | [diff] [blame] | 100 | select RTC_LIB |
Matt Redfearn | 1259798 | 2017-05-15 10:46:35 +0100 | [diff] [blame] | 101 | select SYSCTL_EXCEPTION_TRACE |
Masahiro Yamada | 4aae683 | 2021-07-31 14:22:32 +0900 | [diff] [blame] | 102 | select TRACE_IRQFLAGS_SUPPORT |
Matt Redfearn | 1259798 | 2017-05-15 10:46:35 +0100 | [diff] [blame] | 103 | select VIRT_TO_BUS |
Al Viro | 0bb87f0 | 2020-06-14 00:18:12 -0400 | [diff] [blame] | 104 | select ARCH_HAS_ELFCORE_COMPAT |
Nemanja Rakovic | e0a8b93 | 2022-01-31 11:17:09 +0100 | [diff] [blame] | 105 | select HAVE_ARCH_KCSAN if 64BIT |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 106 | |
Christoph Hellwig | d399157 | 2020-04-16 17:00:07 +0200 | [diff] [blame] | 107 | config MIPS_FIXUP_BIGPHYS_ADDR |
| 108 | bool |
| 109 | |
Paul Cercueil | c434b9f | 2020-09-06 21:29:25 +0200 | [diff] [blame] | 110 | config MIPS_GENERIC |
| 111 | bool |
| 112 | |
Paul Cercueil | f0f4a75 | 2020-09-06 21:29:31 +0200 | [diff] [blame] | 113 | config MACH_INGENIC |
| 114 | bool |
| 115 | select SYS_SUPPORTS_32BIT_KERNEL |
| 116 | select SYS_SUPPORTS_LITTLE_ENDIAN |
| 117 | select SYS_SUPPORTS_ZBOOT |
Paul Cercueil | f0f4a75 | 2020-09-06 21:29:31 +0200 | [diff] [blame] | 118 | select DMA_NONCOHERENT |
Paul Cercueil | 1660710 | 2021-05-30 18:17:55 +0100 | [diff] [blame] | 119 | select ARCH_HAS_SYNC_DMA_FOR_CPU |
Paul Cercueil | f0f4a75 | 2020-09-06 21:29:31 +0200 | [diff] [blame] | 120 | select IRQ_MIPS_CPU |
| 121 | select PINCTRL |
| 122 | select GPIOLIB |
| 123 | select COMMON_CLK |
| 124 | select GENERIC_IRQ_CHIP |
| 125 | select BUILTIN_DTB if MIPS_NO_APPENDED_DTB |
| 126 | select USE_OF |
| 127 | select CPU_SUPPORTS_CPUFREQ |
| 128 | select MIPS_EXTERNAL_TIMER |
| 129 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 130 | menu "Machine selection" |
| 131 | |
Ralf Baechle | 5e83d43 | 2005-10-29 19:32:41 +0100 | [diff] [blame] | 132 | choice |
| 133 | prompt "System type" |
Paul Cercueil | c434b9f | 2020-09-06 21:29:25 +0200 | [diff] [blame] | 134 | default MIPS_GENERIC_KERNEL |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 135 | |
Paul Cercueil | c434b9f | 2020-09-06 21:29:25 +0200 | [diff] [blame] | 136 | config MIPS_GENERIC_KERNEL |
Paul Burton | eed0eab | 2016-10-05 18:18:20 +0100 | [diff] [blame] | 137 | bool "Generic board-agnostic MIPS kernel" |
Christoph Hellwig | 4e06644 | 2021-02-10 10:56:41 +0100 | [diff] [blame] | 138 | select ARCH_HAS_SETUP_DMA_OPS |
Paul Cercueil | c434b9f | 2020-09-06 21:29:25 +0200 | [diff] [blame] | 139 | select MIPS_GENERIC |
Paul Burton | eed0eab | 2016-10-05 18:18:20 +0100 | [diff] [blame] | 140 | select BOOT_RAW |
| 141 | select BUILTIN_DTB |
| 142 | select CEVT_R4K |
| 143 | select CLKSRC_MIPS_GIC |
| 144 | select COMMON_CLK |
Paul Burton | eed0eab | 2016-10-05 18:18:20 +0100 | [diff] [blame] | 145 | select CPU_MIPSR2_IRQ_EI |
Alexander Lobakin | 34c01e4 | 2020-01-22 13:58:51 +0300 | [diff] [blame] | 146 | select CPU_MIPSR2_IRQ_VI |
Paul Burton | eed0eab | 2016-10-05 18:18:20 +0100 | [diff] [blame] | 147 | select CSRC_R4K |
Christoph Hellwig | 4e06644 | 2021-02-10 10:56:41 +0100 | [diff] [blame] | 148 | select DMA_NONCOHERENT |
Christoph Hellwig | eb01d42 | 2018-11-15 20:05:32 +0100 | [diff] [blame] | 149 | select HAVE_PCI |
Paul Burton | eed0eab | 2016-10-05 18:18:20 +0100 | [diff] [blame] | 150 | select IRQ_MIPS_CPU |
Paul Burton | 0211d49 | 2018-07-27 18:23:21 -0700 | [diff] [blame] | 151 | select MIPS_AUTO_PFN_OFFSET |
Paul Burton | eed0eab | 2016-10-05 18:18:20 +0100 | [diff] [blame] | 152 | select MIPS_CPU_SCACHE |
| 153 | select MIPS_GIC |
| 154 | select MIPS_L1_CACHE_SHIFT_7 |
| 155 | select NO_EXCEPT_FILL |
| 156 | select PCI_DRIVERS_GENERIC |
Paul Burton | eed0eab | 2016-10-05 18:18:20 +0100 | [diff] [blame] | 157 | select SMP_UP if SMP |
Matt Redfearn | a3078e5 | 2017-01-23 14:08:13 +0000 | [diff] [blame] | 158 | select SWAP_IO_SPACE |
Paul Burton | eed0eab | 2016-10-05 18:18:20 +0100 | [diff] [blame] | 159 | select SYS_HAS_CPU_MIPS32_R1 |
| 160 | select SYS_HAS_CPU_MIPS32_R2 |
| 161 | select SYS_HAS_CPU_MIPS32_R6 |
| 162 | select SYS_HAS_CPU_MIPS64_R1 |
| 163 | select SYS_HAS_CPU_MIPS64_R2 |
| 164 | select SYS_HAS_CPU_MIPS64_R6 |
| 165 | select SYS_SUPPORTS_32BIT_KERNEL |
| 166 | select SYS_SUPPORTS_64BIT_KERNEL |
| 167 | select SYS_SUPPORTS_BIG_ENDIAN |
| 168 | select SYS_SUPPORTS_HIGHMEM |
| 169 | select SYS_SUPPORTS_LITTLE_ENDIAN |
| 170 | select SYS_SUPPORTS_MICROMIPS |
Paul Burton | eed0eab | 2016-10-05 18:18:20 +0100 | [diff] [blame] | 171 | select SYS_SUPPORTS_MIPS16 |
Alexander Lobakin | 34c01e4 | 2020-01-22 13:58:51 +0300 | [diff] [blame] | 172 | select SYS_SUPPORTS_MIPS_CPS |
Paul Burton | eed0eab | 2016-10-05 18:18:20 +0100 | [diff] [blame] | 173 | select SYS_SUPPORTS_MULTITHREADING |
| 174 | select SYS_SUPPORTS_RELOCATABLE |
| 175 | select SYS_SUPPORTS_SMARTMIPS |
Paul Cercueil | c3e2ee6 | 2020-09-06 21:29:29 +0200 | [diff] [blame] | 176 | select SYS_SUPPORTS_ZBOOT |
Alexander Lobakin | 34c01e4 | 2020-01-22 13:58:51 +0300 | [diff] [blame] | 177 | select UHI_BOOT |
Corentin Labbe | 2e6522c | 2018-01-17 19:56:38 +0100 | [diff] [blame] | 178 | select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN |
| 179 | select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN |
| 180 | select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN |
| 181 | select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN |
| 182 | select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN |
| 183 | select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN |
Paul Burton | eed0eab | 2016-10-05 18:18:20 +0100 | [diff] [blame] | 184 | select USE_OF |
| 185 | help |
| 186 | Select this to build a kernel which aims to support multiple boards, |
| 187 | generally using a flattened device tree passed from the bootloader |
| 188 | using the boot protocol defined in the UHI (Unified Hosting |
| 189 | Interface) specification. |
| 190 | |
Manuel Lauss | 42a4f17 | 2010-07-15 21:45:04 +0200 | [diff] [blame] | 191 | config MIPS_ALCHEMY |
Yoichi Yuasa | c3543e2 | 2007-05-11 20:44:30 +0900 | [diff] [blame] | 192 | bool "Alchemy processor based machines" |
Christoph Hellwig | d4a451d | 2018-04-03 16:24:20 +0200 | [diff] [blame] | 193 | select PHYS_ADDR_T_64BIT |
Ralf Baechle | f772cdb | 2012-11-30 17:27:27 +0100 | [diff] [blame] | 194 | select CEVT_R4K |
Steven J. Hill | d7ea335 | 2012-11-14 23:34:17 -0600 | [diff] [blame] | 195 | select CSRC_R4K |
Ralf Baechle | 67e38cf | 2015-05-26 18:20:06 +0200 | [diff] [blame] | 196 | select IRQ_MIPS_CPU |
Christoph Hellwig | a86497d | 2021-02-10 10:56:40 +0100 | [diff] [blame] | 197 | select DMA_NONCOHERENT # Au1000,1500,1100 aren't, rest is |
Christoph Hellwig | d399157 | 2020-04-16 17:00:07 +0200 | [diff] [blame] | 198 | select MIPS_FIXUP_BIGPHYS_ADDR if PCI |
Manuel Lauss | 42a4f17 | 2010-07-15 21:45:04 +0200 | [diff] [blame] | 199 | select SYS_HAS_CPU_MIPS32_R1 |
| 200 | select SYS_SUPPORTS_32BIT_KERNEL |
| 201 | select SYS_SUPPORTS_APM_EMULATION |
Linus Walleij | d30a2b4 | 2016-04-19 11:23:22 +0200 | [diff] [blame] | 202 | select GPIOLIB |
Wu Zhangjin | 1b93b3c | 2009-10-14 18:12:16 +0800 | [diff] [blame] | 203 | select SYS_SUPPORTS_ZBOOT |
Manuel Lauss | 4744022 | 2014-07-23 16:36:48 +0200 | [diff] [blame] | 204 | select COMMON_CLK |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 205 | |
Florian Fainelli | 7ca5dc1 | 2009-06-24 11:12:57 +0200 | [diff] [blame] | 206 | config AR7 |
| 207 | bool "Texas Instruments AR7" |
| 208 | select BOOT_ELF32 |
Arnd Bergmann | b408b61 | 2021-05-31 15:22:37 +0200 | [diff] [blame] | 209 | select COMMON_CLK |
Florian Fainelli | 7ca5dc1 | 2009-06-24 11:12:57 +0200 | [diff] [blame] | 210 | select DMA_NONCOHERENT |
| 211 | select CEVT_R4K |
| 212 | select CSRC_R4K |
Ralf Baechle | 67e38cf | 2015-05-26 18:20:06 +0200 | [diff] [blame] | 213 | select IRQ_MIPS_CPU |
Florian Fainelli | 7ca5dc1 | 2009-06-24 11:12:57 +0200 | [diff] [blame] | 214 | select NO_EXCEPT_FILL |
| 215 | select SWAP_IO_SPACE |
| 216 | select SYS_HAS_CPU_MIPS32_R1 |
| 217 | select SYS_HAS_EARLY_PRINTK |
| 218 | select SYS_SUPPORTS_32BIT_KERNEL |
| 219 | select SYS_SUPPORTS_LITTLE_ENDIAN |
Ralf Baechle | 377cb1b | 2014-04-29 01:49:24 +0200 | [diff] [blame] | 220 | select SYS_SUPPORTS_MIPS16 |
Wu Zhangjin | 1b93b3c | 2009-10-14 18:12:16 +0800 | [diff] [blame] | 221 | select SYS_SUPPORTS_ZBOOT_UART16550 |
Linus Walleij | d30a2b4 | 2016-04-19 11:23:22 +0200 | [diff] [blame] | 222 | select GPIOLIB |
Florian Fainelli | 7ca5dc1 | 2009-06-24 11:12:57 +0200 | [diff] [blame] | 223 | select VLYNQ |
| 224 | help |
| 225 | Support for the Texas Instruments AR7 System-on-a-Chip |
| 226 | family: TNETD7100, 7200 and 7300. |
| 227 | |
Sergey Ryazanov | 43cc739 | 2014-10-29 03:18:38 +0400 | [diff] [blame] | 228 | config ATH25 |
| 229 | bool "Atheros AR231x/AR531x SoC support" |
| 230 | select CEVT_R4K |
| 231 | select CSRC_R4K |
| 232 | select DMA_NONCOHERENT |
Ralf Baechle | 67e38cf | 2015-05-26 18:20:06 +0200 | [diff] [blame] | 233 | select IRQ_MIPS_CPU |
Sergey Ryazanov | 1753e74 | 2014-10-29 03:18:41 +0400 | [diff] [blame] | 234 | select IRQ_DOMAIN |
Sergey Ryazanov | 43cc739 | 2014-10-29 03:18:38 +0400 | [diff] [blame] | 235 | select SYS_HAS_CPU_MIPS32_R1 |
| 236 | select SYS_SUPPORTS_BIG_ENDIAN |
| 237 | select SYS_SUPPORTS_32BIT_KERNEL |
Sergey Ryazanov | 8aaa727 | 2014-10-29 03:18:42 +0400 | [diff] [blame] | 238 | select SYS_HAS_EARLY_PRINTK |
Sergey Ryazanov | 43cc739 | 2014-10-29 03:18:38 +0400 | [diff] [blame] | 239 | help |
| 240 | Support for Atheros AR231x and Atheros AR531x based boards |
| 241 | |
Gabor Juhos | d4a67d9 | 2011-01-04 21:28:14 +0100 | [diff] [blame] | 242 | config ATH79 |
| 243 | bool "Atheros AR71XX/AR724X/AR913X based boards" |
Alban Bedel | ff591a9 | 2015-08-03 19:23:52 +0200 | [diff] [blame] | 244 | select ARCH_HAS_RESET_CONTROLLER |
Gabor Juhos | d4a67d9 | 2011-01-04 21:28:14 +0100 | [diff] [blame] | 245 | select BOOT_RAW |
| 246 | select CEVT_R4K |
| 247 | select CSRC_R4K |
| 248 | select DMA_NONCOHERENT |
Linus Walleij | d30a2b4 | 2016-04-19 11:23:22 +0200 | [diff] [blame] | 249 | select GPIOLIB |
John Crispin | a08227a | 2018-07-20 13:58:20 +0200 | [diff] [blame] | 250 | select PINCTRL |
Alban Bedel | 411520a | 2015-04-19 14:30:04 +0200 | [diff] [blame] | 251 | select COMMON_CLK |
Ralf Baechle | 67e38cf | 2015-05-26 18:20:06 +0200 | [diff] [blame] | 252 | select IRQ_MIPS_CPU |
Gabor Juhos | d4a67d9 | 2011-01-04 21:28:14 +0100 | [diff] [blame] | 253 | select SYS_HAS_CPU_MIPS32_R2 |
| 254 | select SYS_HAS_EARLY_PRINTK |
| 255 | select SYS_SUPPORTS_32BIT_KERNEL |
| 256 | select SYS_SUPPORTS_BIG_ENDIAN |
Ralf Baechle | 377cb1b | 2014-04-29 01:49:24 +0200 | [diff] [blame] | 257 | select SYS_SUPPORTS_MIPS16 |
Alban Bedel | b3f0a25 | 2016-01-26 09:38:29 +0100 | [diff] [blame] | 258 | select SYS_SUPPORTS_ZBOOT_UART_PROM |
Alban Bedel | 03c8c40 | 2015-05-31 01:52:25 +0200 | [diff] [blame] | 259 | select USE_OF |
Alban Bedel | 53d473f | 2018-03-24 23:47:22 +0100 | [diff] [blame] | 260 | select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM |
Gabor Juhos | d4a67d9 | 2011-01-04 21:28:14 +0100 | [diff] [blame] | 261 | help |
| 262 | Support for the Atheros AR71XX/AR724X/AR913X SoCs. |
| 263 | |
Kevin Cernekee | 5f2d445 | 2014-12-25 09:49:00 -0800 | [diff] [blame] | 264 | config BMIPS_GENERIC |
| 265 | bool "Broadcom Generic BMIPS kernel" |
Álvaro Fernández Rojas | 29906e1 | 2020-06-17 12:50:33 +0200 | [diff] [blame] | 266 | select ARCH_HAS_RESET_CONTROLLER |
Christoph Hellwig | d59098a | 2018-06-15 13:08:52 +0200 | [diff] [blame] | 267 | select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL |
Kevin Cernekee | d666cd0 | 2014-10-20 21:28:05 -0700 | [diff] [blame] | 268 | select BOOT_RAW |
| 269 | select NO_EXCEPT_FILL |
| 270 | select USE_OF |
| 271 | select CEVT_R4K |
| 272 | select CSRC_R4K |
| 273 | select SYNC_R4K |
| 274 | select COMMON_CLK |
Simon Arlott | c7c42ec | 2015-11-22 14:30:14 +0000 | [diff] [blame] | 275 | select BCM6345_L1_IRQ |
Kevin Cernekee | 60b858f | 2014-12-25 09:49:17 -0800 | [diff] [blame] | 276 | select BCM7038_L1_IRQ |
| 277 | select BCM7120_L2_IRQ |
| 278 | select BRCMSTB_L2_IRQ |
Ralf Baechle | 67e38cf | 2015-05-26 18:20:06 +0200 | [diff] [blame] | 279 | select IRQ_MIPS_CPU |
Kevin Cernekee | 60b858f | 2014-12-25 09:49:17 -0800 | [diff] [blame] | 280 | select DMA_NONCOHERENT |
Kevin Cernekee | d666cd0 | 2014-10-20 21:28:05 -0700 | [diff] [blame] | 281 | select SYS_SUPPORTS_32BIT_KERNEL |
Kevin Cernekee | 60b858f | 2014-12-25 09:49:17 -0800 | [diff] [blame] | 282 | select SYS_SUPPORTS_LITTLE_ENDIAN |
Kevin Cernekee | d666cd0 | 2014-10-20 21:28:05 -0700 | [diff] [blame] | 283 | select SYS_SUPPORTS_BIG_ENDIAN |
| 284 | select SYS_SUPPORTS_HIGHMEM |
Kevin Cernekee | 60b858f | 2014-12-25 09:49:17 -0800 | [diff] [blame] | 285 | select SYS_HAS_CPU_BMIPS32_3300 |
| 286 | select SYS_HAS_CPU_BMIPS4350 |
| 287 | select SYS_HAS_CPU_BMIPS4380 |
Kevin Cernekee | d666cd0 | 2014-10-20 21:28:05 -0700 | [diff] [blame] | 288 | select SYS_HAS_CPU_BMIPS5000 |
| 289 | select SWAP_IO_SPACE |
Kevin Cernekee | 60b858f | 2014-12-25 09:49:17 -0800 | [diff] [blame] | 290 | select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN |
| 291 | select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN |
| 292 | select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN |
| 293 | select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN |
Justin Chen | 4dc4704 | 2017-05-24 10:55:16 -0700 | [diff] [blame] | 294 | select HARDIRQS_SW_RESEND |
Florian Fainelli | 1d98705 | 2021-11-08 11:24:31 -0800 | [diff] [blame] | 295 | select HAVE_PCI |
| 296 | select PCI_DRIVERS_GENERIC |
Kevin Cernekee | d666cd0 | 2014-10-20 21:28:05 -0700 | [diff] [blame] | 297 | help |
Kevin Cernekee | 5f2d445 | 2014-12-25 09:49:00 -0800 | [diff] [blame] | 298 | Build a generic DT-based kernel image that boots on select |
| 299 | BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top |
| 300 | box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN |
| 301 | must be set appropriately for your board. |
Kevin Cernekee | d666cd0 | 2014-10-20 21:28:05 -0700 | [diff] [blame] | 302 | |
Aurelien Jarno | 1c0c13e | 2007-09-25 15:40:12 +0200 | [diff] [blame] | 303 | config BCM47XX |
Florian Fainelli | c619366 | 2010-03-25 11:42:41 +0100 | [diff] [blame] | 304 | bool "Broadcom BCM47XX based boards" |
Hauke Mehrtens | fe08f8c | 2012-12-26 20:06:17 +0000 | [diff] [blame] | 305 | select BOOT_RAW |
Ralf Baechle | 42f7754 | 2007-10-18 17:48:11 +0100 | [diff] [blame] | 306 | select CEVT_R4K |
Ralf Baechle | 940f6b4 | 2007-11-24 22:33:28 +0000 | [diff] [blame] | 307 | select CSRC_R4K |
Aurelien Jarno | 1c0c13e | 2007-09-25 15:40:12 +0200 | [diff] [blame] | 308 | select DMA_NONCOHERENT |
Christoph Hellwig | eb01d42 | 2018-11-15 20:05:32 +0100 | [diff] [blame] | 309 | select HAVE_PCI |
Ralf Baechle | 67e38cf | 2015-05-26 18:20:06 +0200 | [diff] [blame] | 310 | select IRQ_MIPS_CPU |
Markos Chandras | 314878d | 2013-07-23 15:40:37 +0100 | [diff] [blame] | 311 | select SYS_HAS_CPU_MIPS32_R1 |
Hauke Mehrtens | dd54ded | 2012-12-26 20:06:18 +0000 | [diff] [blame] | 312 | select NO_EXCEPT_FILL |
Aurelien Jarno | 1c0c13e | 2007-09-25 15:40:12 +0200 | [diff] [blame] | 313 | select SYS_SUPPORTS_32BIT_KERNEL |
| 314 | select SYS_SUPPORTS_LITTLE_ENDIAN |
Ralf Baechle | 377cb1b | 2014-04-29 01:49:24 +0200 | [diff] [blame] | 315 | select SYS_SUPPORTS_MIPS16 |
Aaro Koskinen | 6507831 | 2018-01-17 00:21:44 +0200 | [diff] [blame] | 316 | select SYS_SUPPORTS_ZBOOT |
Aurelien Jarno | 25e5fb9 | 2007-09-25 15:41:24 +0200 | [diff] [blame] | 317 | select SYS_HAS_EARLY_PRINTK |
Ralf Baechle | e608655 | 2014-03-26 21:40:25 +0100 | [diff] [blame] | 318 | select USE_GENERIC_EARLY_PRINTK_8250 |
Rafał Miłecki | c949c0b | 2014-06-17 16:36:50 +0200 | [diff] [blame] | 319 | select GPIOLIB |
| 320 | select LEDS_GPIO_REGISTER |
Rafał Miłecki | f6e734a | 2015-06-10 23:05:08 +0200 | [diff] [blame] | 321 | select BCM47XX_NVRAM |
Rafał Miłecki | 2ab71a0 | 2016-01-25 09:50:29 +0100 | [diff] [blame] | 322 | select BCM47XX_SPROM |
Matt Redfearn | dfe0049 | 2017-11-14 17:16:27 +0000 | [diff] [blame] | 323 | select BCM47XX_SSB if !BCM47XX_BCMA |
Aurelien Jarno | 1c0c13e | 2007-09-25 15:40:12 +0200 | [diff] [blame] | 324 | help |
Enrico Weigelt, metux IT consult | 371a415 | 2019-03-11 16:54:27 +0100 | [diff] [blame] | 325 | Support for BCM47XX based boards |
Aurelien Jarno | 1c0c13e | 2007-09-25 15:40:12 +0200 | [diff] [blame] | 326 | |
Maxime Bizon | e7300d0 | 2009-08-18 13:23:37 +0100 | [diff] [blame] | 327 | config BCM63XX |
| 328 | bool "Broadcom BCM63XX based boards" |
Florian Fainelli | ae8de61 | 2013-06-18 16:55:39 +0000 | [diff] [blame] | 329 | select BOOT_RAW |
Maxime Bizon | e7300d0 | 2009-08-18 13:23:37 +0100 | [diff] [blame] | 330 | select CEVT_R4K |
| 331 | select CSRC_R4K |
Jonas Gorski | fc26402 | 2014-07-08 16:26:13 +0200 | [diff] [blame] | 332 | select SYNC_R4K |
Maxime Bizon | e7300d0 | 2009-08-18 13:23:37 +0100 | [diff] [blame] | 333 | select DMA_NONCOHERENT |
Ralf Baechle | 67e38cf | 2015-05-26 18:20:06 +0200 | [diff] [blame] | 334 | select IRQ_MIPS_CPU |
Maxime Bizon | e7300d0 | 2009-08-18 13:23:37 +0100 | [diff] [blame] | 335 | select SYS_SUPPORTS_32BIT_KERNEL |
| 336 | select SYS_SUPPORTS_BIG_ENDIAN |
| 337 | select SYS_HAS_EARLY_PRINTK |
Randy Dunlap | 5eeaafc | 2021-11-06 08:49:11 -0700 | [diff] [blame] | 338 | select SYS_HAS_CPU_BMIPS32_3300 |
| 339 | select SYS_HAS_CPU_BMIPS4350 |
| 340 | select SYS_HAS_CPU_BMIPS4380 |
Maxime Bizon | e7300d0 | 2009-08-18 13:23:37 +0100 | [diff] [blame] | 341 | select SWAP_IO_SPACE |
Linus Walleij | d30a2b4 | 2016-04-19 11:23:22 +0200 | [diff] [blame] | 342 | select GPIOLIB |
Florian Fainelli | af2418b | 2014-01-14 09:54:40 -0800 | [diff] [blame] | 343 | select MIPS_L1_CACHE_SHIFT_4 |
Stephen Boyd | bbd7ffd | 2020-04-08 23:44:13 -0700 | [diff] [blame] | 344 | select HAVE_LEGACY_CLK |
Maxime Bizon | e7300d0 | 2009-08-18 13:23:37 +0100 | [diff] [blame] | 345 | help |
Enrico Weigelt, metux IT consult | 371a415 | 2019-03-11 16:54:27 +0100 | [diff] [blame] | 346 | Support for BCM63XX based boards |
Maxime Bizon | e7300d0 | 2009-08-18 13:23:37 +0100 | [diff] [blame] | 347 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 348 | config MIPS_COBALT |
Martin Michlmayr | 3fa986f | 2006-05-09 23:34:53 +0200 | [diff] [blame] | 349 | bool "Cobalt Server" |
Ralf Baechle | 42f7754 | 2007-10-18 17:48:11 +0100 | [diff] [blame] | 350 | select CEVT_R4K |
Ralf Baechle | 940f6b4 | 2007-11-24 22:33:28 +0000 | [diff] [blame] | 351 | select CSRC_R4K |
Yoichi Yuasa | 1097c6a | 2007-10-22 19:43:15 +0900 | [diff] [blame] | 352 | select CEVT_GT641XX |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 353 | select DMA_NONCOHERENT |
Christoph Hellwig | eb01d42 | 2018-11-15 20:05:32 +0100 | [diff] [blame] | 354 | select FORCE_PCI |
Ralf Baechle | d865bea | 2007-10-11 23:46:10 +0100 | [diff] [blame] | 355 | select I8253 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 356 | select I8259 |
Ralf Baechle | 67e38cf | 2015-05-26 18:20:06 +0200 | [diff] [blame] | 357 | select IRQ_MIPS_CPU |
Yoichi Yuasa | d5ab1a6 | 2007-09-13 23:51:26 +0900 | [diff] [blame] | 358 | select IRQ_GT641XX |
Yoichi Yuasa | 252161e | 2007-03-14 21:51:26 +0900 | [diff] [blame] | 359 | select PCI_GT64XXX_PCI0 |
Ralf Baechle | 7cf8053 | 2005-10-20 22:33:09 +0100 | [diff] [blame] | 360 | select SYS_HAS_CPU_NEVADA |
Yoichi Yuasa | 0a22e0d | 2007-03-02 12:42:33 +0900 | [diff] [blame] | 361 | select SYS_HAS_EARLY_PRINTK |
Yoichi Yuasa | ed5ba2f | 2005-09-03 15:56:21 -0700 | [diff] [blame] | 362 | select SYS_SUPPORTS_32BIT_KERNEL |
Florian Fainelli | 0e8774b | 2008-01-15 19:42:57 +0100 | [diff] [blame] | 363 | select SYS_SUPPORTS_64BIT_KERNEL |
Ralf Baechle | 5e83d43 | 2005-10-29 19:32:41 +0100 | [diff] [blame] | 364 | select SYS_SUPPORTS_LITTLE_ENDIAN |
Ralf Baechle | e608655 | 2014-03-26 21:40:25 +0100 | [diff] [blame] | 365 | select USE_GENERIC_EARLY_PRINTK_8250 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 366 | |
| 367 | config MACH_DECSTATION |
Martin Michlmayr | 3fa986f | 2006-05-09 23:34:53 +0200 | [diff] [blame] | 368 | bool "DECstations" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 369 | select BOOT_ELF32 |
Yoichi Yuasa | 6457d9f | 2008-04-25 12:11:44 +0900 | [diff] [blame] | 370 | select CEVT_DS1287 |
Maciej W. Rozycki | 81d10ba | 2014-04-06 21:46:05 +0100 | [diff] [blame] | 371 | select CEVT_R4K if CPU_R4X00 |
Yoichi Yuasa | 4247417 | 2008-04-24 09:48:40 +0900 | [diff] [blame] | 372 | select CSRC_IOASIC |
Maciej W. Rozycki | 81d10ba | 2014-04-06 21:46:05 +0100 | [diff] [blame] | 373 | select CSRC_R4K if CPU_R4X00 |
Maciej W. Rozycki | 20d60d9 | 2007-10-23 12:43:11 +0100 | [diff] [blame] | 374 | select CPU_DADDI_WORKAROUNDS if 64BIT |
| 375 | select CPU_R4000_WORKAROUNDS if 64BIT |
| 376 | select CPU_R4400_WORKAROUNDS if 64BIT |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 377 | select DMA_NONCOHERENT |
Uwe Kleine-König | ce816fa | 2014-04-07 15:39:19 -0700 | [diff] [blame] | 378 | select NO_IOPORT_MAP |
Ralf Baechle | 67e38cf | 2015-05-26 18:20:06 +0200 | [diff] [blame] | 379 | select IRQ_MIPS_CPU |
Ralf Baechle | 7cf8053 | 2005-10-20 22:33:09 +0100 | [diff] [blame] | 380 | select SYS_HAS_CPU_R3000 |
| 381 | select SYS_HAS_CPU_R4X00 |
Yoichi Yuasa | ed5ba2f | 2005-09-03 15:56:21 -0700 | [diff] [blame] | 382 | select SYS_SUPPORTS_32BIT_KERNEL |
Kees Cook | 7d60717 | 2013-01-16 18:53:19 -0800 | [diff] [blame] | 383 | select SYS_SUPPORTS_64BIT_KERNEL |
Ralf Baechle | 5e83d43 | 2005-10-29 19:32:41 +0100 | [diff] [blame] | 384 | select SYS_SUPPORTS_LITTLE_ENDIAN |
Atsushi Nemoto | 1723b4a | 2006-06-20 00:19:13 +0900 | [diff] [blame] | 385 | select SYS_SUPPORTS_128HZ |
| 386 | select SYS_SUPPORTS_256HZ |
| 387 | select SYS_SUPPORTS_1024HZ |
Florian Fainelli | 930beb5 | 2014-01-14 09:54:38 -0800 | [diff] [blame] | 388 | select MIPS_L1_CACHE_SHIFT_4 |
Ralf Baechle | 5e83d43 | 2005-10-29 19:32:41 +0100 | [diff] [blame] | 389 | help |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 390 | This enables support for DEC's MIPS based workstations. For details |
| 391 | see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the |
| 392 | DECstation porting pages on <http://decstation.unix-ag.org/>. |
| 393 | |
| 394 | If you have one of the following DECstation Models you definitely |
| 395 | want to choose R4xx0 for the CPU Type: |
| 396 | |
Ralf Baechle | 9308816 | 2007-08-29 14:21:45 +0100 | [diff] [blame] | 397 | DECstation 5000/50 |
| 398 | DECstation 5000/150 |
| 399 | DECstation 5000/260 |
| 400 | DECsystem 5900/260 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 401 | |
| 402 | otherwise choose R3000. |
| 403 | |
Ralf Baechle | 5e83d43 | 2005-10-29 19:32:41 +0100 | [diff] [blame] | 404 | config MACH_JAZZ |
Martin Michlmayr | 3fa986f | 2006-05-09 23:34:53 +0200 | [diff] [blame] | 405 | bool "Jazz family of machines" |
Thomas Bogendoerfer | 39b2d75 | 2019-10-09 15:27:14 +0200 | [diff] [blame] | 406 | select ARC_MEMORY |
| 407 | select ARC_PROMLIB |
Ralf Baechle | a211a082 | 2018-02-05 15:37:43 +0100 | [diff] [blame] | 408 | select ARCH_MIGHT_HAVE_PC_PARPORT |
Ralf Baechle | 7a407aa | 2018-02-05 16:40:00 +0100 | [diff] [blame] | 409 | select ARCH_MIGHT_HAVE_PC_SERIO |
Christoph Hellwig | 2f9237d | 2020-07-08 09:30:00 +0200 | [diff] [blame] | 410 | select DMA_OPS |
Ralf Baechle | 0e2794b | 2012-11-15 20:48:50 +0100 | [diff] [blame] | 411 | select FW_ARC |
| 412 | select FW_ARC32 |
Ralf Baechle | 5e83d43 | 2005-10-29 19:32:41 +0100 | [diff] [blame] | 413 | select ARCH_MAY_HAVE_PC_FDC |
Ralf Baechle | 42f7754 | 2007-10-18 17:48:11 +0100 | [diff] [blame] | 414 | select CEVT_R4K |
Ralf Baechle | 940f6b4 | 2007-11-24 22:33:28 +0000 | [diff] [blame] | 415 | select CSRC_R4K |
Thomas Bogendoerfer | e2defae | 2007-12-02 13:00:32 +0100 | [diff] [blame] | 416 | select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN |
Ralf Baechle | 5e83d43 | 2005-10-29 19:32:41 +0100 | [diff] [blame] | 417 | select GENERIC_ISA_DMA |
Ralf Baechle | 8a118c3 | 2011-06-01 19:05:10 +0100 | [diff] [blame] | 418 | select HAVE_PCSPKR_PLATFORM |
Ralf Baechle | 67e38cf | 2015-05-26 18:20:06 +0200 | [diff] [blame] | 419 | select IRQ_MIPS_CPU |
Ralf Baechle | d865bea | 2007-10-11 23:46:10 +0100 | [diff] [blame] | 420 | select I8253 |
Ralf Baechle | 5e83d43 | 2005-10-29 19:32:41 +0100 | [diff] [blame] | 421 | select I8259 |
| 422 | select ISA |
Ralf Baechle | 7cf8053 | 2005-10-20 22:33:09 +0100 | [diff] [blame] | 423 | select SYS_HAS_CPU_R4X00 |
Ralf Baechle | 5e83d43 | 2005-10-29 19:32:41 +0100 | [diff] [blame] | 424 | select SYS_SUPPORTS_32BIT_KERNEL |
Kees Cook | 7d60717 | 2013-01-16 18:53:19 -0800 | [diff] [blame] | 425 | select SYS_SUPPORTS_64BIT_KERNEL |
Atsushi Nemoto | 1723b4a | 2006-06-20 00:19:13 +0900 | [diff] [blame] | 426 | select SYS_SUPPORTS_100HZ |
Arnd Bergmann | aadfe4b | 2021-01-22 12:02:50 +0100 | [diff] [blame] | 427 | select SYS_SUPPORTS_LITTLE_ENDIAN |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 428 | help |
Enrico Weigelt, metux IT consult | 371a415 | 2019-03-11 16:54:27 +0100 | [diff] [blame] | 429 | This a family of machines based on the MIPS R4030 chipset which was |
| 430 | used by several vendors to build RISC/os and Windows NT workstations. |
| 431 | Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and |
| 432 | Olivetti M700-10 workstations. |
Ralf Baechle | 5e83d43 | 2005-10-29 19:32:41 +0100 | [diff] [blame] | 433 | |
Paul Cercueil | f0f4a75 | 2020-09-06 21:29:31 +0200 | [diff] [blame] | 434 | config MACH_INGENIC_SOC |
Paul Burton | de361e8 | 2015-05-24 16:11:13 +0100 | [diff] [blame] | 435 | bool "Ingenic SoC based machines" |
Paul Cercueil | f0f4a75 | 2020-09-06 21:29:31 +0200 | [diff] [blame] | 436 | select MIPS_GENERIC |
| 437 | select MACH_INGENIC |
Lluís Batlle i Rossell | f9c9aff | 2012-03-30 16:48:05 +0200 | [diff] [blame] | 438 | select SYS_SUPPORTS_ZBOOT_UART16550 |
Paul Cercueil | eb38493 | 2021-05-30 18:17:59 +0100 | [diff] [blame] | 439 | select CPU_SUPPORTS_CPUFREQ |
| 440 | select MIPS_EXTERNAL_TIMER |
Lars-Peter Clausen | 5ebabe5 | 2010-06-19 04:08:19 +0000 | [diff] [blame] | 441 | |
John Crispin | 171bb2f | 2011-03-30 09:27:47 +0200 | [diff] [blame] | 442 | config LANTIQ |
| 443 | bool "Lantiq based platforms" |
| 444 | select DMA_NONCOHERENT |
Ralf Baechle | 67e38cf | 2015-05-26 18:20:06 +0200 | [diff] [blame] | 445 | select IRQ_MIPS_CPU |
John Crispin | 171bb2f | 2011-03-30 09:27:47 +0200 | [diff] [blame] | 446 | select CEVT_R4K |
| 447 | select CSRC_R4K |
| 448 | select SYS_HAS_CPU_MIPS32_R1 |
| 449 | select SYS_HAS_CPU_MIPS32_R2 |
| 450 | select SYS_SUPPORTS_BIG_ENDIAN |
| 451 | select SYS_SUPPORTS_32BIT_KERNEL |
Ralf Baechle | 377cb1b | 2014-04-29 01:49:24 +0200 | [diff] [blame] | 452 | select SYS_SUPPORTS_MIPS16 |
John Crispin | 171bb2f | 2011-03-30 09:27:47 +0200 | [diff] [blame] | 453 | select SYS_SUPPORTS_MULTITHREADING |
James Hogan | f35764e | 2018-01-15 20:54:35 +0000 | [diff] [blame] | 454 | select SYS_SUPPORTS_VPE_LOADER |
John Crispin | 171bb2f | 2011-03-30 09:27:47 +0200 | [diff] [blame] | 455 | select SYS_HAS_EARLY_PRINTK |
Linus Walleij | d30a2b4 | 2016-04-19 11:23:22 +0200 | [diff] [blame] | 456 | select GPIOLIB |
John Crispin | 171bb2f | 2011-03-30 09:27:47 +0200 | [diff] [blame] | 457 | select SWAP_IO_SPACE |
| 458 | select BOOT_RAW |
Stephen Boyd | bbd7ffd | 2020-04-08 23:44:13 -0700 | [diff] [blame] | 459 | select HAVE_LEGACY_CLK |
John Crispin | a039222 | 2012-04-13 20:56:13 +0200 | [diff] [blame] | 460 | select USE_OF |
John Crispin | 3f8c50c | 2012-08-28 12:44:59 +0200 | [diff] [blame] | 461 | select PINCTRL |
| 462 | select PINCTRL_LANTIQ |
John Crispin | c530781 | 2013-09-03 13:18:12 +0200 | [diff] [blame] | 463 | select ARCH_HAS_RESET_CONTROLLER |
| 464 | select RESET_CONTROLLER |
John Crispin | 171bb2f | 2011-03-30 09:27:47 +0200 | [diff] [blame] | 465 | |
Huacai Chen | 30ad29b | 2015-04-21 10:00:35 +0800 | [diff] [blame] | 466 | config MACH_LOONGSON32 |
Huacai Chen | caed1d1 | 2019-11-04 14:11:21 +0800 | [diff] [blame] | 467 | bool "Loongson 32-bit family of machines" |
Wu Zhangjin | c7e8c66 | 2010-01-04 17:16:46 +0800 | [diff] [blame] | 468 | select SYS_SUPPORTS_ZBOOT |
Yoichi Yuasa | ade299d | 2007-07-27 15:25:43 +0900 | [diff] [blame] | 469 | help |
Huacai Chen | 30ad29b | 2015-04-21 10:00:35 +0800 | [diff] [blame] | 470 | This enables support for the Loongson-1 family of machines. |
Wu Zhangjin | 85749d2 | 2009-07-02 23:26:45 +0800 | [diff] [blame] | 471 | |
Huacai Chen | 30ad29b | 2015-04-21 10:00:35 +0800 | [diff] [blame] | 472 | Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by |
| 473 | the Institute of Computing Technology (ICT), Chinese Academy of |
| 474 | Sciences (CAS). |
Yoichi Yuasa | ade299d | 2007-07-27 15:25:43 +0900 | [diff] [blame] | 475 | |
Jiaxun Yang | 71e2f4d | 2019-10-20 22:43:14 +0800 | [diff] [blame] | 476 | config MACH_LOONGSON2EF |
| 477 | bool "Loongson-2E/F family of machines" |
Kelvin Cheung | ca585cf | 2012-07-25 16:17:24 +0200 | [diff] [blame] | 478 | select SYS_SUPPORTS_ZBOOT |
| 479 | help |
Jiaxun Yang | 71e2f4d | 2019-10-20 22:43:14 +0800 | [diff] [blame] | 480 | This enables the support of early Loongson-2E/F family of machines. |
Kelvin Cheung | ca585cf | 2012-07-25 16:17:24 +0200 | [diff] [blame] | 481 | |
Jiaxun Yang | 71e2f4d | 2019-10-20 22:43:14 +0800 | [diff] [blame] | 482 | config MACH_LOONGSON64 |
Huacai Chen | caed1d1 | 2019-11-04 14:11:21 +0800 | [diff] [blame] | 483 | bool "Loongson 64-bit family of machines" |
Jiaxun Yang | 6fbde6b | 2019-10-20 23:01:36 +0800 | [diff] [blame] | 484 | select ARCH_SPARSEMEM_ENABLE |
| 485 | select ARCH_MIGHT_HAVE_PC_PARPORT |
| 486 | select ARCH_MIGHT_HAVE_PC_SERIO |
| 487 | select GENERIC_ISA_DMA_SUPPORT_BROKEN |
| 488 | select BOOT_ELF32 |
| 489 | select BOARD_SCACHE |
| 490 | select CSRC_R4K |
| 491 | select CEVT_R4K |
| 492 | select CPU_HAS_WB |
| 493 | select FORCE_PCI |
| 494 | select ISA |
| 495 | select I8259 |
| 496 | select IRQ_MIPS_CPU |
Jiaxun Yang | 7d6d283 | 2020-05-27 14:34:34 +0800 | [diff] [blame] | 497 | select NO_EXCEPT_FILL |
Tiezhu Yang | 5125bfe | 2020-03-31 15:00:06 +0800 | [diff] [blame] | 498 | select NR_CPUS_DEFAULT_64 |
Jiaxun Yang | 6fbde6b | 2019-10-20 23:01:36 +0800 | [diff] [blame] | 499 | select USE_GENERIC_EARLY_PRINTK_8250 |
Jiaxun Yang | 6423e59 | 2020-05-26 17:21:16 +0800 | [diff] [blame] | 500 | select PCI_DRIVERS_GENERIC |
Jiaxun Yang | 6fbde6b | 2019-10-20 23:01:36 +0800 | [diff] [blame] | 501 | select SYS_HAS_CPU_LOONGSON64 |
| 502 | select SYS_HAS_EARLY_PRINTK |
| 503 | select SYS_SUPPORTS_SMP |
| 504 | select SYS_SUPPORTS_HOTPLUG_CPU |
| 505 | select SYS_SUPPORTS_NUMA |
| 506 | select SYS_SUPPORTS_64BIT_KERNEL |
| 507 | select SYS_SUPPORTS_HIGHMEM |
| 508 | select SYS_SUPPORTS_LITTLE_ENDIAN |
Jiaxun Yang | 71e2f4d | 2019-10-20 22:43:14 +0800 | [diff] [blame] | 509 | select SYS_SUPPORTS_ZBOOT |
Jinyang He | a307a4c | 2020-11-25 18:07:46 +0800 | [diff] [blame] | 510 | select SYS_SUPPORTS_RELOCATABLE |
Jiaxun Yang | 6fbde6b | 2019-10-20 23:01:36 +0800 | [diff] [blame] | 511 | select ZONE_DMA32 |
Jiaxun Yang | 87fcfa7 | 2020-03-25 11:55:02 +0800 | [diff] [blame] | 512 | select COMMON_CLK |
| 513 | select USE_OF |
| 514 | select BUILTIN_DTB |
Huacai Chen | 39c1485 | 2020-07-29 14:58:37 +0800 | [diff] [blame] | 515 | select PCI_HOST_GENERIC |
Feiyang Chen | f8f9f21 | 2022-03-19 17:40:02 +0800 | [diff] [blame] | 516 | select HAVE_ARCH_NODEDATA_EXTENSION if NUMA |
Jiaxun Yang | 71e2f4d | 2019-10-20 22:43:14 +0800 | [diff] [blame] | 517 | help |
Huacai Chen | caed1d1 | 2019-11-04 14:11:21 +0800 | [diff] [blame] | 518 | This enables the support of Loongson-2/3 family of machines. |
| 519 | |
| 520 | Loongson-2 and Loongson-3 are 64-bit general-purpose processors with |
| 521 | GS264/GS464/GS464E/GS464V microarchitecture (except old Loongson-2E |
| 522 | and Loongson-2F which will be removed), developed by the Institute |
| 523 | of Computing Technology (ICT), Chinese Academy of Sciences (CAS). |
Kelvin Cheung | ca585cf | 2012-07-25 16:17:24 +0200 | [diff] [blame] | 524 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 525 | config MIPS_MALTA |
Martin Michlmayr | 3fa986f | 2006-05-09 23:34:53 +0200 | [diff] [blame] | 526 | bool "MIPS Malta board" |
Ralf Baechle | 61ed242 | 2005-09-15 08:52:34 +0000 | [diff] [blame] | 527 | select ARCH_MAY_HAVE_PC_FDC |
Ralf Baechle | a211a082 | 2018-02-05 15:37:43 +0100 | [diff] [blame] | 528 | select ARCH_MIGHT_HAVE_PC_PARPORT |
Ralf Baechle | 7a407aa | 2018-02-05 16:40:00 +0100 | [diff] [blame] | 529 | select ARCH_MIGHT_HAVE_PC_SERIO |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 530 | select BOOT_ELF32 |
Ralf Baechle | fa71c96 | 2008-01-29 10:15:00 +0000 | [diff] [blame] | 531 | select BOOT_RAW |
Paul Burton | e8823d2 | 2015-05-22 16:51:02 +0100 | [diff] [blame] | 532 | select BUILTIN_DTB |
Ralf Baechle | 42f7754 | 2007-10-18 17:48:11 +0100 | [diff] [blame] | 533 | select CEVT_R4K |
Andrew Bresticker | fa5635a | 2014-10-20 12:03:58 -0700 | [diff] [blame] | 534 | select CLKSRC_MIPS_GIC |
Guenter Roeck | 42b002a | 2015-08-22 02:40:41 -0700 | [diff] [blame] | 535 | select COMMON_CLK |
Maksym Kokhan | 47bf2b0 | 2018-11-12 19:00:59 +0200 | [diff] [blame] | 536 | select CSRC_R4K |
Christoph Hellwig | a86497d | 2021-02-10 10:56:40 +0100 | [diff] [blame] | 537 | select DMA_NONCOHERENT |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 538 | select GENERIC_ISA_DMA |
Ralf Baechle | 8a118c3 | 2011-06-01 19:05:10 +0100 | [diff] [blame] | 539 | select HAVE_PCSPKR_PLATFORM |
Christoph Hellwig | eb01d42 | 2018-11-15 20:05:32 +0100 | [diff] [blame] | 540 | select HAVE_PCI |
Ralf Baechle | d865bea | 2007-10-11 23:46:10 +0100 | [diff] [blame] | 541 | select I8253 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 542 | select I8259 |
Maksym Kokhan | 47bf2b0 | 2018-11-12 19:00:59 +0200 | [diff] [blame] | 543 | select IRQ_MIPS_CPU |
Ralf Baechle | 5e83d43 | 2005-10-29 19:32:41 +0100 | [diff] [blame] | 544 | select MIPS_BONITO64 |
Chris Dearman | 9318c51 | 2006-06-20 17:15:20 +0100 | [diff] [blame] | 545 | select MIPS_CPU_SCACHE |
Maksym Kokhan | 47bf2b0 | 2018-11-12 19:00:59 +0200 | [diff] [blame] | 546 | select MIPS_GIC |
Kevin Cernekee | a7ef1ea | 2014-10-20 21:27:57 -0700 | [diff] [blame] | 547 | select MIPS_L1_CACHE_SHIFT_6 |
Ralf Baechle | 5e83d43 | 2005-10-29 19:32:41 +0100 | [diff] [blame] | 548 | select MIPS_MSC |
Maksym Kokhan | 47bf2b0 | 2018-11-12 19:00:59 +0200 | [diff] [blame] | 549 | select PCI_GT64XXX_PCI0 |
Paul Burton | ecafe3e | 2015-09-22 11:58:43 -0700 | [diff] [blame] | 550 | select SMP_UP if SMP |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 551 | select SWAP_IO_SPACE |
Ralf Baechle | 7cf8053 | 2005-10-20 22:33:09 +0100 | [diff] [blame] | 552 | select SYS_HAS_CPU_MIPS32_R1 |
| 553 | select SYS_HAS_CPU_MIPS32_R2 |
Markos Chandras | bfc3c5a | 2014-01-16 13:12:36 +0000 | [diff] [blame] | 554 | select SYS_HAS_CPU_MIPS32_R3_5 |
Steven J. Hill | c5b3678 | 2015-02-26 18:16:38 -0600 | [diff] [blame] | 555 | select SYS_HAS_CPU_MIPS32_R5 |
Markos Chandras | 575509b | 2014-11-19 11:31:56 +0000 | [diff] [blame] | 556 | select SYS_HAS_CPU_MIPS32_R6 |
Ralf Baechle | 7cf8053 | 2005-10-20 22:33:09 +0100 | [diff] [blame] | 557 | select SYS_HAS_CPU_MIPS64_R1 |
Leonid Yegoshin | 5d9fbed | 2012-07-19 09:11:15 +0200 | [diff] [blame] | 558 | select SYS_HAS_CPU_MIPS64_R2 |
Markos Chandras | 575509b | 2014-11-19 11:31:56 +0000 | [diff] [blame] | 559 | select SYS_HAS_CPU_MIPS64_R6 |
Ralf Baechle | 7cf8053 | 2005-10-20 22:33:09 +0100 | [diff] [blame] | 560 | select SYS_HAS_CPU_NEVADA |
| 561 | select SYS_HAS_CPU_RM7000 |
Yoichi Yuasa | ed5ba2f | 2005-09-03 15:56:21 -0700 | [diff] [blame] | 562 | select SYS_SUPPORTS_32BIT_KERNEL |
| 563 | select SYS_SUPPORTS_64BIT_KERNEL |
Ralf Baechle | 5e83d43 | 2005-10-29 19:32:41 +0100 | [diff] [blame] | 564 | select SYS_SUPPORTS_BIG_ENDIAN |
Steven J. Hill | c5b3678 | 2015-02-26 18:16:38 -0600 | [diff] [blame] | 565 | select SYS_SUPPORTS_HIGHMEM |
Ralf Baechle | 5e83d43 | 2005-10-29 19:32:41 +0100 | [diff] [blame] | 566 | select SYS_SUPPORTS_LITTLE_ENDIAN |
Maciej W. Rozycki | 424ebcd | 2014-11-15 22:07:07 +0000 | [diff] [blame] | 567 | select SYS_SUPPORTS_MICROMIPS |
Maksym Kokhan | 47bf2b0 | 2018-11-12 19:00:59 +0200 | [diff] [blame] | 568 | select SYS_SUPPORTS_MIPS16 |
Tim Anderson | 0365070 | 2009-06-17 16:22:53 -0700 | [diff] [blame] | 569 | select SYS_SUPPORTS_MIPS_CMP |
Paul Burton | e56b6aa | 2014-01-15 10:31:56 +0000 | [diff] [blame] | 570 | select SYS_SUPPORTS_MIPS_CPS |
Ralf Baechle | f41ae0b | 2006-06-05 17:24:46 +0100 | [diff] [blame] | 571 | select SYS_SUPPORTS_MULTITHREADING |
Maksym Kokhan | 47bf2b0 | 2018-11-12 19:00:59 +0200 | [diff] [blame] | 572 | select SYS_SUPPORTS_RELOCATABLE |
Franck Bui-Huu | 9693a85 | 2007-02-02 17:41:47 +0100 | [diff] [blame] | 573 | select SYS_SUPPORTS_SMARTMIPS |
James Hogan | f35764e | 2018-01-15 20:54:35 +0000 | [diff] [blame] | 574 | select SYS_SUPPORTS_VPE_LOADER |
Wu Zhangjin | 1b93b3c | 2009-10-14 18:12:16 +0800 | [diff] [blame] | 575 | select SYS_SUPPORTS_ZBOOT |
Paul Burton | e8823d2 | 2015-05-22 16:51:02 +0100 | [diff] [blame] | 576 | select USE_OF |
Thomas Bogendoerfer | 886ee13 | 2020-08-24 18:32:48 +0200 | [diff] [blame] | 577 | select WAR_ICACHE_REFILLS |
James Hogan | abcc82b | 2015-04-27 15:07:19 +0100 | [diff] [blame] | 578 | select ZONE_DMA32 if 64BIT |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 579 | help |
Maciej W. Rozycki | f638d19 | 2005-02-02 22:23:46 +0000 | [diff] [blame] | 580 | This enables support for the MIPS Technologies Malta evaluation |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 581 | board. |
| 582 | |
Joshua Henderson | 2572f00 | 2016-01-13 18:15:39 -0700 | [diff] [blame] | 583 | config MACH_PIC32 |
| 584 | bool "Microchip PIC32 Family" |
| 585 | help |
| 586 | This enables support for the Microchip PIC32 family of platforms. |
| 587 | |
| 588 | Microchip PIC32 is a family of general-purpose 32 bit MIPS core |
| 589 | microcontrollers. |
| 590 | |
Ralf Baechle | 5e83d43 | 2005-10-29 19:32:41 +0100 | [diff] [blame] | 591 | config MACH_VR41XX |
Yoichi Yuasa | 74142d6 | 2007-04-26 19:45:09 +0900 | [diff] [blame] | 592 | bool "NEC VR4100 series based machines" |
Ralf Baechle | 42f7754 | 2007-10-18 17:48:11 +0100 | [diff] [blame] | 593 | select CEVT_R4K |
Ralf Baechle | 940f6b4 | 2007-11-24 22:33:28 +0000 | [diff] [blame] | 594 | select CSRC_R4K |
Ralf Baechle | 7cf8053 | 2005-10-20 22:33:09 +0100 | [diff] [blame] | 595 | select SYS_HAS_CPU_VR41XX |
Ralf Baechle | 377cb1b | 2014-04-29 01:49:24 +0200 | [diff] [blame] | 596 | select SYS_SUPPORTS_MIPS16 |
Linus Walleij | d30a2b4 | 2016-04-19 11:23:22 +0200 | [diff] [blame] | 597 | select GPIOLIB |
Ralf Baechle | 5e83d43 | 2005-10-29 19:32:41 +0100 | [diff] [blame] | 598 | |
Lauri Kasanen | baec970 | 2021-01-13 17:11:23 +0200 | [diff] [blame] | 599 | config MACH_NINTENDO64 |
| 600 | bool "Nintendo 64 console" |
| 601 | select CEVT_R4K |
| 602 | select CSRC_R4K |
| 603 | select SYS_HAS_CPU_R4300 |
| 604 | select SYS_SUPPORTS_BIG_ENDIAN |
| 605 | select SYS_SUPPORTS_ZBOOT |
| 606 | select SYS_SUPPORTS_32BIT_KERNEL |
| 607 | select SYS_SUPPORTS_64BIT_KERNEL |
| 608 | select DMA_NONCOHERENT |
| 609 | select IRQ_MIPS_CPU |
| 610 | |
John Crispin | ae2b5bb | 2013-01-20 22:05:30 +0100 | [diff] [blame] | 611 | config RALINK |
| 612 | bool "Ralink based machines" |
| 613 | select CEVT_R4K |
Arnd Bergmann | 35f752b | 2021-05-31 13:51:18 +0200 | [diff] [blame] | 614 | select COMMON_CLK |
John Crispin | ae2b5bb | 2013-01-20 22:05:30 +0100 | [diff] [blame] | 615 | select CSRC_R4K |
| 616 | select BOOT_RAW |
| 617 | select DMA_NONCOHERENT |
Ralf Baechle | 67e38cf | 2015-05-26 18:20:06 +0200 | [diff] [blame] | 618 | select IRQ_MIPS_CPU |
John Crispin | ae2b5bb | 2013-01-20 22:05:30 +0100 | [diff] [blame] | 619 | select USE_OF |
| 620 | select SYS_HAS_CPU_MIPS32_R1 |
| 621 | select SYS_HAS_CPU_MIPS32_R2 |
| 622 | select SYS_SUPPORTS_32BIT_KERNEL |
| 623 | select SYS_SUPPORTS_LITTLE_ENDIAN |
Ralf Baechle | 377cb1b | 2014-04-29 01:49:24 +0200 | [diff] [blame] | 624 | select SYS_SUPPORTS_MIPS16 |
Chuanhong Guo | 1f0400d | 2020-10-13 10:05:47 +0800 | [diff] [blame] | 625 | select SYS_SUPPORTS_ZBOOT |
John Crispin | ae2b5bb | 2013-01-20 22:05:30 +0100 | [diff] [blame] | 626 | select SYS_HAS_EARLY_PRINTK |
John Crispin | 2a153f1 | 2013-09-04 00:16:59 +0200 | [diff] [blame] | 627 | select ARCH_HAS_RESET_CONTROLLER |
| 628 | select RESET_CONTROLLER |
John Crispin | ae2b5bb | 2013-01-20 22:05:30 +0100 | [diff] [blame] | 629 | |
Bert Vermeulen | 4042147 | 2021-01-19 10:21:07 +0100 | [diff] [blame] | 630 | config MACH_REALTEK_RTL |
| 631 | bool "Realtek RTL838x/RTL839x based machines" |
| 632 | select MIPS_GENERIC |
| 633 | select DMA_NONCOHERENT |
| 634 | select IRQ_MIPS_CPU |
| 635 | select CSRC_R4K |
| 636 | select CEVT_R4K |
| 637 | select SYS_HAS_CPU_MIPS32_R1 |
| 638 | select SYS_HAS_CPU_MIPS32_R2 |
| 639 | select SYS_SUPPORTS_BIG_ENDIAN |
| 640 | select SYS_SUPPORTS_32BIT_KERNEL |
| 641 | select SYS_SUPPORTS_MIPS16 |
| 642 | select SYS_SUPPORTS_MULTITHREADING |
| 643 | select SYS_SUPPORTS_VPE_LOADER |
Bert Vermeulen | 4042147 | 2021-01-19 10:21:07 +0100 | [diff] [blame] | 644 | select BOOT_RAW |
| 645 | select PINCTRL |
| 646 | select USE_OF |
| 647 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 648 | config SGI_IP22 |
Martin Michlmayr | 3fa986f | 2006-05-09 23:34:53 +0200 | [diff] [blame] | 649 | bool "SGI IP22 (Indy/Indigo2)" |
Thomas Bogendoerfer | c0de00b | 2019-10-09 15:27:17 +0200 | [diff] [blame] | 650 | select ARC_MEMORY |
Thomas Bogendoerfer | 39b2d75 | 2019-10-09 15:27:14 +0200 | [diff] [blame] | 651 | select ARC_PROMLIB |
Ralf Baechle | 0e2794b | 2012-11-15 20:48:50 +0100 | [diff] [blame] | 652 | select FW_ARC |
| 653 | select FW_ARC32 |
Ralf Baechle | 7a407aa | 2018-02-05 16:40:00 +0100 | [diff] [blame] | 654 | select ARCH_MIGHT_HAVE_PC_SERIO |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 655 | select BOOT_ELF32 |
Ralf Baechle | 42f7754 | 2007-10-18 17:48:11 +0100 | [diff] [blame] | 656 | select CEVT_R4K |
Ralf Baechle | 940f6b4 | 2007-11-24 22:33:28 +0000 | [diff] [blame] | 657 | select CSRC_R4K |
Thomas Bogendoerfer | e2defae | 2007-12-02 13:00:32 +0100 | [diff] [blame] | 658 | select DEFAULT_SGI_PARTITION |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 659 | select DMA_NONCOHERENT |
Christoph Hellwig | 6630a8e | 2018-11-15 20:05:37 +0100 | [diff] [blame] | 660 | select HAVE_EISA |
Ralf Baechle | d865bea | 2007-10-11 23:46:10 +0100 | [diff] [blame] | 661 | select I8253 |
Thomas Bogendoerfer | 68de480 | 2007-11-23 20:34:16 +0100 | [diff] [blame] | 662 | select I8259 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 663 | select IP22_CPU_SCACHE |
Ralf Baechle | 67e38cf | 2015-05-26 18:20:06 +0200 | [diff] [blame] | 664 | select IRQ_MIPS_CPU |
Ralf Baechle | aa414df | 2006-11-30 01:14:51 +0000 | [diff] [blame] | 665 | select GENERIC_ISA_DMA_SUPPORT_BROKEN |
Thomas Bogendoerfer | e2defae | 2007-12-02 13:00:32 +0100 | [diff] [blame] | 666 | select SGI_HAS_I8042 |
| 667 | select SGI_HAS_INDYDOG |
Thomas Bogendoerfer | 36e5c21 | 2008-07-16 14:06:15 +0200 | [diff] [blame] | 668 | select SGI_HAS_HAL2 |
Thomas Bogendoerfer | e2defae | 2007-12-02 13:00:32 +0100 | [diff] [blame] | 669 | select SGI_HAS_SEEQ |
| 670 | select SGI_HAS_WD93 |
| 671 | select SGI_HAS_ZILOG |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 672 | select SWAP_IO_SPACE |
Ralf Baechle | 7cf8053 | 2005-10-20 22:33:09 +0100 | [diff] [blame] | 673 | select SYS_HAS_CPU_R4X00 |
| 674 | select SYS_HAS_CPU_R5000 |
Thomas Bogendoerfer | c0de00b | 2019-10-09 15:27:17 +0200 | [diff] [blame] | 675 | select SYS_HAS_EARLY_PRINTK |
Yoichi Yuasa | ed5ba2f | 2005-09-03 15:56:21 -0700 | [diff] [blame] | 676 | select SYS_SUPPORTS_32BIT_KERNEL |
| 677 | select SYS_SUPPORTS_64BIT_KERNEL |
Ralf Baechle | 5e83d43 | 2005-10-29 19:32:41 +0100 | [diff] [blame] | 678 | select SYS_SUPPORTS_BIG_ENDIAN |
Thomas Bogendoerfer | 802b8362 | 2020-08-24 18:32:43 +0200 | [diff] [blame] | 679 | select WAR_R4600_V1_INDEX_ICACHEOP |
Thomas Bogendoerfer | 5e5b652 | 2020-08-24 18:32:44 +0200 | [diff] [blame] | 680 | select WAR_R4600_V1_HIT_CACHEOP |
Thomas Bogendoerfer | 44def34 | 2020-08-24 18:32:45 +0200 | [diff] [blame] | 681 | select WAR_R4600_V2_HIT_CACHEOP |
Florian Fainelli | 930beb5 | 2014-01-14 09:54:38 -0800 | [diff] [blame] | 682 | select MIPS_L1_CACHE_SHIFT_7 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 683 | help |
| 684 | This are the SGI Indy, Challenge S and Indigo2, as well as certain |
| 685 | OEM variants like the Tandem CMN B006S. To compile a Linux kernel |
| 686 | that runs on these, say Y here. |
| 687 | |
| 688 | config SGI_IP27 |
Martin Michlmayr | 3fa986f | 2006-05-09 23:34:53 +0200 | [diff] [blame] | 689 | bool "SGI IP27 (Origin200/2000)" |
Christoph Hellwig | 54aed4d | 2018-06-15 13:08:44 +0200 | [diff] [blame] | 690 | select ARCH_HAS_PHYS_TO_DMA |
Mike Rapoport | 397dc00 | 2019-09-16 14:13:10 +0300 | [diff] [blame] | 691 | select ARCH_SPARSEMEM_ENABLE |
Ralf Baechle | 0e2794b | 2012-11-15 20:48:50 +0100 | [diff] [blame] | 692 | select FW_ARC |
| 693 | select FW_ARC64 |
Thomas Bogendoerfer | e942242 | 2019-10-22 18:13:15 +0200 | [diff] [blame] | 694 | select ARC_CMDLINE_ONLY |
Ralf Baechle | 5e83d43 | 2005-10-29 19:32:41 +0100 | [diff] [blame] | 695 | select BOOT_ELF64 |
Thomas Bogendoerfer | e2defae | 2007-12-02 13:00:32 +0100 | [diff] [blame] | 696 | select DEFAULT_SGI_PARTITION |
Christoph Hellwig | 0410045 | 2021-03-01 08:38:32 +0100 | [diff] [blame] | 697 | select FORCE_PCI |
Ralf Baechle | 36a8853 | 2007-03-01 11:56:43 +0000 | [diff] [blame] | 698 | select SYS_HAS_EARLY_PRINTK |
Christoph Hellwig | eb01d42 | 2018-11-15 20:05:32 +0100 | [diff] [blame] | 699 | select HAVE_PCI |
Thomas Bogendoerfer | 69a07a4 | 2019-02-19 16:57:20 +0100 | [diff] [blame] | 700 | select IRQ_MIPS_CPU |
Thomas Bogendoerfer | e6308b6 | 2019-05-07 23:09:15 +0200 | [diff] [blame] | 701 | select IRQ_DOMAIN_HIERARCHY |
Ralf Baechle | 130e2fb | 2007-02-06 16:53:15 +0000 | [diff] [blame] | 702 | select NR_CPUS_DEFAULT_64 |
Thomas Bogendoerfer | a57140e | 2019-05-07 23:09:13 +0200 | [diff] [blame] | 703 | select PCI_DRIVERS_GENERIC |
| 704 | select PCI_XTALK_BRIDGE |
Ralf Baechle | 7cf8053 | 2005-10-20 22:33:09 +0100 | [diff] [blame] | 705 | select SYS_HAS_CPU_R10000 |
Yoichi Yuasa | ed5ba2f | 2005-09-03 15:56:21 -0700 | [diff] [blame] | 706 | select SYS_SUPPORTS_64BIT_KERNEL |
Ralf Baechle | 5e83d43 | 2005-10-29 19:32:41 +0100 | [diff] [blame] | 707 | select SYS_SUPPORTS_BIG_ENDIAN |
Ralf Baechle | d8cb4e1 | 2006-06-11 23:03:08 +0100 | [diff] [blame] | 708 | select SYS_SUPPORTS_NUMA |
Ralf Baechle | 1a5c5de | 2006-11-02 17:23:33 +0000 | [diff] [blame] | 709 | select SYS_SUPPORTS_SMP |
Thomas Bogendoerfer | 256ec48 | 2020-08-24 18:32:49 +0200 | [diff] [blame] | 710 | select WAR_R10000_LLSC |
Florian Fainelli | 930beb5 | 2014-01-14 09:54:38 -0800 | [diff] [blame] | 711 | select MIPS_L1_CACHE_SHIFT_7 |
Mike Rapoport | 6c86a30 | 2020-08-05 15:51:41 +0300 | [diff] [blame] | 712 | select NUMA |
Feiyang Chen | f8f9f21 | 2022-03-19 17:40:02 +0800 | [diff] [blame] | 713 | select HAVE_ARCH_NODEDATA_EXTENSION |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 714 | help |
| 715 | This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics |
| 716 | workstations. To compile a Linux kernel that runs on these, say Y |
| 717 | here. |
| 718 | |
Thomas Bogendoerfer | e2defae | 2007-12-02 13:00:32 +0100 | [diff] [blame] | 719 | config SGI_IP28 |
Kees Cook | 7d60717 | 2013-01-16 18:53:19 -0800 | [diff] [blame] | 720 | bool "SGI IP28 (Indigo2 R10k)" |
Thomas Bogendoerfer | c0de00b | 2019-10-09 15:27:17 +0200 | [diff] [blame] | 721 | select ARC_MEMORY |
Thomas Bogendoerfer | 39b2d75 | 2019-10-09 15:27:14 +0200 | [diff] [blame] | 722 | select ARC_PROMLIB |
Ralf Baechle | 0e2794b | 2012-11-15 20:48:50 +0100 | [diff] [blame] | 723 | select FW_ARC |
| 724 | select FW_ARC64 |
Ralf Baechle | 7a407aa | 2018-02-05 16:40:00 +0100 | [diff] [blame] | 725 | select ARCH_MIGHT_HAVE_PC_SERIO |
Thomas Bogendoerfer | e2defae | 2007-12-02 13:00:32 +0100 | [diff] [blame] | 726 | select BOOT_ELF64 |
| 727 | select CEVT_R4K |
| 728 | select CSRC_R4K |
| 729 | select DEFAULT_SGI_PARTITION |
| 730 | select DMA_NONCOHERENT |
| 731 | select GENERIC_ISA_DMA_SUPPORT_BROKEN |
Ralf Baechle | 67e38cf | 2015-05-26 18:20:06 +0200 | [diff] [blame] | 732 | select IRQ_MIPS_CPU |
Christoph Hellwig | 6630a8e | 2018-11-15 20:05:37 +0100 | [diff] [blame] | 733 | select HAVE_EISA |
Thomas Bogendoerfer | e2defae | 2007-12-02 13:00:32 +0100 | [diff] [blame] | 734 | select I8253 |
| 735 | select I8259 |
Thomas Bogendoerfer | e2defae | 2007-12-02 13:00:32 +0100 | [diff] [blame] | 736 | select SGI_HAS_I8042 |
| 737 | select SGI_HAS_INDYDOG |
Thomas Bogendoerfer | 5b438c4 | 2008-07-10 20:29:55 +0200 | [diff] [blame] | 738 | select SGI_HAS_HAL2 |
Thomas Bogendoerfer | e2defae | 2007-12-02 13:00:32 +0100 | [diff] [blame] | 739 | select SGI_HAS_SEEQ |
| 740 | select SGI_HAS_WD93 |
| 741 | select SGI_HAS_ZILOG |
| 742 | select SWAP_IO_SPACE |
| 743 | select SYS_HAS_CPU_R10000 |
Thomas Bogendoerfer | c0de00b | 2019-10-09 15:27:17 +0200 | [diff] [blame] | 744 | select SYS_HAS_EARLY_PRINTK |
Thomas Bogendoerfer | e2defae | 2007-12-02 13:00:32 +0100 | [diff] [blame] | 745 | select SYS_SUPPORTS_64BIT_KERNEL |
| 746 | select SYS_SUPPORTS_BIG_ENDIAN |
Thomas Bogendoerfer | 256ec48 | 2020-08-24 18:32:49 +0200 | [diff] [blame] | 747 | select WAR_R10000_LLSC |
Thomas Bogendoerfer | dc24d68d | 2014-08-19 22:00:07 +0200 | [diff] [blame] | 748 | select MIPS_L1_CACHE_SHIFT_7 |
Enrico Weigelt, metux IT consult | 371a415 | 2019-03-11 16:54:27 +0100 | [diff] [blame] | 749 | help |
| 750 | This is the SGI Indigo2 with R10000 processor. To compile a Linux |
| 751 | kernel that runs on these, say Y here. |
Thomas Bogendoerfer | e2defae | 2007-12-02 13:00:32 +0100 | [diff] [blame] | 752 | |
Thomas Bogendoerfer | 7505576 | 2019-10-24 12:18:29 +0200 | [diff] [blame] | 753 | config SGI_IP30 |
| 754 | bool "SGI IP30 (Octane/Octane2)" |
| 755 | select ARCH_HAS_PHYS_TO_DMA |
| 756 | select FW_ARC |
| 757 | select FW_ARC64 |
| 758 | select BOOT_ELF64 |
| 759 | select CEVT_R4K |
| 760 | select CSRC_R4K |
Christoph Hellwig | 0410045 | 2021-03-01 08:38:32 +0100 | [diff] [blame] | 761 | select FORCE_PCI |
Thomas Bogendoerfer | 7505576 | 2019-10-24 12:18:29 +0200 | [diff] [blame] | 762 | select SYNC_R4K if SMP |
| 763 | select ZONE_DMA32 |
| 764 | select HAVE_PCI |
| 765 | select IRQ_MIPS_CPU |
| 766 | select IRQ_DOMAIN_HIERARCHY |
Thomas Bogendoerfer | 7505576 | 2019-10-24 12:18:29 +0200 | [diff] [blame] | 767 | select PCI_DRIVERS_GENERIC |
| 768 | select PCI_XTALK_BRIDGE |
| 769 | select SYS_HAS_EARLY_PRINTK |
| 770 | select SYS_HAS_CPU_R10000 |
| 771 | select SYS_SUPPORTS_64BIT_KERNEL |
| 772 | select SYS_SUPPORTS_BIG_ENDIAN |
| 773 | select SYS_SUPPORTS_SMP |
Thomas Bogendoerfer | 256ec48 | 2020-08-24 18:32:49 +0200 | [diff] [blame] | 774 | select WAR_R10000_LLSC |
Thomas Bogendoerfer | 7505576 | 2019-10-24 12:18:29 +0200 | [diff] [blame] | 775 | select MIPS_L1_CACHE_SHIFT_7 |
| 776 | select ARC_MEMORY |
| 777 | help |
| 778 | These are the SGI Octane and Octane2 graphics workstations. To |
| 779 | compile a Linux kernel that runs on these, say Y here. |
| 780 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 781 | config SGI_IP32 |
Ralf Baechle | cfd2afc | 2007-07-10 17:33:00 +0100 | [diff] [blame] | 782 | bool "SGI IP32 (O2)" |
Thomas Bogendoerfer | 39b2d75 | 2019-10-09 15:27:14 +0200 | [diff] [blame] | 783 | select ARC_MEMORY |
| 784 | select ARC_PROMLIB |
Christoph Hellwig | 03df822 | 2018-06-15 13:08:48 +0200 | [diff] [blame] | 785 | select ARCH_HAS_PHYS_TO_DMA |
Ralf Baechle | 0e2794b | 2012-11-15 20:48:50 +0100 | [diff] [blame] | 786 | select FW_ARC |
| 787 | select FW_ARC32 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 788 | select BOOT_ELF32 |
Ralf Baechle | 42f7754 | 2007-10-18 17:48:11 +0100 | [diff] [blame] | 789 | select CEVT_R4K |
Ralf Baechle | 940f6b4 | 2007-11-24 22:33:28 +0000 | [diff] [blame] | 790 | select CSRC_R4K |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 791 | select DMA_NONCOHERENT |
Christoph Hellwig | eb01d42 | 2018-11-15 20:05:32 +0100 | [diff] [blame] | 792 | select HAVE_PCI |
Ralf Baechle | 67e38cf | 2015-05-26 18:20:06 +0200 | [diff] [blame] | 793 | select IRQ_MIPS_CPU |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 794 | select R5000_CPU_SCACHE |
| 795 | select RM7000_CPU_SCACHE |
Ralf Baechle | 7cf8053 | 2005-10-20 22:33:09 +0100 | [diff] [blame] | 796 | select SYS_HAS_CPU_R5000 |
| 797 | select SYS_HAS_CPU_R10000 if BROKEN |
| 798 | select SYS_HAS_CPU_RM7000 |
Ralf Baechle | dd2f18f | 2006-01-19 14:55:42 +0000 | [diff] [blame] | 799 | select SYS_HAS_CPU_NEVADA |
Yoichi Yuasa | ed5ba2f | 2005-09-03 15:56:21 -0700 | [diff] [blame] | 800 | select SYS_SUPPORTS_64BIT_KERNEL |
Ralf Baechle | 5e83d43 | 2005-10-29 19:32:41 +0100 | [diff] [blame] | 801 | select SYS_SUPPORTS_BIG_ENDIAN |
Thomas Bogendoerfer | 886ee13 | 2020-08-24 18:32:48 +0200 | [diff] [blame] | 802 | select WAR_ICACHE_REFILLS |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 803 | help |
| 804 | If you want this kernel to run on SGI O2 workstation, say Y here. |
| 805 | |
Yoichi Yuasa | ade299d | 2007-07-27 15:25:43 +0900 | [diff] [blame] | 806 | config SIBYTE_CRHINE |
| 807 | bool "Sibyte BCM91120C-CRhine" |
Ralf Baechle | 5e83d43 | 2005-10-29 19:32:41 +0100 | [diff] [blame] | 808 | select BOOT_ELF32 |
Ralf Baechle | 5e83d43 | 2005-10-29 19:32:41 +0100 | [diff] [blame] | 809 | select SIBYTE_BCM1120 |
| 810 | select SWAP_IO_SPACE |
Ralf Baechle | 7cf8053 | 2005-10-20 22:33:09 +0100 | [diff] [blame] | 811 | select SYS_HAS_CPU_SB1 |
Ralf Baechle | 5e83d43 | 2005-10-29 19:32:41 +0100 | [diff] [blame] | 812 | select SYS_SUPPORTS_BIG_ENDIAN |
| 813 | select SYS_SUPPORTS_LITTLE_ENDIAN |
| 814 | |
Yoichi Yuasa | ade299d | 2007-07-27 15:25:43 +0900 | [diff] [blame] | 815 | config SIBYTE_CARMEL |
| 816 | bool "Sibyte BCM91120x-Carmel" |
Ralf Baechle | 5e83d43 | 2005-10-29 19:32:41 +0100 | [diff] [blame] | 817 | select BOOT_ELF32 |
Ralf Baechle | 5e83d43 | 2005-10-29 19:32:41 +0100 | [diff] [blame] | 818 | select SIBYTE_BCM1120 |
| 819 | select SWAP_IO_SPACE |
Ralf Baechle | 7cf8053 | 2005-10-20 22:33:09 +0100 | [diff] [blame] | 820 | select SYS_HAS_CPU_SB1 |
Ralf Baechle | 5e83d43 | 2005-10-29 19:32:41 +0100 | [diff] [blame] | 821 | select SYS_SUPPORTS_BIG_ENDIAN |
| 822 | select SYS_SUPPORTS_LITTLE_ENDIAN |
| 823 | |
| 824 | config SIBYTE_CRHONE |
Martin Michlmayr | 3fa986f | 2006-05-09 23:34:53 +0200 | [diff] [blame] | 825 | bool "Sibyte BCM91125C-CRhone" |
Ralf Baechle | 5e83d43 | 2005-10-29 19:32:41 +0100 | [diff] [blame] | 826 | select BOOT_ELF32 |
Ralf Baechle | 5e83d43 | 2005-10-29 19:32:41 +0100 | [diff] [blame] | 827 | select SIBYTE_BCM1125 |
| 828 | select SWAP_IO_SPACE |
Ralf Baechle | 7cf8053 | 2005-10-20 22:33:09 +0100 | [diff] [blame] | 829 | select SYS_HAS_CPU_SB1 |
Ralf Baechle | 5e83d43 | 2005-10-29 19:32:41 +0100 | [diff] [blame] | 830 | select SYS_SUPPORTS_BIG_ENDIAN |
| 831 | select SYS_SUPPORTS_HIGHMEM |
| 832 | select SYS_SUPPORTS_LITTLE_ENDIAN |
| 833 | |
Yoichi Yuasa | ade299d | 2007-07-27 15:25:43 +0900 | [diff] [blame] | 834 | config SIBYTE_RHONE |
| 835 | bool "Sibyte BCM91125E-Rhone" |
Yoichi Yuasa | ade299d | 2007-07-27 15:25:43 +0900 | [diff] [blame] | 836 | select BOOT_ELF32 |
Yoichi Yuasa | ade299d | 2007-07-27 15:25:43 +0900 | [diff] [blame] | 837 | select SIBYTE_BCM1125H |
| 838 | select SWAP_IO_SPACE |
| 839 | select SYS_HAS_CPU_SB1 |
| 840 | select SYS_SUPPORTS_BIG_ENDIAN |
| 841 | select SYS_SUPPORTS_LITTLE_ENDIAN |
| 842 | |
| 843 | config SIBYTE_SWARM |
| 844 | bool "Sibyte BCM91250A-SWARM" |
| 845 | select BOOT_ELF32 |
Sebastian Andrzej Siewior | fcf3ca4 | 2010-04-18 15:26:36 +0200 | [diff] [blame] | 846 | select HAVE_PATA_PLATFORM |
Yoichi Yuasa | ade299d | 2007-07-27 15:25:43 +0900 | [diff] [blame] | 847 | select SIBYTE_SB1250 |
| 848 | select SWAP_IO_SPACE |
| 849 | select SYS_HAS_CPU_SB1 |
| 850 | select SYS_SUPPORTS_BIG_ENDIAN |
| 851 | select SYS_SUPPORTS_HIGHMEM |
Yoichi Yuasa | ade299d | 2007-07-27 15:25:43 +0900 | [diff] [blame] | 852 | select SYS_SUPPORTS_LITTLE_ENDIAN |
Ralf Baechle | cce335a | 2007-11-03 02:05:43 +0000 | [diff] [blame] | 853 | select ZONE_DMA32 if 64BIT |
Maciej W. Rozycki | e4849af | 2018-11-13 22:42:44 +0000 | [diff] [blame] | 854 | select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI |
Yoichi Yuasa | ade299d | 2007-07-27 15:25:43 +0900 | [diff] [blame] | 855 | |
| 856 | config SIBYTE_LITTLESUR |
| 857 | bool "Sibyte BCM91250C2-LittleSur" |
Yoichi Yuasa | ade299d | 2007-07-27 15:25:43 +0900 | [diff] [blame] | 858 | select BOOT_ELF32 |
Sebastian Andrzej Siewior | fcf3ca4 | 2010-04-18 15:26:36 +0200 | [diff] [blame] | 859 | select HAVE_PATA_PLATFORM |
Yoichi Yuasa | ade299d | 2007-07-27 15:25:43 +0900 | [diff] [blame] | 860 | select SIBYTE_SB1250 |
| 861 | select SWAP_IO_SPACE |
| 862 | select SYS_HAS_CPU_SB1 |
| 863 | select SYS_SUPPORTS_BIG_ENDIAN |
| 864 | select SYS_SUPPORTS_HIGHMEM |
| 865 | select SYS_SUPPORTS_LITTLE_ENDIAN |
Maciej W. Rozycki | 756d6d8 | 2018-11-13 22:42:37 +0000 | [diff] [blame] | 866 | select ZONE_DMA32 if 64BIT |
Yoichi Yuasa | ade299d | 2007-07-27 15:25:43 +0900 | [diff] [blame] | 867 | |
| 868 | config SIBYTE_SENTOSA |
| 869 | bool "Sibyte BCM91250E-Sentosa" |
Yoichi Yuasa | ade299d | 2007-07-27 15:25:43 +0900 | [diff] [blame] | 870 | select BOOT_ELF32 |
Yoichi Yuasa | ade299d | 2007-07-27 15:25:43 +0900 | [diff] [blame] | 871 | select SIBYTE_SB1250 |
| 872 | select SWAP_IO_SPACE |
| 873 | select SYS_HAS_CPU_SB1 |
| 874 | select SYS_SUPPORTS_BIG_ENDIAN |
| 875 | select SYS_SUPPORTS_LITTLE_ENDIAN |
Maciej W. Rozycki | e4849af | 2018-11-13 22:42:44 +0000 | [diff] [blame] | 876 | select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI |
Yoichi Yuasa | ade299d | 2007-07-27 15:25:43 +0900 | [diff] [blame] | 877 | |
Yoichi Yuasa | ade299d | 2007-07-27 15:25:43 +0900 | [diff] [blame] | 878 | config SIBYTE_BIGSUR |
| 879 | bool "Sibyte BCM91480B-BigSur" |
| 880 | select BOOT_ELF32 |
Yoichi Yuasa | ade299d | 2007-07-27 15:25:43 +0900 | [diff] [blame] | 881 | select NR_CPUS_DEFAULT_4 |
Yoichi Yuasa | ade299d | 2007-07-27 15:25:43 +0900 | [diff] [blame] | 882 | select SIBYTE_BCM1x80 |
| 883 | select SWAP_IO_SPACE |
| 884 | select SYS_HAS_CPU_SB1 |
| 885 | select SYS_SUPPORTS_BIG_ENDIAN |
Ralf Baechle | 651194f | 2007-11-01 21:55:39 +0000 | [diff] [blame] | 886 | select SYS_SUPPORTS_HIGHMEM |
Yoichi Yuasa | ade299d | 2007-07-27 15:25:43 +0900 | [diff] [blame] | 887 | select SYS_SUPPORTS_LITTLE_ENDIAN |
Ralf Baechle | cce335a | 2007-11-03 02:05:43 +0000 | [diff] [blame] | 888 | select ZONE_DMA32 if 64BIT |
Maciej W. Rozycki | e4849af | 2018-11-13 22:42:44 +0000 | [diff] [blame] | 889 | select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI |
Yoichi Yuasa | ade299d | 2007-07-27 15:25:43 +0900 | [diff] [blame] | 890 | |
Thomas Bogendoerfer | 14b36af | 2006-12-05 17:05:44 +0100 | [diff] [blame] | 891 | config SNI_RM |
| 892 | bool "SNI RM200/300/400" |
Thomas Bogendoerfer | 39b2d75 | 2019-10-09 15:27:14 +0200 | [diff] [blame] | 893 | select ARC_MEMORY |
| 894 | select ARC_PROMLIB |
Ralf Baechle | 0e2794b | 2012-11-15 20:48:50 +0100 | [diff] [blame] | 895 | select FW_ARC if CPU_LITTLE_ENDIAN |
| 896 | select FW_ARC32 if CPU_LITTLE_ENDIAN |
Paul Bolle | aaa9fad | 2013-03-25 09:39:54 +0000 | [diff] [blame] | 897 | select FW_SNIPROM if CPU_BIG_ENDIAN |
Ralf Baechle | 5e83d43 | 2005-10-29 19:32:41 +0100 | [diff] [blame] | 898 | select ARCH_MAY_HAVE_PC_FDC |
Ralf Baechle | a211a082 | 2018-02-05 15:37:43 +0100 | [diff] [blame] | 899 | select ARCH_MIGHT_HAVE_PC_PARPORT |
Ralf Baechle | 7a407aa | 2018-02-05 16:40:00 +0100 | [diff] [blame] | 900 | select ARCH_MIGHT_HAVE_PC_SERIO |
Ralf Baechle | 5e83d43 | 2005-10-29 19:32:41 +0100 | [diff] [blame] | 901 | select BOOT_ELF32 |
Ralf Baechle | 42f7754 | 2007-10-18 17:48:11 +0100 | [diff] [blame] | 902 | select CEVT_R4K |
Ralf Baechle | 940f6b4 | 2007-11-24 22:33:28 +0000 | [diff] [blame] | 903 | select CSRC_R4K |
Thomas Bogendoerfer | e2defae | 2007-12-02 13:00:32 +0100 | [diff] [blame] | 904 | select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN |
Ralf Baechle | 5e83d43 | 2005-10-29 19:32:41 +0100 | [diff] [blame] | 905 | select DMA_NONCOHERENT |
| 906 | select GENERIC_ISA_DMA |
Christoph Hellwig | 6630a8e | 2018-11-15 20:05:37 +0100 | [diff] [blame] | 907 | select HAVE_EISA |
Ralf Baechle | 8a118c3 | 2011-06-01 19:05:10 +0100 | [diff] [blame] | 908 | select HAVE_PCSPKR_PLATFORM |
Christoph Hellwig | eb01d42 | 2018-11-15 20:05:32 +0100 | [diff] [blame] | 909 | select HAVE_PCI |
Ralf Baechle | 67e38cf | 2015-05-26 18:20:06 +0200 | [diff] [blame] | 910 | select IRQ_MIPS_CPU |
Ralf Baechle | d865bea | 2007-10-11 23:46:10 +0100 | [diff] [blame] | 911 | select I8253 |
Ralf Baechle | 5e83d43 | 2005-10-29 19:32:41 +0100 | [diff] [blame] | 912 | select I8259 |
| 913 | select ISA |
Thomas Bogendoerfer | 564c836 | 2020-09-14 18:05:00 +0200 | [diff] [blame] | 914 | select MIPS_L1_CACHE_SHIFT_6 |
Thomas Bogendoerfer | 4a0312fc | 2006-06-13 13:59:01 +0200 | [diff] [blame] | 915 | select SWAP_IO_SPACE if CPU_BIG_ENDIAN |
Ralf Baechle | 7cf8053 | 2005-10-20 22:33:09 +0100 | [diff] [blame] | 916 | select SYS_HAS_CPU_R4X00 |
Thomas Bogendoerfer | 4a0312fc | 2006-06-13 13:59:01 +0200 | [diff] [blame] | 917 | select SYS_HAS_CPU_R5000 |
Thomas Bogendoerfer | c066a32 | 2006-12-28 18:22:32 +0100 | [diff] [blame] | 918 | select SYS_HAS_CPU_R10000 |
Thomas Bogendoerfer | 4a0312fc | 2006-06-13 13:59:01 +0200 | [diff] [blame] | 919 | select R5000_CPU_SCACHE |
Ralf Baechle | 36a8853 | 2007-03-01 11:56:43 +0000 | [diff] [blame] | 920 | select SYS_HAS_EARLY_PRINTK |
Yoichi Yuasa | ed5ba2f | 2005-09-03 15:56:21 -0700 | [diff] [blame] | 921 | select SYS_SUPPORTS_32BIT_KERNEL |
Kees Cook | 7d60717 | 2013-01-16 18:53:19 -0800 | [diff] [blame] | 922 | select SYS_SUPPORTS_64BIT_KERNEL |
Thomas Bogendoerfer | 4a0312fc | 2006-06-13 13:59:01 +0200 | [diff] [blame] | 923 | select SYS_SUPPORTS_BIG_ENDIAN |
Ralf Baechle | 5e83d43 | 2005-10-29 19:32:41 +0100 | [diff] [blame] | 924 | select SYS_SUPPORTS_HIGHMEM |
| 925 | select SYS_SUPPORTS_LITTLE_ENDIAN |
Thomas Bogendoerfer | 44def34 | 2020-08-24 18:32:45 +0200 | [diff] [blame] | 926 | select WAR_R4600_V2_HIT_CACHEOP |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 927 | help |
Thomas Bogendoerfer | 14b36af | 2006-12-05 17:05:44 +0100 | [diff] [blame] | 928 | The SNI RM200/300/400 are MIPS-based machines manufactured by |
| 929 | Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid |
Ralf Baechle | 5e83d43 | 2005-10-29 19:32:41 +0100 | [diff] [blame] | 930 | Technology and now in turn merged with Fujitsu. Say Y here to |
| 931 | support this machine type. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 932 | |
Atsushi Nemoto | edcaf1a | 2008-07-11 23:27:54 +0900 | [diff] [blame] | 933 | config MACH_TX49XX |
| 934 | bool "Toshiba TX49 series based machines" |
Thomas Bogendoerfer | 24a1c02 | 2020-08-24 18:32:47 +0200 | [diff] [blame] | 935 | select WAR_TX49XX_ICACHE_INDEX_INV |
Ralf Baechle | 23fbee9 | 2005-07-25 22:45:45 +0000 | [diff] [blame] | 936 | |
Ralf Baechle | 73b4390 | 2008-07-16 16:12:25 +0100 | [diff] [blame] | 937 | config MIKROTIK_RB532 |
| 938 | bool "Mikrotik RB532 boards" |
| 939 | select CEVT_R4K |
| 940 | select CSRC_R4K |
| 941 | select DMA_NONCOHERENT |
Christoph Hellwig | eb01d42 | 2018-11-15 20:05:32 +0100 | [diff] [blame] | 942 | select HAVE_PCI |
Ralf Baechle | 67e38cf | 2015-05-26 18:20:06 +0200 | [diff] [blame] | 943 | select IRQ_MIPS_CPU |
Ralf Baechle | 73b4390 | 2008-07-16 16:12:25 +0100 | [diff] [blame] | 944 | select SYS_HAS_CPU_MIPS32_R1 |
| 945 | select SYS_SUPPORTS_32BIT_KERNEL |
| 946 | select SYS_SUPPORTS_LITTLE_ENDIAN |
| 947 | select SWAP_IO_SPACE |
| 948 | select BOOT_RAW |
Linus Walleij | d30a2b4 | 2016-04-19 11:23:22 +0200 | [diff] [blame] | 949 | select GPIOLIB |
Florian Fainelli | 930beb5 | 2014-01-14 09:54:38 -0800 | [diff] [blame] | 950 | select MIPS_L1_CACHE_SHIFT_4 |
Ralf Baechle | 73b4390 | 2008-07-16 16:12:25 +0100 | [diff] [blame] | 951 | help |
| 952 | Support the Mikrotik(tm) RouterBoard 532 series, |
| 953 | based on the IDT RC32434 SoC. |
| 954 | |
David Daney | 9ddebc4 | 2013-05-22 15:10:46 +0000 | [diff] [blame] | 955 | config CAVIUM_OCTEON_SOC |
| 956 | bool "Cavium Networks Octeon SoC based boards" |
David Daney | a86c7f7 | 2008-12-11 15:33:38 -0800 | [diff] [blame] | 957 | select CEVT_R4K |
Christoph Hellwig | ea8c64a | 2018-01-10 16:21:13 +0100 | [diff] [blame] | 958 | select ARCH_HAS_PHYS_TO_DMA |
Christoph Hellwig | 1753d50 | 2018-11-15 20:05:36 +0100 | [diff] [blame] | 959 | select HAVE_RAPIDIO |
Christoph Hellwig | d4a451d | 2018-04-03 16:24:20 +0200 | [diff] [blame] | 960 | select PHYS_ADDR_T_64BIT |
David Daney | a86c7f7 | 2008-12-11 15:33:38 -0800 | [diff] [blame] | 961 | select SYS_SUPPORTS_64BIT_KERNEL |
| 962 | select SYS_SUPPORTS_BIG_ENDIAN |
Ralf Baechle | f65aad4 | 2012-10-17 00:39:09 +0200 | [diff] [blame] | 963 | select EDAC_SUPPORT |
Borislav Petkov | b01aec9 | 2015-05-21 19:59:31 +0200 | [diff] [blame] | 964 | select EDAC_ATOMIC_SCRUB |
David Daney | 73569d8 | 2015-03-20 19:11:58 +0300 | [diff] [blame] | 965 | select SYS_SUPPORTS_LITTLE_ENDIAN |
| 966 | select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN |
David Daney | a86c7f7 | 2008-12-11 15:33:38 -0800 | [diff] [blame] | 967 | select SYS_HAS_EARLY_PRINTK |
David Daney | 5e683389 | 2009-02-02 11:30:59 -0800 | [diff] [blame] | 968 | select SYS_HAS_CPU_CAVIUM_OCTEON |
Christoph Hellwig | eb01d42 | 2018-11-15 20:05:32 +0100 | [diff] [blame] | 969 | select HAVE_PCI |
Masahiro Yamada | 78bdbba | 2020-03-25 16:45:29 +0900 | [diff] [blame] | 970 | select HAVE_PLAT_DELAY |
| 971 | select HAVE_PLAT_FW_INIT_CMDLINE |
| 972 | select HAVE_PLAT_MEMCPY |
David Daney | f00e001 | 2010-10-01 13:27:30 -0700 | [diff] [blame] | 973 | select ZONE_DMA32 |
Linus Walleij | d30a2b4 | 2016-04-19 11:23:22 +0200 | [diff] [blame] | 974 | select GPIOLIB |
David Daney | 6e51116 | 2014-05-28 23:52:05 +0200 | [diff] [blame] | 975 | select USE_OF |
| 976 | select ARCH_SPARSEMEM_ENABLE |
| 977 | select SYS_SUPPORTS_SMP |
David Daney | 7820b84 | 2017-09-28 12:34:04 -0500 | [diff] [blame] | 978 | select NR_CPUS_DEFAULT_64 |
| 979 | select MIPS_NR_CPU_NR_MAP_1024 |
Andrew Bresticker | e326479 | 2014-08-21 13:04:22 -0700 | [diff] [blame] | 980 | select BUILTIN_DTB |
Julian Braha | f766b28 | 2021-03-26 01:34:56 -0400 | [diff] [blame] | 981 | select MTD |
David Daney | 8c1e6b1 | 2015-03-05 17:31:30 +0300 | [diff] [blame] | 982 | select MTD_COMPLEX_MAPPINGS |
Christoph Hellwig | 09230cb | 2018-04-24 09:00:54 +0200 | [diff] [blame] | 983 | select SWIOTLB |
Steven J. Hill | 3ff72be | 2016-12-13 14:25:37 -0600 | [diff] [blame] | 984 | select SYS_SUPPORTS_RELOCATABLE |
David Daney | a86c7f7 | 2008-12-11 15:33:38 -0800 | [diff] [blame] | 985 | help |
| 986 | This option supports all of the Octeon reference boards from Cavium |
| 987 | Networks. It builds a kernel that dynamically determines the Octeon |
| 988 | CPU type and supports all known board reference implementations. |
| 989 | Some of the supported boards are: |
| 990 | EBT3000 |
| 991 | EBH3000 |
| 992 | EBH3100 |
| 993 | Thunder |
| 994 | Kodama |
| 995 | Hikari |
| 996 | Say Y here for most Octeon reference boards. |
| 997 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 998 | endchoice |
| 999 | |
Ralf Baechle | e8c7c48 | 2008-09-16 19:12:16 +0200 | [diff] [blame] | 1000 | source "arch/mips/alchemy/Kconfig" |
Sergey Ryazanov | 3b12308f | 2014-10-29 03:18:39 +0400 | [diff] [blame] | 1001 | source "arch/mips/ath25/Kconfig" |
Gabor Juhos | d4a67d9 | 2011-01-04 21:28:14 +0100 | [diff] [blame] | 1002 | source "arch/mips/ath79/Kconfig" |
Hauke Mehrtens | a656ffc | 2011-07-23 01:20:13 +0200 | [diff] [blame] | 1003 | source "arch/mips/bcm47xx/Kconfig" |
Maxime Bizon | e7300d0 | 2009-08-18 13:23:37 +0100 | [diff] [blame] | 1004 | source "arch/mips/bcm63xx/Kconfig" |
Kevin Cernekee | 8945e37 | 2014-12-25 09:49:20 -0800 | [diff] [blame] | 1005 | source "arch/mips/bmips/Kconfig" |
Paul Burton | eed0eab | 2016-10-05 18:18:20 +0100 | [diff] [blame] | 1006 | source "arch/mips/generic/Kconfig" |
Paul Cercueil | a103e9b | 2020-09-06 21:29:33 +0200 | [diff] [blame] | 1007 | source "arch/mips/ingenic/Kconfig" |
Ralf Baechle | 5e83d43 | 2005-10-29 19:32:41 +0100 | [diff] [blame] | 1008 | source "arch/mips/jazz/Kconfig" |
John Crispin | 8ec6d93 | 2011-03-30 09:27:48 +0200 | [diff] [blame] | 1009 | source "arch/mips/lantiq/Kconfig" |
Joshua Henderson | 2572f00 | 2016-01-13 18:15:39 -0700 | [diff] [blame] | 1010 | source "arch/mips/pic32/Kconfig" |
John Crispin | ae2b5bb | 2013-01-20 22:05:30 +0100 | [diff] [blame] | 1011 | source "arch/mips/ralink/Kconfig" |
Ralf Baechle | 29c4869 | 2005-02-07 01:27:14 +0000 | [diff] [blame] | 1012 | source "arch/mips/sgi-ip27/Kconfig" |
Ralf Baechle | 38b18f72 | 2005-02-03 14:28:23 +0000 | [diff] [blame] | 1013 | source "arch/mips/sibyte/Kconfig" |
Atsushi Nemoto | 22b1d70 | 2008-07-11 00:31:36 +0900 | [diff] [blame] | 1014 | source "arch/mips/txx9/Kconfig" |
Ralf Baechle | 5e83d43 | 2005-10-29 19:32:41 +0100 | [diff] [blame] | 1015 | source "arch/mips/vr41xx/Kconfig" |
David Daney | a86c7f7 | 2008-12-11 15:33:38 -0800 | [diff] [blame] | 1016 | source "arch/mips/cavium-octeon/Kconfig" |
Jiaxun Yang | 71e2f4d | 2019-10-20 22:43:14 +0800 | [diff] [blame] | 1017 | source "arch/mips/loongson2ef/Kconfig" |
Huacai Chen | 30ad29b | 2015-04-21 10:00:35 +0800 | [diff] [blame] | 1018 | source "arch/mips/loongson32/Kconfig" |
| 1019 | source "arch/mips/loongson64/Kconfig" |
Ralf Baechle | 38b18f72 | 2005-02-03 14:28:23 +0000 | [diff] [blame] | 1020 | |
Ralf Baechle | 5e83d43 | 2005-10-29 19:32:41 +0100 | [diff] [blame] | 1021 | endmenu |
| 1022 | |
Akinobu Mita | 3c9ee7e | 2006-03-26 01:39:30 -0800 | [diff] [blame] | 1023 | config GENERIC_HWEIGHT |
| 1024 | bool |
| 1025 | default y |
| 1026 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1027 | config GENERIC_CALIBRATE_DELAY |
| 1028 | bool |
| 1029 | default y |
| 1030 | |
Ingo Molnar | ae1e913 | 2008-11-11 09:05:16 +0100 | [diff] [blame] | 1031 | config SCHED_OMIT_FRAME_POINTER |
Atsushi Nemoto | 1cc8903 | 2006-04-04 13:11:45 +0900 | [diff] [blame] | 1032 | bool |
| 1033 | default y |
| 1034 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1035 | # |
| 1036 | # Select some configuration options automatically based on user selections. |
| 1037 | # |
Ralf Baechle | 0e2794b | 2012-11-15 20:48:50 +0100 | [diff] [blame] | 1038 | config FW_ARC |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1039 | bool |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1040 | |
Ralf Baechle | 61ed242 | 2005-09-15 08:52:34 +0000 | [diff] [blame] | 1041 | config ARCH_MAY_HAVE_PC_FDC |
| 1042 | bool |
| 1043 | |
Marc St-Jean | 9267a30 | 2007-06-14 15:55:31 -0600 | [diff] [blame] | 1044 | config BOOT_RAW |
| 1045 | bool |
| 1046 | |
Ralf Baechle | 217dd11 | 2007-11-01 01:57:55 +0000 | [diff] [blame] | 1047 | config CEVT_BCM1480 |
| 1048 | bool |
| 1049 | |
Yoichi Yuasa | 6457d9f | 2008-04-25 12:11:44 +0900 | [diff] [blame] | 1050 | config CEVT_DS1287 |
| 1051 | bool |
| 1052 | |
Yoichi Yuasa | 1097c6a | 2007-10-22 19:43:15 +0900 | [diff] [blame] | 1053 | config CEVT_GT641XX |
| 1054 | bool |
| 1055 | |
Ralf Baechle | 42f7754 | 2007-10-18 17:48:11 +0100 | [diff] [blame] | 1056 | config CEVT_R4K |
| 1057 | bool |
| 1058 | |
Ralf Baechle | 217dd11 | 2007-11-01 01:57:55 +0000 | [diff] [blame] | 1059 | config CEVT_SB1250 |
| 1060 | bool |
| 1061 | |
Atsushi Nemoto | 229f773 | 2007-10-25 01:34:09 +0900 | [diff] [blame] | 1062 | config CEVT_TXX9 |
| 1063 | bool |
| 1064 | |
Ralf Baechle | 217dd11 | 2007-11-01 01:57:55 +0000 | [diff] [blame] | 1065 | config CSRC_BCM1480 |
| 1066 | bool |
| 1067 | |
Yoichi Yuasa | 4247417 | 2008-04-24 09:48:40 +0900 | [diff] [blame] | 1068 | config CSRC_IOASIC |
| 1069 | bool |
| 1070 | |
Ralf Baechle | 940f6b4 | 2007-11-24 22:33:28 +0000 | [diff] [blame] | 1071 | config CSRC_R4K |
Serge Semin | 3858642 | 2020-05-21 17:07:23 +0300 | [diff] [blame] | 1072 | select CLOCKSOURCE_WATCHDOG if CPU_FREQ |
Ralf Baechle | 940f6b4 | 2007-11-24 22:33:28 +0000 | [diff] [blame] | 1073 | bool |
| 1074 | |
Ralf Baechle | 217dd11 | 2007-11-01 01:57:55 +0000 | [diff] [blame] | 1075 | config CSRC_SB1250 |
| 1076 | bool |
| 1077 | |
Alex Smith | a7f4df4 | 2015-10-21 09:57:44 +0100 | [diff] [blame] | 1078 | config MIPS_CLOCK_VSYSCALL |
| 1079 | def_bool CSRC_R4K || CLKSRC_MIPS_GIC |
| 1080 | |
Atsushi Nemoto | a9aec7f | 2008-04-05 00:55:41 +0900 | [diff] [blame] | 1081 | config GPIO_TXX9 |
Linus Walleij | d30a2b4 | 2016-04-19 11:23:22 +0200 | [diff] [blame] | 1082 | select GPIOLIB |
Atsushi Nemoto | a9aec7f | 2008-04-05 00:55:41 +0900 | [diff] [blame] | 1083 | bool |
| 1084 | |
Ralf Baechle | 0e2794b | 2012-11-15 20:48:50 +0100 | [diff] [blame] | 1085 | config FW_CFE |
Aurelien Jarno | df78b5c | 2007-09-05 08:58:26 +0200 | [diff] [blame] | 1086 | bool |
| 1087 | |
Ralf Baechle | 40e084a | 2015-07-29 22:44:53 +0200 | [diff] [blame] | 1088 | config ARCH_SUPPORTS_UPROBES |
| 1089 | bool |
| 1090 | |
Paul Burton | 20d3306 | 2016-10-05 18:18:16 +0100 | [diff] [blame] | 1091 | config DMA_PERDEV_COHERENT |
| 1092 | bool |
Christoph Hellwig | 347cb6a | 2019-01-07 13:36:20 -0500 | [diff] [blame] | 1093 | select ARCH_HAS_SETUP_DMA_OPS |
Christoph Hellwig | 5748e1b | 2018-08-16 16:47:53 +0300 | [diff] [blame] | 1094 | select DMA_NONCOHERENT |
Paul Burton | 20d3306 | 2016-10-05 18:18:16 +0100 | [diff] [blame] | 1095 | |
Ralf Baechle | 4ce588c | 2005-09-03 15:56:19 -0700 | [diff] [blame] | 1096 | config DMA_NONCOHERENT |
| 1097 | bool |
Christoph Hellwig | db91427 | 2019-08-26 09:22:13 +0200 | [diff] [blame] | 1098 | # |
| 1099 | # MIPS allows mixing "slightly different" Cacheability and Coherency |
| 1100 | # Attribute bits. It is believed that the uncached access through |
| 1101 | # KSEG1 and the implementation specific "uncached accelerated" used |
| 1102 | # by pgprot_writcombine can be mixed, and the latter sometimes provides |
| 1103 | # significant advantages. |
| 1104 | # |
Christoph Hellwig | 419e2f1 | 2019-08-26 09:03:44 +0200 | [diff] [blame] | 1105 | select ARCH_HAS_DMA_WRITE_COMBINE |
Christoph Hellwig | fa7e224 | 2020-02-21 15:55:43 -0800 | [diff] [blame] | 1106 | select ARCH_HAS_DMA_PREP_COHERENT |
Christoph Hellwig | f8c55dc | 2018-06-15 13:08:46 +0200 | [diff] [blame] | 1107 | select ARCH_HAS_SYNC_DMA_FOR_DEVICE |
Christoph Hellwig | fa7e224 | 2020-02-21 15:55:43 -0800 | [diff] [blame] | 1108 | select ARCH_HAS_DMA_SET_UNCACHED |
Christoph Hellwig | 34dc0ea | 2019-10-29 11:01:37 +0100 | [diff] [blame] | 1109 | select DMA_NONCOHERENT_MMAP |
Christoph Hellwig | 34dc0ea | 2019-10-29 11:01:37 +0100 | [diff] [blame] | 1110 | select NEED_DMA_MAP_STATE |
Ralf Baechle | 4ce588c | 2005-09-03 15:56:19 -0700 | [diff] [blame] | 1111 | |
Ralf Baechle | 36a8853 | 2007-03-01 11:56:43 +0000 | [diff] [blame] | 1112 | config SYS_HAS_EARLY_PRINTK |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1113 | bool |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1114 | |
Ralf Baechle | 1b2bc75 | 2009-06-23 10:00:31 +0100 | [diff] [blame] | 1115 | config SYS_SUPPORTS_HOTPLUG_CPU |
Ralf Baechle | dbb7454 | 2007-08-07 14:52:17 +0100 | [diff] [blame] | 1116 | bool |
Ralf Baechle | dbb7454 | 2007-08-07 14:52:17 +0100 | [diff] [blame] | 1117 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1118 | config MIPS_BONITO64 |
| 1119 | bool |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1120 | |
| 1121 | config MIPS_MSC |
| 1122 | bool |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1123 | |
Ralf Baechle | 39b8d52 | 2008-04-28 17:14:26 +0100 | [diff] [blame] | 1124 | config SYNC_R4K |
| 1125 | bool |
| 1126 | |
Uwe Kleine-König | ce816fa | 2014-04-07 15:39:19 -0700 | [diff] [blame] | 1127 | config NO_IOPORT_MAP |
Maciej W. Rozycki | d388d68 | 2007-05-29 15:08:07 +0100 | [diff] [blame] | 1128 | def_bool n |
| 1129 | |
Markos Chandras | 4e0748f | 2014-11-13 11:25:27 +0000 | [diff] [blame] | 1130 | config GENERIC_CSUM |
Alexander Lobakin | 18d84e2e | 2020-01-22 13:58:50 +0300 | [diff] [blame] | 1131 | def_bool CPU_NO_LOAD_STORE_LR |
Markos Chandras | 4e0748f | 2014-11-13 11:25:27 +0000 | [diff] [blame] | 1132 | |
Ralf Baechle | 8313da3 | 2007-08-24 16:48:30 +0100 | [diff] [blame] | 1133 | config GENERIC_ISA_DMA |
| 1134 | bool |
| 1135 | select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n |
Namhyung Kim | a35bee8 | 2010-10-18 12:55:21 +0900 | [diff] [blame] | 1136 | select ISA_DMA_API |
Ralf Baechle | 8313da3 | 2007-08-24 16:48:30 +0100 | [diff] [blame] | 1137 | |
Ralf Baechle | aa414df | 2006-11-30 01:14:51 +0000 | [diff] [blame] | 1138 | config GENERIC_ISA_DMA_SUPPORT_BROKEN |
| 1139 | bool |
Ralf Baechle | 8313da3 | 2007-08-24 16:48:30 +0100 | [diff] [blame] | 1140 | select GENERIC_ISA_DMA |
Ralf Baechle | aa414df | 2006-11-30 01:14:51 +0000 | [diff] [blame] | 1141 | |
Masahiro Yamada | 78bdbba | 2020-03-25 16:45:29 +0900 | [diff] [blame] | 1142 | config HAVE_PLAT_DELAY |
| 1143 | bool |
| 1144 | |
| 1145 | config HAVE_PLAT_FW_INIT_CMDLINE |
| 1146 | bool |
| 1147 | |
| 1148 | config HAVE_PLAT_MEMCPY |
| 1149 | bool |
| 1150 | |
Namhyung Kim | a35bee8 | 2010-10-18 12:55:21 +0900 | [diff] [blame] | 1151 | config ISA_DMA_API |
| 1152 | bool |
| 1153 | |
Matt Redfearn | 8c530ea | 2016-03-31 10:05:39 +0100 | [diff] [blame] | 1154 | config SYS_SUPPORTS_RELOCATABLE |
| 1155 | bool |
| 1156 | help |
Enrico Weigelt, metux IT consult | 371a415 | 2019-03-11 16:54:27 +0100 | [diff] [blame] | 1157 | Selected if the platform supports relocating the kernel. |
| 1158 | The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF |
| 1159 | to allow access to command line and entropy sources. |
Matt Redfearn | 8c530ea | 2016-03-31 10:05:39 +0100 | [diff] [blame] | 1160 | |
Ralf Baechle | 5e83d43 | 2005-10-29 19:32:41 +0100 | [diff] [blame] | 1161 | # |
Masanari Iida | 6b2aac4 | 2012-04-14 00:14:11 +0900 | [diff] [blame] | 1162 | # Endianness selection. Sufficiently obscure so many users don't know what to |
Ralf Baechle | 5e83d43 | 2005-10-29 19:32:41 +0100 | [diff] [blame] | 1163 | # answer,so we try hard to limit the available choices. Also the use of a |
| 1164 | # choice statement should be more obvious to the user. |
| 1165 | # |
| 1166 | choice |
Masanari Iida | 6b2aac4 | 2012-04-14 00:14:11 +0900 | [diff] [blame] | 1167 | prompt "Endianness selection" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1168 | help |
| 1169 | Some MIPS machines can be configured for either little or big endian |
Ralf Baechle | 5e83d43 | 2005-10-29 19:32:41 +0100 | [diff] [blame] | 1170 | byte order. These modes require different kernels and a different |
Matt LaPlante | 3cb2fcc | 2006-11-30 05:22:59 +0100 | [diff] [blame] | 1171 | Linux distribution. In general there is one preferred byteorder for a |
Ralf Baechle | 5e83d43 | 2005-10-29 19:32:41 +0100 | [diff] [blame] | 1172 | particular system but some systems are just as commonly used in the |
David Sterba | 3dde6ad | 2007-05-09 07:12:20 +0200 | [diff] [blame] | 1173 | one or the other endianness. |
Ralf Baechle | 5e83d43 | 2005-10-29 19:32:41 +0100 | [diff] [blame] | 1174 | |
| 1175 | config CPU_BIG_ENDIAN |
| 1176 | bool "Big endian" |
| 1177 | depends on SYS_SUPPORTS_BIG_ENDIAN |
| 1178 | |
| 1179 | config CPU_LITTLE_ENDIAN |
| 1180 | bool "Little endian" |
| 1181 | depends on SYS_SUPPORTS_LITTLE_ENDIAN |
Ralf Baechle | 5e83d43 | 2005-10-29 19:32:41 +0100 | [diff] [blame] | 1182 | |
| 1183 | endchoice |
| 1184 | |
David Daney | 22b0763 | 2010-07-23 18:41:43 -0700 | [diff] [blame] | 1185 | config EXPORT_UASM |
| 1186 | bool |
| 1187 | |
Ralf Baechle | 2116245 | 2007-02-09 17:08:58 +0000 | [diff] [blame] | 1188 | config SYS_SUPPORTS_APM_EMULATION |
| 1189 | bool |
| 1190 | |
Ralf Baechle | 5e83d43 | 2005-10-29 19:32:41 +0100 | [diff] [blame] | 1191 | config SYS_SUPPORTS_BIG_ENDIAN |
| 1192 | bool |
| 1193 | |
| 1194 | config SYS_SUPPORTS_LITTLE_ENDIAN |
| 1195 | bool |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1196 | |
David Daney | aa1762f | 2012-10-17 00:48:10 +0200 | [diff] [blame] | 1197 | config MIPS_HUGE_TLB_SUPPORT |
| 1198 | def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE |
| 1199 | |
Marc St-Jean | 9267a30 | 2007-06-14 15:55:31 -0600 | [diff] [blame] | 1200 | config IRQ_MSP_SLP |
| 1201 | bool |
| 1202 | |
| 1203 | config IRQ_MSP_CIC |
| 1204 | bool |
| 1205 | |
Atsushi Nemoto | 8420fd0 | 2007-08-02 23:35:53 +0900 | [diff] [blame] | 1206 | config IRQ_TXX9 |
| 1207 | bool |
| 1208 | |
Yoichi Yuasa | d5ab1a6 | 2007-09-13 23:51:26 +0900 | [diff] [blame] | 1209 | config IRQ_GT641XX |
| 1210 | bool |
| 1211 | |
Yoichi Yuasa | 252161e | 2007-03-14 21:51:26 +0900 | [diff] [blame] | 1212 | config PCI_GT64XXX_PCI0 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1213 | bool |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1214 | |
Thomas Bogendoerfer | a57140e | 2019-05-07 23:09:13 +0200 | [diff] [blame] | 1215 | config PCI_XTALK_BRIDGE |
| 1216 | bool |
| 1217 | |
Marc St-Jean | 9267a30 | 2007-06-14 15:55:31 -0600 | [diff] [blame] | 1218 | config NO_EXCEPT_FILL |
| 1219 | bool |
| 1220 | |
Markos Chandras | a7e07b1 | 2014-11-13 13:32:03 +0000 | [diff] [blame] | 1221 | config MIPS_SPRAM |
| 1222 | bool |
| 1223 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1224 | config SWAP_IO_SPACE |
| 1225 | bool |
| 1226 | |
Thomas Bogendoerfer | e2defae | 2007-12-02 13:00:32 +0100 | [diff] [blame] | 1227 | config SGI_HAS_INDYDOG |
| 1228 | bool |
| 1229 | |
Thomas Bogendoerfer | 5b438c4 | 2008-07-10 20:29:55 +0200 | [diff] [blame] | 1230 | config SGI_HAS_HAL2 |
| 1231 | bool |
| 1232 | |
Thomas Bogendoerfer | e2defae | 2007-12-02 13:00:32 +0100 | [diff] [blame] | 1233 | config SGI_HAS_SEEQ |
| 1234 | bool |
| 1235 | |
| 1236 | config SGI_HAS_WD93 |
| 1237 | bool |
| 1238 | |
| 1239 | config SGI_HAS_ZILOG |
| 1240 | bool |
| 1241 | |
| 1242 | config SGI_HAS_I8042 |
| 1243 | bool |
| 1244 | |
| 1245 | config DEFAULT_SGI_PARTITION |
| 1246 | bool |
| 1247 | |
Ralf Baechle | 0e2794b | 2012-11-15 20:48:50 +0100 | [diff] [blame] | 1248 | config FW_ARC32 |
Ralf Baechle | 5e83d43 | 2005-10-29 19:32:41 +0100 | [diff] [blame] | 1249 | bool |
| 1250 | |
Paul Bolle | aaa9fad | 2013-03-25 09:39:54 +0000 | [diff] [blame] | 1251 | config FW_SNIPROM |
Thomas Bogendoerfer | 231a35d | 2008-01-04 23:31:07 +0100 | [diff] [blame] | 1252 | bool |
| 1253 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1254 | config BOOT_ELF32 |
| 1255 | bool |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1256 | |
Florian Fainelli | 930beb5 | 2014-01-14 09:54:38 -0800 | [diff] [blame] | 1257 | config MIPS_L1_CACHE_SHIFT_4 |
| 1258 | bool |
| 1259 | |
| 1260 | config MIPS_L1_CACHE_SHIFT_5 |
| 1261 | bool |
| 1262 | |
| 1263 | config MIPS_L1_CACHE_SHIFT_6 |
| 1264 | bool |
| 1265 | |
| 1266 | config MIPS_L1_CACHE_SHIFT_7 |
| 1267 | bool |
| 1268 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1269 | config MIPS_L1_CACHE_SHIFT |
| 1270 | int |
Florian Fainelli | a4c0201 | 2014-01-14 09:54:39 -0800 | [diff] [blame] | 1271 | default "7" if MIPS_L1_CACHE_SHIFT_7 |
Kevin Cernekee | 5432eeb | 2014-12-25 09:49:09 -0800 | [diff] [blame] | 1272 | default "6" if MIPS_L1_CACHE_SHIFT_6 |
| 1273 | default "5" if MIPS_L1_CACHE_SHIFT_5 |
| 1274 | default "4" if MIPS_L1_CACHE_SHIFT_4 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1275 | default "5" |
| 1276 | |
Thomas Bogendoerfer | e942242 | 2019-10-22 18:13:15 +0200 | [diff] [blame] | 1277 | config ARC_CMDLINE_ONLY |
| 1278 | bool |
| 1279 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1280 | config ARC_CONSOLE |
| 1281 | bool "ARC console support" |
Thomas Bogendoerfer | e2defae | 2007-12-02 13:00:32 +0100 | [diff] [blame] | 1282 | depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1283 | |
| 1284 | config ARC_MEMORY |
| 1285 | bool |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1286 | |
| 1287 | config ARC_PROMLIB |
| 1288 | bool |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1289 | |
Ralf Baechle | 0e2794b | 2012-11-15 20:48:50 +0100 | [diff] [blame] | 1290 | config FW_ARC64 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1291 | bool |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1292 | |
| 1293 | config BOOT_ELF64 |
| 1294 | bool |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1295 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1296 | menu "CPU selection" |
| 1297 | |
| 1298 | choice |
| 1299 | prompt "CPU type" |
| 1300 | default CPU_R4X00 |
| 1301 | |
Jiaxun Yang | 268a2d6 | 2019-10-20 22:43:13 +0800 | [diff] [blame] | 1302 | config CPU_LOONGSON64 |
Huacai Chen | caed1d1 | 2019-11-04 14:11:21 +0800 | [diff] [blame] | 1303 | bool "Loongson 64-bit CPU" |
Jiaxun Yang | 268a2d6 | 2019-10-20 22:43:13 +0800 | [diff] [blame] | 1304 | depends on SYS_HAS_CPU_LOONGSON64 |
Christoph Hellwig | d3bc81b | 2018-06-15 13:08:41 +0200 | [diff] [blame] | 1305 | select ARCH_HAS_PHYS_TO_DMA |
Jiaxun Yang | 5152221 | 2020-01-13 18:15:00 +0800 | [diff] [blame] | 1306 | select CPU_MIPSR2 |
| 1307 | select CPU_HAS_PREFETCH |
Huacai Chen | 0e476d9 | 2014-03-21 18:44:07 +0800 | [diff] [blame] | 1308 | select CPU_SUPPORTS_64BIT_KERNEL |
| 1309 | select CPU_SUPPORTS_HIGHMEM |
| 1310 | select CPU_SUPPORTS_HUGEPAGES |
Huacai Chen | 7507445 | 2019-09-21 21:50:27 +0800 | [diff] [blame] | 1311 | select CPU_SUPPORTS_MSA |
Jiaxun Yang | 5152221 | 2020-01-13 18:15:00 +0800 | [diff] [blame] | 1312 | select CPU_DIEI_BROKEN if !LOONGSON3_ENHANCEMENT |
| 1313 | select CPU_MIPSR2_IRQ_VI |
Huacai Chen | 0e476d9 | 2014-03-21 18:44:07 +0800 | [diff] [blame] | 1314 | select WEAK_ORDERING |
| 1315 | select WEAK_REORDERING_BEYOND_LLSC |
Huacai Chen | 7507445 | 2019-09-21 21:50:27 +0800 | [diff] [blame] | 1316 | select MIPS_ASID_BITS_VARIABLE |
Huacai Chen | b2edcfc | 2016-03-03 09:45:09 +0800 | [diff] [blame] | 1317 | select MIPS_PGD_C0_CONTEXT |
Huacai Chen | 17c99d9 | 2017-03-16 21:00:28 +0800 | [diff] [blame] | 1318 | select MIPS_L1_CACHE_SHIFT_6 |
Jackie Liu | 7f3b3c2 | 2021-09-13 14:19:08 +0800 | [diff] [blame] | 1319 | select MIPS_FP_SUPPORT |
Linus Walleij | d30a2b4 | 2016-04-19 11:23:22 +0200 | [diff] [blame] | 1320 | select GPIOLIB |
Christoph Hellwig | 09230cb | 2018-04-24 09:00:54 +0200 | [diff] [blame] | 1321 | select SWIOTLB |
Huacai Chen | 0f78355 | 2020-05-23 15:56:41 +0800 | [diff] [blame] | 1322 | select HAVE_KVM |
Huacai Chen | 0e476d9 | 2014-03-21 18:44:07 +0800 | [diff] [blame] | 1323 | help |
Huacai Chen | caed1d1 | 2019-11-04 14:11:21 +0800 | [diff] [blame] | 1324 | The Loongson GSx64(GS264/GS464/GS464E/GS464V) series of processor |
| 1325 | cores implements the MIPS64R2 instruction set with many extensions, |
| 1326 | including most 64-bit Loongson-2 (2H, 2K) and Loongson-3 (3A1000, |
| 1327 | 3B1000, 3B1500, 3A2000, 3A3000 and 3A4000) processors. However, old |
| 1328 | Loongson-2E/2F is not covered here and will be removed in future. |
Huacai Chen | 0e476d9 | 2014-03-21 18:44:07 +0800 | [diff] [blame] | 1329 | |
Huacai Chen | caed1d1 | 2019-11-04 14:11:21 +0800 | [diff] [blame] | 1330 | config LOONGSON3_ENHANCEMENT |
| 1331 | bool "New Loongson-3 CPU Enhancements" |
Huacai Chen | 1e820da3 | 2016-03-03 09:45:13 +0800 | [diff] [blame] | 1332 | default n |
Jiaxun Yang | 268a2d6 | 2019-10-20 22:43:13 +0800 | [diff] [blame] | 1333 | depends on CPU_LOONGSON64 |
Huacai Chen | 1e820da3 | 2016-03-03 09:45:13 +0800 | [diff] [blame] | 1334 | help |
Huacai Chen | caed1d1 | 2019-11-04 14:11:21 +0800 | [diff] [blame] | 1335 | New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A |
Huacai Chen | 1e820da3 | 2016-03-03 09:45:13 +0800 | [diff] [blame] | 1336 | R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as |
Jiaxun Yang | 268a2d6 | 2019-10-20 22:43:13 +0800 | [diff] [blame] | 1337 | FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User |
Huacai Chen | 1e820da3 | 2016-03-03 09:45:13 +0800 | [diff] [blame] | 1338 | Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer), |
| 1339 | Fast TLB refill support, etc. |
| 1340 | |
| 1341 | This option enable those enhancements which are not probed at run |
| 1342 | time. If you want a generic kernel to run on all Loongson 3 machines, |
| 1343 | please say 'N' here. If you want a high-performance kernel to run on |
Huacai Chen | caed1d1 | 2019-11-04 14:11:21 +0800 | [diff] [blame] | 1344 | new Loongson-3 machines only, please say 'Y' here. |
Huacai Chen | 1e820da3 | 2016-03-03 09:45:13 +0800 | [diff] [blame] | 1345 | |
Huacai Chen | e02e07e | 2019-01-15 16:04:54 +0800 | [diff] [blame] | 1346 | config CPU_LOONGSON3_WORKAROUNDS |
Xi Ruoyao | 3f059a7 | 2021-08-29 20:49:09 +0800 | [diff] [blame] | 1347 | bool "Loongson-3 LLSC Workarounds" |
Huacai Chen | e02e07e | 2019-01-15 16:04:54 +0800 | [diff] [blame] | 1348 | default y if SMP |
Jiaxun Yang | 268a2d6 | 2019-10-20 22:43:13 +0800 | [diff] [blame] | 1349 | depends on CPU_LOONGSON64 |
Huacai Chen | e02e07e | 2019-01-15 16:04:54 +0800 | [diff] [blame] | 1350 | help |
Huacai Chen | caed1d1 | 2019-11-04 14:11:21 +0800 | [diff] [blame] | 1351 | Loongson-3 processors have the llsc issues which require workarounds. |
Huacai Chen | e02e07e | 2019-01-15 16:04:54 +0800 | [diff] [blame] | 1352 | Without workarounds the system may hang unexpectedly. |
| 1353 | |
Xi Ruoyao | 3f059a7 | 2021-08-29 20:49:09 +0800 | [diff] [blame] | 1354 | Say Y, unless you know what you are doing. |
Huacai Chen | e02e07e | 2019-01-15 16:04:54 +0800 | [diff] [blame] | 1355 | |
WANG Xuerui | ec7a931 | 2020-05-23 21:37:01 +0800 | [diff] [blame] | 1356 | config CPU_LOONGSON3_CPUCFG_EMULATION |
| 1357 | bool "Emulate the CPUCFG instruction on older Loongson cores" |
| 1358 | default y |
| 1359 | depends on CPU_LOONGSON64 |
| 1360 | help |
| 1361 | Loongson-3A R4 and newer have the CPUCFG instruction available for |
| 1362 | userland to query CPU capabilities, much like CPUID on x86. This |
| 1363 | option provides emulation of the instruction on older Loongson |
| 1364 | cores, back to Loongson-3A1000. |
| 1365 | |
| 1366 | If unsure, please say Y. |
| 1367 | |
Wu Zhangjin | 3702bba | 2009-07-02 23:27:41 +0800 | [diff] [blame] | 1368 | config CPU_LOONGSON2E |
| 1369 | bool "Loongson 2E" |
| 1370 | depends on SYS_HAS_CPU_LOONGSON2E |
Jiaxun Yang | 268a2d6 | 2019-10-20 22:43:13 +0800 | [diff] [blame] | 1371 | select CPU_LOONGSON2EF |
Fuxin Zhang | 2a21c73 | 2007-06-06 14:52:43 +0800 | [diff] [blame] | 1372 | help |
| 1373 | The Loongson 2E processor implements the MIPS III instruction set |
| 1374 | with many extensions. |
| 1375 | |
Lucas De Marchi | 25985ed | 2011-03-30 22:57:33 -0300 | [diff] [blame] | 1376 | It has an internal FPGA northbridge, which is compatible to |
Wu Zhangjin | 6f7a251 | 2009-11-06 18:45:05 +0800 | [diff] [blame] | 1377 | bonito64. |
| 1378 | |
| 1379 | config CPU_LOONGSON2F |
| 1380 | bool "Loongson 2F" |
| 1381 | depends on SYS_HAS_CPU_LOONGSON2F |
Jiaxun Yang | 268a2d6 | 2019-10-20 22:43:13 +0800 | [diff] [blame] | 1382 | select CPU_LOONGSON2EF |
Linus Walleij | d30a2b4 | 2016-04-19 11:23:22 +0200 | [diff] [blame] | 1383 | select GPIOLIB |
Wu Zhangjin | 6f7a251 | 2009-11-06 18:45:05 +0800 | [diff] [blame] | 1384 | help |
| 1385 | The Loongson 2F processor implements the MIPS III instruction set |
| 1386 | with many extensions. |
| 1387 | |
| 1388 | Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller |
| 1389 | have a similar programming interface with FPGA northbridge used in |
| 1390 | Loongson2E. |
| 1391 | |
Kelvin Cheung | ca585cf | 2012-07-25 16:17:24 +0200 | [diff] [blame] | 1392 | config CPU_LOONGSON1B |
| 1393 | bool "Loongson 1B" |
| 1394 | depends on SYS_HAS_CPU_LOONGSON1B |
Huacai Chen | b2afb64 | 2019-11-04 14:11:20 +0800 | [diff] [blame] | 1395 | select CPU_LOONGSON32 |
Kelvin Cheung | 9ec88b6 | 2016-04-06 20:34:54 +0800 | [diff] [blame] | 1396 | select LEDS_GPIO_REGISTER |
Kelvin Cheung | ca585cf | 2012-07-25 16:17:24 +0200 | [diff] [blame] | 1397 | help |
| 1398 | The Loongson 1B is a 32-bit SoC, which implements the MIPS32 |
谢致邦 (XIE Zhibang) | 968dc5a0 | 2017-06-01 18:41:34 +0800 | [diff] [blame] | 1399 | Release 1 instruction set and part of the MIPS32 Release 2 |
| 1400 | instruction set. |
Kelvin Cheung | ca585cf | 2012-07-25 16:17:24 +0200 | [diff] [blame] | 1401 | |
Yang Ling | 12e3280 | 2016-05-19 12:29:30 +0800 | [diff] [blame] | 1402 | config CPU_LOONGSON1C |
| 1403 | bool "Loongson 1C" |
| 1404 | depends on SYS_HAS_CPU_LOONGSON1C |
Huacai Chen | b2afb64 | 2019-11-04 14:11:20 +0800 | [diff] [blame] | 1405 | select CPU_LOONGSON32 |
Yang Ling | 12e3280 | 2016-05-19 12:29:30 +0800 | [diff] [blame] | 1406 | select LEDS_GPIO_REGISTER |
| 1407 | help |
| 1408 | The Loongson 1C is a 32-bit SoC, which implements the MIPS32 |
谢致邦 (XIE Zhibang) | 968dc5a0 | 2017-06-01 18:41:34 +0800 | [diff] [blame] | 1409 | Release 1 instruction set and part of the MIPS32 Release 2 |
| 1410 | instruction set. |
Yang Ling | 12e3280 | 2016-05-19 12:29:30 +0800 | [diff] [blame] | 1411 | |
Ralf Baechle | 6e760c8 | 2005-07-06 12:08:11 +0000 | [diff] [blame] | 1412 | config CPU_MIPS32_R1 |
| 1413 | bool "MIPS32 Release 1" |
Ralf Baechle | 7cf8053 | 2005-10-20 22:33:09 +0100 | [diff] [blame] | 1414 | depends on SYS_HAS_CPU_MIPS32_R1 |
Ralf Baechle | 6e760c8 | 2005-07-06 12:08:11 +0000 | [diff] [blame] | 1415 | select CPU_HAS_PREFETCH |
Ralf Baechle | 797798c | 2005-08-10 15:17:11 +0000 | [diff] [blame] | 1416 | select CPU_SUPPORTS_32BIT_KERNEL |
Ralf Baechle | ec28f30 | 2006-03-05 00:45:33 +0000 | [diff] [blame] | 1417 | select CPU_SUPPORTS_HIGHMEM |
Ralf Baechle | 6e760c8 | 2005-07-06 12:08:11 +0000 | [diff] [blame] | 1418 | help |
Ralf Baechle | 5e83d43 | 2005-10-29 19:32:41 +0100 | [diff] [blame] | 1419 | Choose this option to build a kernel for release 1 or later of the |
Ralf Baechle | 1e5f1ca | 2005-07-12 14:51:22 +0000 | [diff] [blame] | 1420 | MIPS32 architecture. Most modern embedded systems with a 32-bit |
| 1421 | MIPS processor are based on a MIPS32 processor. If you know the |
| 1422 | specific type of processor in your system, choose those that one |
| 1423 | otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. |
| 1424 | Release 2 of the MIPS32 architecture is available since several |
| 1425 | years so chances are you even have a MIPS32 Release 2 processor |
| 1426 | in which case you should choose CPU_MIPS32_R2 instead for better |
| 1427 | performance. |
| 1428 | |
| 1429 | config CPU_MIPS32_R2 |
| 1430 | bool "MIPS32 Release 2" |
Ralf Baechle | 7cf8053 | 2005-10-20 22:33:09 +0100 | [diff] [blame] | 1431 | depends on SYS_HAS_CPU_MIPS32_R2 |
Ralf Baechle | 1e5f1ca | 2005-07-12 14:51:22 +0000 | [diff] [blame] | 1432 | select CPU_HAS_PREFETCH |
Ralf Baechle | 797798c | 2005-08-10 15:17:11 +0000 | [diff] [blame] | 1433 | select CPU_SUPPORTS_32BIT_KERNEL |
Ralf Baechle | ec28f30 | 2006-03-05 00:45:33 +0000 | [diff] [blame] | 1434 | select CPU_SUPPORTS_HIGHMEM |
Paul Burton | a5e9a69 | 2014-01-27 15:23:10 +0000 | [diff] [blame] | 1435 | select CPU_SUPPORTS_MSA |
Sanjay Lal | 2235a54 | 2012-11-21 18:33:59 -0800 | [diff] [blame] | 1436 | select HAVE_KVM |
Ralf Baechle | 1e5f1ca | 2005-07-12 14:51:22 +0000 | [diff] [blame] | 1437 | help |
Ralf Baechle | 5e83d43 | 2005-10-29 19:32:41 +0100 | [diff] [blame] | 1438 | Choose this option to build a kernel for release 2 or later of the |
Ralf Baechle | 6e760c8 | 2005-07-06 12:08:11 +0000 | [diff] [blame] | 1439 | MIPS32 architecture. Most modern embedded systems with a 32-bit |
| 1440 | MIPS processor are based on a MIPS32 processor. If you know the |
| 1441 | specific type of processor in your system, choose those that one |
| 1442 | otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1443 | |
Serge Semin | ab7c01f | 2020-05-21 17:07:14 +0300 | [diff] [blame] | 1444 | config CPU_MIPS32_R5 |
| 1445 | bool "MIPS32 Release 5" |
| 1446 | depends on SYS_HAS_CPU_MIPS32_R5 |
| 1447 | select CPU_HAS_PREFETCH |
| 1448 | select CPU_SUPPORTS_32BIT_KERNEL |
| 1449 | select CPU_SUPPORTS_HIGHMEM |
| 1450 | select CPU_SUPPORTS_MSA |
| 1451 | select HAVE_KVM |
| 1452 | select MIPS_O32_FP64_SUPPORT |
| 1453 | help |
| 1454 | Choose this option to build a kernel for release 5 or later of the |
| 1455 | MIPS32 architecture. New MIPS processors, starting with the Warrior |
| 1456 | family, are based on a MIPS32r5 processor. If you own an older |
| 1457 | processor, you probably need to select MIPS32r1 or MIPS32r2 instead. |
| 1458 | |
Leonid Yegoshin | 7fd08ca | 2014-10-27 10:34:11 +0000 | [diff] [blame] | 1459 | config CPU_MIPS32_R6 |
Markos Chandras | 674d10e | 2015-07-16 13:24:46 +0100 | [diff] [blame] | 1460 | bool "MIPS32 Release 6" |
Leonid Yegoshin | 7fd08ca | 2014-10-27 10:34:11 +0000 | [diff] [blame] | 1461 | depends on SYS_HAS_CPU_MIPS32_R6 |
| 1462 | select CPU_HAS_PREFETCH |
Alexander Lobakin | 18d84e2e | 2020-01-22 13:58:50 +0300 | [diff] [blame] | 1463 | select CPU_NO_LOAD_STORE_LR |
Leonid Yegoshin | 7fd08ca | 2014-10-27 10:34:11 +0000 | [diff] [blame] | 1464 | select CPU_SUPPORTS_32BIT_KERNEL |
| 1465 | select CPU_SUPPORTS_HIGHMEM |
| 1466 | select CPU_SUPPORTS_MSA |
| 1467 | select HAVE_KVM |
| 1468 | select MIPS_O32_FP64_SUPPORT |
| 1469 | help |
| 1470 | Choose this option to build a kernel for release 6 or later of the |
| 1471 | MIPS32 architecture. New MIPS processors, starting with the Warrior |
| 1472 | family, are based on a MIPS32r6 processor. If you own an older |
| 1473 | processor, you probably need to select MIPS32r1 or MIPS32r2 instead. |
| 1474 | |
Ralf Baechle | 6e760c8 | 2005-07-06 12:08:11 +0000 | [diff] [blame] | 1475 | config CPU_MIPS64_R1 |
| 1476 | bool "MIPS64 Release 1" |
Ralf Baechle | 7cf8053 | 2005-10-20 22:33:09 +0100 | [diff] [blame] | 1477 | depends on SYS_HAS_CPU_MIPS64_R1 |
Ralf Baechle | 797798c | 2005-08-10 15:17:11 +0000 | [diff] [blame] | 1478 | select CPU_HAS_PREFETCH |
Yoichi Yuasa | ed5ba2f | 2005-09-03 15:56:21 -0700 | [diff] [blame] | 1479 | select CPU_SUPPORTS_32BIT_KERNEL |
| 1480 | select CPU_SUPPORTS_64BIT_KERNEL |
Ralf Baechle | ec28f30 | 2006-03-05 00:45:33 +0000 | [diff] [blame] | 1481 | select CPU_SUPPORTS_HIGHMEM |
David Daney | 9cffd154 | 2009-05-27 17:47:46 -0700 | [diff] [blame] | 1482 | select CPU_SUPPORTS_HUGEPAGES |
Ralf Baechle | 6e760c8 | 2005-07-06 12:08:11 +0000 | [diff] [blame] | 1483 | help |
| 1484 | Choose this option to build a kernel for release 1 or later of the |
| 1485 | MIPS64 architecture. Many modern embedded systems with a 64-bit |
| 1486 | MIPS processor are based on a MIPS64 processor. If you know the |
| 1487 | specific type of processor in your system, choose those that one |
| 1488 | otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. |
Ralf Baechle | 1e5f1ca | 2005-07-12 14:51:22 +0000 | [diff] [blame] | 1489 | Release 2 of the MIPS64 architecture is available since several |
| 1490 | years so chances are you even have a MIPS64 Release 2 processor |
| 1491 | in which case you should choose CPU_MIPS64_R2 instead for better |
| 1492 | performance. |
| 1493 | |
| 1494 | config CPU_MIPS64_R2 |
| 1495 | bool "MIPS64 Release 2" |
Ralf Baechle | 7cf8053 | 2005-10-20 22:33:09 +0100 | [diff] [blame] | 1496 | depends on SYS_HAS_CPU_MIPS64_R2 |
Ralf Baechle | 797798c | 2005-08-10 15:17:11 +0000 | [diff] [blame] | 1497 | select CPU_HAS_PREFETCH |
Ralf Baechle | 1e5f1ca | 2005-07-12 14:51:22 +0000 | [diff] [blame] | 1498 | select CPU_SUPPORTS_32BIT_KERNEL |
| 1499 | select CPU_SUPPORTS_64BIT_KERNEL |
Ralf Baechle | ec28f30 | 2006-03-05 00:45:33 +0000 | [diff] [blame] | 1500 | select CPU_SUPPORTS_HIGHMEM |
David Daney | 9cffd154 | 2009-05-27 17:47:46 -0700 | [diff] [blame] | 1501 | select CPU_SUPPORTS_HUGEPAGES |
Paul Burton | a5e9a69 | 2014-01-27 15:23:10 +0000 | [diff] [blame] | 1502 | select CPU_SUPPORTS_MSA |
James Hogan | 40a2df4 | 2016-07-08 11:53:31 +0100 | [diff] [blame] | 1503 | select HAVE_KVM |
Ralf Baechle | 1e5f1ca | 2005-07-12 14:51:22 +0000 | [diff] [blame] | 1504 | help |
| 1505 | Choose this option to build a kernel for release 2 or later of the |
| 1506 | MIPS64 architecture. Many modern embedded systems with a 64-bit |
| 1507 | MIPS processor are based on a MIPS64 processor. If you know the |
| 1508 | specific type of processor in your system, choose those that one |
| 1509 | otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1510 | |
Serge Semin | ab7c01f | 2020-05-21 17:07:14 +0300 | [diff] [blame] | 1511 | config CPU_MIPS64_R5 |
| 1512 | bool "MIPS64 Release 5" |
| 1513 | depends on SYS_HAS_CPU_MIPS64_R5 |
| 1514 | select CPU_HAS_PREFETCH |
| 1515 | select CPU_SUPPORTS_32BIT_KERNEL |
| 1516 | select CPU_SUPPORTS_64BIT_KERNEL |
| 1517 | select CPU_SUPPORTS_HIGHMEM |
| 1518 | select CPU_SUPPORTS_HUGEPAGES |
| 1519 | select CPU_SUPPORTS_MSA |
| 1520 | select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32 |
| 1521 | select HAVE_KVM |
| 1522 | help |
| 1523 | Choose this option to build a kernel for release 5 or later of the |
| 1524 | MIPS64 architecture. This is a intermediate MIPS architecture |
| 1525 | release partly implementing release 6 features. Though there is no |
| 1526 | any hardware known to be based on this release. |
| 1527 | |
Leonid Yegoshin | 7fd08ca | 2014-10-27 10:34:11 +0000 | [diff] [blame] | 1528 | config CPU_MIPS64_R6 |
Markos Chandras | 674d10e | 2015-07-16 13:24:46 +0100 | [diff] [blame] | 1529 | bool "MIPS64 Release 6" |
Leonid Yegoshin | 7fd08ca | 2014-10-27 10:34:11 +0000 | [diff] [blame] | 1530 | depends on SYS_HAS_CPU_MIPS64_R6 |
| 1531 | select CPU_HAS_PREFETCH |
Alexander Lobakin | 18d84e2e | 2020-01-22 13:58:50 +0300 | [diff] [blame] | 1532 | select CPU_NO_LOAD_STORE_LR |
Leonid Yegoshin | 7fd08ca | 2014-10-27 10:34:11 +0000 | [diff] [blame] | 1533 | select CPU_SUPPORTS_32BIT_KERNEL |
| 1534 | select CPU_SUPPORTS_64BIT_KERNEL |
| 1535 | select CPU_SUPPORTS_HIGHMEM |
Paul Burton | afd375d | 2019-02-02 02:21:53 +0000 | [diff] [blame] | 1536 | select CPU_SUPPORTS_HUGEPAGES |
Leonid Yegoshin | 7fd08ca | 2014-10-27 10:34:11 +0000 | [diff] [blame] | 1537 | select CPU_SUPPORTS_MSA |
James Hogan | 2e6c774 | 2017-02-16 12:39:01 +0000 | [diff] [blame] | 1538 | select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32 |
James Hogan | 40a2df4 | 2016-07-08 11:53:31 +0100 | [diff] [blame] | 1539 | select HAVE_KVM |
Leonid Yegoshin | 7fd08ca | 2014-10-27 10:34:11 +0000 | [diff] [blame] | 1540 | help |
| 1541 | Choose this option to build a kernel for release 6 or later of the |
| 1542 | MIPS64 architecture. New MIPS processors, starting with the Warrior |
| 1543 | family, are based on a MIPS64r6 processor. If you own an older |
| 1544 | processor, you probably need to select MIPS64r1 or MIPS64r2 instead. |
| 1545 | |
Serge Semin | 281e3ae | 2020-05-21 17:07:15 +0300 | [diff] [blame] | 1546 | config CPU_P5600 |
| 1547 | bool "MIPS Warrior P5600" |
| 1548 | depends on SYS_HAS_CPU_P5600 |
| 1549 | select CPU_HAS_PREFETCH |
| 1550 | select CPU_SUPPORTS_32BIT_KERNEL |
| 1551 | select CPU_SUPPORTS_HIGHMEM |
| 1552 | select CPU_SUPPORTS_MSA |
Serge Semin | 281e3ae | 2020-05-21 17:07:15 +0300 | [diff] [blame] | 1553 | select CPU_SUPPORTS_CPUFREQ |
| 1554 | select CPU_MIPSR2_IRQ_VI |
| 1555 | select CPU_MIPSR2_IRQ_EI |
| 1556 | select HAVE_KVM |
| 1557 | select MIPS_O32_FP64_SUPPORT |
| 1558 | help |
| 1559 | Choose this option to build a kernel for MIPS Warrior P5600 CPU. |
| 1560 | It's based on MIPS32r5 ISA with XPA, EVA, dual/quad issue exec pipes, |
| 1561 | MMU with two-levels TLB, UCA, MSA, MDU core level features and system |
| 1562 | level features like up to six P5600 calculation cores, CM2 with L2 |
| 1563 | cache, IOCU/IOMMU (though might be unused depending on the system- |
| 1564 | specific IP core configuration), GIC, CPC, virtualisation module, |
| 1565 | eJTAG and PDtrace. |
| 1566 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1567 | config CPU_R3000 |
| 1568 | bool "R3000" |
Ralf Baechle | 7cf8053 | 2005-10-20 22:33:09 +0100 | [diff] [blame] | 1569 | depends on SYS_HAS_CPU_R3000 |
Ralf Baechle | f7062dd | 2006-04-24 14:58:53 +0100 | [diff] [blame] | 1570 | select CPU_HAS_WB |
Paul Burton | 5474682 | 2019-08-31 15:40:43 +0000 | [diff] [blame] | 1571 | select CPU_R3K_TLB |
Yoichi Yuasa | ed5ba2f | 2005-09-03 15:56:21 -0700 | [diff] [blame] | 1572 | select CPU_SUPPORTS_32BIT_KERNEL |
Ralf Baechle | 797798c | 2005-08-10 15:17:11 +0000 | [diff] [blame] | 1573 | select CPU_SUPPORTS_HIGHMEM |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1574 | help |
| 1575 | Please make sure to pick the right CPU type. Linux/MIPS is not |
| 1576 | designed to be generic, i.e. Kernels compiled for R3000 CPUs will |
| 1577 | *not* work on R4000 machines and vice versa. However, since most |
| 1578 | of the supported machines have an R4000 (or similar) CPU, R4x00 |
| 1579 | might be a safe bet. If the resulting kernel does not work, |
| 1580 | try to recompile with R3000. |
| 1581 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1582 | config CPU_VR41XX |
| 1583 | bool "R41xx" |
Ralf Baechle | 7cf8053 | 2005-10-20 22:33:09 +0100 | [diff] [blame] | 1584 | depends on SYS_HAS_CPU_VR41XX |
Yoichi Yuasa | ed5ba2f | 2005-09-03 15:56:21 -0700 | [diff] [blame] | 1585 | select CPU_SUPPORTS_32BIT_KERNEL |
| 1586 | select CPU_SUPPORTS_64BIT_KERNEL |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1587 | help |
Ralf Baechle | 5e83d43 | 2005-10-29 19:32:41 +0100 | [diff] [blame] | 1588 | The options selects support for the NEC VR4100 series of processors. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1589 | Only choose this option if you have one of these processors as a |
| 1590 | kernel built with this option will not run on any other type of |
| 1591 | processor or vice versa. |
| 1592 | |
Lauri Kasanen | 65ce619 | 2021-01-13 17:10:07 +0200 | [diff] [blame] | 1593 | config CPU_R4300 |
| 1594 | bool "R4300" |
| 1595 | depends on SYS_HAS_CPU_R4300 |
| 1596 | select CPU_SUPPORTS_32BIT_KERNEL |
| 1597 | select CPU_SUPPORTS_64BIT_KERNEL |
Lauri Kasanen | 65ce619 | 2021-01-13 17:10:07 +0200 | [diff] [blame] | 1598 | help |
| 1599 | MIPS Technologies R4300-series processors. |
| 1600 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1601 | config CPU_R4X00 |
| 1602 | bool "R4x00" |
Ralf Baechle | 7cf8053 | 2005-10-20 22:33:09 +0100 | [diff] [blame] | 1603 | depends on SYS_HAS_CPU_R4X00 |
Yoichi Yuasa | ed5ba2f | 2005-09-03 15:56:21 -0700 | [diff] [blame] | 1604 | select CPU_SUPPORTS_32BIT_KERNEL |
| 1605 | select CPU_SUPPORTS_64BIT_KERNEL |
Ralf Baechle | 970d032 | 2012-10-18 13:54:15 +0200 | [diff] [blame] | 1606 | select CPU_SUPPORTS_HUGEPAGES |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1607 | help |
| 1608 | MIPS Technologies R4000-series processors other than 4300, including |
| 1609 | the R4000, R4400, R4600, and 4700. |
| 1610 | |
| 1611 | config CPU_TX49XX |
| 1612 | bool "R49XX" |
Ralf Baechle | 7cf8053 | 2005-10-20 22:33:09 +0100 | [diff] [blame] | 1613 | depends on SYS_HAS_CPU_TX49XX |
Atsushi Nemoto | de862b4 | 2006-03-17 12:59:22 +0900 | [diff] [blame] | 1614 | select CPU_HAS_PREFETCH |
Yoichi Yuasa | ed5ba2f | 2005-09-03 15:56:21 -0700 | [diff] [blame] | 1615 | select CPU_SUPPORTS_32BIT_KERNEL |
| 1616 | select CPU_SUPPORTS_64BIT_KERNEL |
Ralf Baechle | 970d032 | 2012-10-18 13:54:15 +0200 | [diff] [blame] | 1617 | select CPU_SUPPORTS_HUGEPAGES |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1618 | |
| 1619 | config CPU_R5000 |
| 1620 | bool "R5000" |
Ralf Baechle | 7cf8053 | 2005-10-20 22:33:09 +0100 | [diff] [blame] | 1621 | depends on SYS_HAS_CPU_R5000 |
Yoichi Yuasa | ed5ba2f | 2005-09-03 15:56:21 -0700 | [diff] [blame] | 1622 | select CPU_SUPPORTS_32BIT_KERNEL |
| 1623 | select CPU_SUPPORTS_64BIT_KERNEL |
Ralf Baechle | 970d032 | 2012-10-18 13:54:15 +0200 | [diff] [blame] | 1624 | select CPU_SUPPORTS_HUGEPAGES |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1625 | help |
| 1626 | MIPS Technologies R5000-series processors other than the Nevada. |
| 1627 | |
Shinya Kuribayashi | 542c102 | 2008-10-24 01:27:57 +0900 | [diff] [blame] | 1628 | config CPU_R5500 |
| 1629 | bool "R5500" |
| 1630 | depends on SYS_HAS_CPU_R5500 |
Shinya Kuribayashi | 542c102 | 2008-10-24 01:27:57 +0900 | [diff] [blame] | 1631 | select CPU_SUPPORTS_32BIT_KERNEL |
| 1632 | select CPU_SUPPORTS_64BIT_KERNEL |
David Daney | 9cffd154 | 2009-05-27 17:47:46 -0700 | [diff] [blame] | 1633 | select CPU_SUPPORTS_HUGEPAGES |
Shinya Kuribayashi | 542c102 | 2008-10-24 01:27:57 +0900 | [diff] [blame] | 1634 | help |
| 1635 | NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV |
| 1636 | instruction set. |
| 1637 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1638 | config CPU_NEVADA |
| 1639 | bool "RM52xx" |
Ralf Baechle | 7cf8053 | 2005-10-20 22:33:09 +0100 | [diff] [blame] | 1640 | depends on SYS_HAS_CPU_NEVADA |
Yoichi Yuasa | ed5ba2f | 2005-09-03 15:56:21 -0700 | [diff] [blame] | 1641 | select CPU_SUPPORTS_32BIT_KERNEL |
| 1642 | select CPU_SUPPORTS_64BIT_KERNEL |
Ralf Baechle | 970d032 | 2012-10-18 13:54:15 +0200 | [diff] [blame] | 1643 | select CPU_SUPPORTS_HUGEPAGES |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1644 | help |
| 1645 | QED / PMC-Sierra RM52xx-series ("Nevada") processors. |
| 1646 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1647 | config CPU_R10000 |
| 1648 | bool "R10000" |
Ralf Baechle | 7cf8053 | 2005-10-20 22:33:09 +0100 | [diff] [blame] | 1649 | depends on SYS_HAS_CPU_R10000 |
Ralf Baechle | 5e83d43 | 2005-10-29 19:32:41 +0100 | [diff] [blame] | 1650 | select CPU_HAS_PREFETCH |
Yoichi Yuasa | ed5ba2f | 2005-09-03 15:56:21 -0700 | [diff] [blame] | 1651 | select CPU_SUPPORTS_32BIT_KERNEL |
| 1652 | select CPU_SUPPORTS_64BIT_KERNEL |
Ralf Baechle | 797798c | 2005-08-10 15:17:11 +0000 | [diff] [blame] | 1653 | select CPU_SUPPORTS_HIGHMEM |
Ralf Baechle | 970d032 | 2012-10-18 13:54:15 +0200 | [diff] [blame] | 1654 | select CPU_SUPPORTS_HUGEPAGES |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1655 | help |
| 1656 | MIPS Technologies R10000-series processors. |
| 1657 | |
| 1658 | config CPU_RM7000 |
| 1659 | bool "RM7000" |
Ralf Baechle | 7cf8053 | 2005-10-20 22:33:09 +0100 | [diff] [blame] | 1660 | depends on SYS_HAS_CPU_RM7000 |
Ralf Baechle | 5e83d43 | 2005-10-29 19:32:41 +0100 | [diff] [blame] | 1661 | select CPU_HAS_PREFETCH |
Yoichi Yuasa | ed5ba2f | 2005-09-03 15:56:21 -0700 | [diff] [blame] | 1662 | select CPU_SUPPORTS_32BIT_KERNEL |
| 1663 | select CPU_SUPPORTS_64BIT_KERNEL |
Ralf Baechle | 797798c | 2005-08-10 15:17:11 +0000 | [diff] [blame] | 1664 | select CPU_SUPPORTS_HIGHMEM |
Ralf Baechle | 970d032 | 2012-10-18 13:54:15 +0200 | [diff] [blame] | 1665 | select CPU_SUPPORTS_HUGEPAGES |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1666 | |
| 1667 | config CPU_SB1 |
| 1668 | bool "SB1" |
Ralf Baechle | 7cf8053 | 2005-10-20 22:33:09 +0100 | [diff] [blame] | 1669 | depends on SYS_HAS_CPU_SB1 |
Yoichi Yuasa | ed5ba2f | 2005-09-03 15:56:21 -0700 | [diff] [blame] | 1670 | select CPU_SUPPORTS_32BIT_KERNEL |
| 1671 | select CPU_SUPPORTS_64BIT_KERNEL |
Ralf Baechle | 797798c | 2005-08-10 15:17:11 +0000 | [diff] [blame] | 1672 | select CPU_SUPPORTS_HIGHMEM |
Ralf Baechle | 970d032 | 2012-10-18 13:54:15 +0200 | [diff] [blame] | 1673 | select CPU_SUPPORTS_HUGEPAGES |
Ralf Baechle | 0004a9d | 2006-10-31 03:45:07 +0000 | [diff] [blame] | 1674 | select WEAK_ORDERING |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1675 | |
David Daney | a86c7f7 | 2008-12-11 15:33:38 -0800 | [diff] [blame] | 1676 | config CPU_CAVIUM_OCTEON |
| 1677 | bool "Cavium Octeon processor" |
David Daney | 5e683389 | 2009-02-02 11:30:59 -0800 | [diff] [blame] | 1678 | depends on SYS_HAS_CPU_CAVIUM_OCTEON |
David Daney | a86c7f7 | 2008-12-11 15:33:38 -0800 | [diff] [blame] | 1679 | select CPU_HAS_PREFETCH |
| 1680 | select CPU_SUPPORTS_64BIT_KERNEL |
David Daney | a86c7f7 | 2008-12-11 15:33:38 -0800 | [diff] [blame] | 1681 | select WEAK_ORDERING |
David Daney | a86c7f7 | 2008-12-11 15:33:38 -0800 | [diff] [blame] | 1682 | select CPU_SUPPORTS_HIGHMEM |
David Daney | 9cffd154 | 2009-05-27 17:47:46 -0700 | [diff] [blame] | 1683 | select CPU_SUPPORTS_HUGEPAGES |
Ben Hutchings | df115f3 | 2015-05-25 20:27:29 +0100 | [diff] [blame] | 1684 | select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN |
| 1685 | select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN |
Florian Fainelli | 930beb5 | 2014-01-14 09:54:38 -0800 | [diff] [blame] | 1686 | select MIPS_L1_CACHE_SHIFT_7 |
James Hogan | 0ae3abc | 2017-03-14 10:25:51 +0000 | [diff] [blame] | 1687 | select HAVE_KVM |
David Daney | a86c7f7 | 2008-12-11 15:33:38 -0800 | [diff] [blame] | 1688 | help |
| 1689 | The Cavium Octeon processor is a highly integrated chip containing |
| 1690 | many ethernet hardware widgets for networking tasks. The processor |
| 1691 | can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets. |
| 1692 | Full details can be found at http://www.caviumnetworks.com. |
| 1693 | |
Jonas Gorski | cd74624 | 2013-12-18 14:12:02 +0100 | [diff] [blame] | 1694 | config CPU_BMIPS |
| 1695 | bool "Broadcom BMIPS" |
| 1696 | depends on SYS_HAS_CPU_BMIPS |
| 1697 | select CPU_MIPS32 |
Jonas Gorski | fe7f62c | 2013-12-18 14:12:05 +0100 | [diff] [blame] | 1698 | select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300 |
Jonas Gorski | cd74624 | 2013-12-18 14:12:02 +0100 | [diff] [blame] | 1699 | select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350 |
| 1700 | select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380 |
| 1701 | select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000 |
| 1702 | select CPU_SUPPORTS_32BIT_KERNEL |
| 1703 | select DMA_NONCOHERENT |
Ralf Baechle | 67e38cf | 2015-05-26 18:20:06 +0200 | [diff] [blame] | 1704 | select IRQ_MIPS_CPU |
Jonas Gorski | cd74624 | 2013-12-18 14:12:02 +0100 | [diff] [blame] | 1705 | select SWAP_IO_SPACE |
| 1706 | select WEAK_ORDERING |
Kevin Cernekee | c1c0c46 | 2010-10-17 10:56:53 -0700 | [diff] [blame] | 1707 | select CPU_SUPPORTS_HIGHMEM |
Jonas Gorski | 69aaf9c | 2013-12-18 14:12:04 +0100 | [diff] [blame] | 1708 | select CPU_HAS_PREFETCH |
Markus Mayer | a8d709b | 2017-02-07 13:58:54 -0800 | [diff] [blame] | 1709 | select CPU_SUPPORTS_CPUFREQ |
| 1710 | select MIPS_EXTERNAL_TIMER |
Florian Fainelli | bf8bde4 | 2021-10-20 11:48:47 -0700 | [diff] [blame] | 1711 | select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU |
Kevin Cernekee | c1c0c46 | 2010-10-17 10:56:53 -0700 | [diff] [blame] | 1712 | help |
Jonas Gorski | fe7f62c | 2013-12-18 14:12:05 +0100 | [diff] [blame] | 1713 | Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors. |
Kevin Cernekee | c1c0c46 | 2010-10-17 10:56:53 -0700 | [diff] [blame] | 1714 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1715 | endchoice |
| 1716 | |
Leonid Yegoshin | a6e1878 | 2013-12-03 10:22:26 +0000 | [diff] [blame] | 1717 | config CPU_MIPS32_3_5_FEATURES |
| 1718 | bool "MIPS32 Release 3.5 Features" |
| 1719 | depends on SYS_HAS_CPU_MIPS32_R3_5 |
Serge Semin | 281e3ae | 2020-05-21 17:07:15 +0300 | [diff] [blame] | 1720 | depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_MIPS32_R6 || \ |
| 1721 | CPU_P5600 |
Leonid Yegoshin | a6e1878 | 2013-12-03 10:22:26 +0000 | [diff] [blame] | 1722 | help |
| 1723 | Choose this option to build a kernel for release 2 or later of the |
| 1724 | MIPS32 architecture including features from the 3.5 release such as |
| 1725 | support for Enhanced Virtual Addressing (EVA). |
| 1726 | |
| 1727 | config CPU_MIPS32_3_5_EVA |
| 1728 | bool "Enhanced Virtual Addressing (EVA)" |
| 1729 | depends on CPU_MIPS32_3_5_FEATURES |
| 1730 | select EVA |
| 1731 | default y |
| 1732 | help |
| 1733 | Choose this option if you want to enable the Enhanced Virtual |
| 1734 | Addressing (EVA) on your MIPS32 core (such as proAptiv). |
| 1735 | One of its primary benefits is an increase in the maximum size |
| 1736 | of lowmem (up to 3GB). If unsure, say 'N' here. |
| 1737 | |
Steven J. Hill | c5b3678 | 2015-02-26 18:16:38 -0600 | [diff] [blame] | 1738 | config CPU_MIPS32_R5_FEATURES |
| 1739 | bool "MIPS32 Release 5 Features" |
| 1740 | depends on SYS_HAS_CPU_MIPS32_R5 |
Serge Semin | 281e3ae | 2020-05-21 17:07:15 +0300 | [diff] [blame] | 1741 | depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_P5600 |
Steven J. Hill | c5b3678 | 2015-02-26 18:16:38 -0600 | [diff] [blame] | 1742 | help |
| 1743 | Choose this option to build a kernel for release 2 or later of the |
| 1744 | MIPS32 architecture including features from release 5 such as |
| 1745 | support for Extended Physical Addressing (XPA). |
| 1746 | |
| 1747 | config CPU_MIPS32_R5_XPA |
| 1748 | bool "Extended Physical Addressing (XPA)" |
| 1749 | depends on CPU_MIPS32_R5_FEATURES |
| 1750 | depends on !EVA |
| 1751 | depends on !PAGE_SIZE_4KB |
| 1752 | depends on SYS_SUPPORTS_HIGHMEM |
| 1753 | select XPA |
| 1754 | select HIGHMEM |
Christoph Hellwig | d4a451d | 2018-04-03 16:24:20 +0200 | [diff] [blame] | 1755 | select PHYS_ADDR_T_64BIT |
Steven J. Hill | c5b3678 | 2015-02-26 18:16:38 -0600 | [diff] [blame] | 1756 | default n |
| 1757 | help |
| 1758 | Choose this option if you want to enable the Extended Physical |
| 1759 | Addressing (XPA) on your MIPS32 core (such as P5600 series). The |
| 1760 | benefit is to increase physical addressing equal to or greater |
| 1761 | than 40 bits. Note that this has the side effect of turning on |
| 1762 | 64-bit addressing which in turn makes the PTEs 64-bit in size. |
| 1763 | If unsure, say 'N' here. |
| 1764 | |
Wu Zhangjin | 622844b | 2010-04-10 20:04:42 +0800 | [diff] [blame] | 1765 | if CPU_LOONGSON2F |
| 1766 | config CPU_NOP_WORKAROUNDS |
| 1767 | bool |
| 1768 | |
| 1769 | config CPU_JUMP_WORKAROUNDS |
| 1770 | bool |
| 1771 | |
| 1772 | config CPU_LOONGSON2F_WORKAROUNDS |
| 1773 | bool "Loongson 2F Workarounds" |
| 1774 | default y |
| 1775 | select CPU_NOP_WORKAROUNDS |
| 1776 | select CPU_JUMP_WORKAROUNDS |
| 1777 | help |
| 1778 | Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which |
| 1779 | require workarounds. Without workarounds the system may hang |
| 1780 | unexpectedly. For more information please refer to the gas |
| 1781 | -mfix-loongson2f-nop and -mfix-loongson2f-jump options. |
| 1782 | |
| 1783 | Loongson 2F03 and later have fixed these issues and no workarounds |
| 1784 | are needed. The workarounds have no significant side effect on them |
| 1785 | but may decrease the performance of the system so this option should |
| 1786 | be disabled unless the kernel is intended to be run on 2F01 or 2F02 |
| 1787 | systems. |
| 1788 | |
| 1789 | If unsure, please say Y. |
| 1790 | endif # CPU_LOONGSON2F |
| 1791 | |
Wu Zhangjin | 1b93b3c | 2009-10-14 18:12:16 +0800 | [diff] [blame] | 1792 | config SYS_SUPPORTS_ZBOOT |
| 1793 | bool |
| 1794 | select HAVE_KERNEL_GZIP |
| 1795 | select HAVE_KERNEL_BZIP2 |
Florian Fainelli | 31c4867 | 2013-09-16 16:55:20 +0100 | [diff] [blame] | 1796 | select HAVE_KERNEL_LZ4 |
Wu Zhangjin | 1b93b3c | 2009-10-14 18:12:16 +0800 | [diff] [blame] | 1797 | select HAVE_KERNEL_LZMA |
Wu Zhangjin | fe1d45e0 | 2010-01-15 20:34:46 +0800 | [diff] [blame] | 1798 | select HAVE_KERNEL_LZO |
Florian Fainelli | 4e23eb6 | 2013-09-11 11:51:41 +0100 | [diff] [blame] | 1799 | select HAVE_KERNEL_XZ |
Paul Cercueil | a510b61 | 2020-09-01 16:26:51 +0200 | [diff] [blame] | 1800 | select HAVE_KERNEL_ZSTD |
Wu Zhangjin | 1b93b3c | 2009-10-14 18:12:16 +0800 | [diff] [blame] | 1801 | |
| 1802 | config SYS_SUPPORTS_ZBOOT_UART16550 |
| 1803 | bool |
| 1804 | select SYS_SUPPORTS_ZBOOT |
| 1805 | |
Alban Bedel | dbb9831 | 2015-12-10 10:57:21 +0100 | [diff] [blame] | 1806 | config SYS_SUPPORTS_ZBOOT_UART_PROM |
| 1807 | bool |
| 1808 | select SYS_SUPPORTS_ZBOOT |
| 1809 | |
Jiaxun Yang | 268a2d6 | 2019-10-20 22:43:13 +0800 | [diff] [blame] | 1810 | config CPU_LOONGSON2EF |
Wu Zhangjin | 3702bba | 2009-07-02 23:27:41 +0800 | [diff] [blame] | 1811 | bool |
| 1812 | select CPU_SUPPORTS_32BIT_KERNEL |
| 1813 | select CPU_SUPPORTS_64BIT_KERNEL |
| 1814 | select CPU_SUPPORTS_HIGHMEM |
Ralf Baechle | 970d032 | 2012-10-18 13:54:15 +0200 | [diff] [blame] | 1815 | select CPU_SUPPORTS_HUGEPAGES |
Christoph Hellwig | e905086 | 2018-06-20 09:11:15 +0200 | [diff] [blame] | 1816 | select ARCH_HAS_PHYS_TO_DMA |
Wu Zhangjin | 3702bba | 2009-07-02 23:27:41 +0800 | [diff] [blame] | 1817 | |
Huacai Chen | b2afb64 | 2019-11-04 14:11:20 +0800 | [diff] [blame] | 1818 | config CPU_LOONGSON32 |
Kelvin Cheung | ca585cf | 2012-07-25 16:17:24 +0200 | [diff] [blame] | 1819 | bool |
| 1820 | select CPU_MIPS32 |
Jiaxun Yang | 7e280f6 | 2019-01-22 21:04:12 +0800 | [diff] [blame] | 1821 | select CPU_MIPSR2 |
Kelvin Cheung | ca585cf | 2012-07-25 16:17:24 +0200 | [diff] [blame] | 1822 | select CPU_HAS_PREFETCH |
| 1823 | select CPU_SUPPORTS_32BIT_KERNEL |
| 1824 | select CPU_SUPPORTS_HIGHMEM |
Kelvin Cheung | f29ad10 | 2014-10-10 11:40:01 +0800 | [diff] [blame] | 1825 | select CPU_SUPPORTS_CPUFREQ |
Kelvin Cheung | ca585cf | 2012-07-25 16:17:24 +0200 | [diff] [blame] | 1826 | |
Jonas Gorski | fe7f62c | 2013-12-18 14:12:05 +0100 | [diff] [blame] | 1827 | config CPU_BMIPS32_3300 |
Jonas Gorski | 04fa8bf | 2013-12-18 14:12:06 +0100 | [diff] [blame] | 1828 | select SMP_UP if SMP |
Kevin Cernekee | 1bbb6c1 | 2011-11-10 22:30:24 -0800 | [diff] [blame] | 1829 | bool |
Jonas Gorski | cd74624 | 2013-12-18 14:12:02 +0100 | [diff] [blame] | 1830 | |
| 1831 | config CPU_BMIPS4350 |
| 1832 | bool |
| 1833 | select SYS_SUPPORTS_SMP |
| 1834 | select SYS_SUPPORTS_HOTPLUG_CPU |
| 1835 | |
| 1836 | config CPU_BMIPS4380 |
| 1837 | bool |
Kevin Cernekee | bbf2ba6 | 2014-10-20 21:27:58 -0700 | [diff] [blame] | 1838 | select MIPS_L1_CACHE_SHIFT_6 |
Jonas Gorski | cd74624 | 2013-12-18 14:12:02 +0100 | [diff] [blame] | 1839 | select SYS_SUPPORTS_SMP |
| 1840 | select SYS_SUPPORTS_HOTPLUG_CPU |
Florian Fainelli | b472080 | 2016-02-09 12:55:53 -0800 | [diff] [blame] | 1841 | select CPU_HAS_RIXI |
Jonas Gorski | cd74624 | 2013-12-18 14:12:02 +0100 | [diff] [blame] | 1842 | |
| 1843 | config CPU_BMIPS5000 |
| 1844 | bool |
Jonas Gorski | cd74624 | 2013-12-18 14:12:02 +0100 | [diff] [blame] | 1845 | select MIPS_CPU_SCACHE |
Kevin Cernekee | bbf2ba6 | 2014-10-20 21:27:58 -0700 | [diff] [blame] | 1846 | select MIPS_L1_CACHE_SHIFT_7 |
Jonas Gorski | cd74624 | 2013-12-18 14:12:02 +0100 | [diff] [blame] | 1847 | select SYS_SUPPORTS_SMP |
| 1848 | select SYS_SUPPORTS_HOTPLUG_CPU |
Florian Fainelli | b472080 | 2016-02-09 12:55:53 -0800 | [diff] [blame] | 1849 | select CPU_HAS_RIXI |
Kevin Cernekee | 1bbb6c1 | 2011-11-10 22:30:24 -0800 | [diff] [blame] | 1850 | |
Jiaxun Yang | 268a2d6 | 2019-10-20 22:43:13 +0800 | [diff] [blame] | 1851 | config SYS_HAS_CPU_LOONGSON64 |
Huacai Chen | 0e476d9 | 2014-03-21 18:44:07 +0800 | [diff] [blame] | 1852 | bool |
| 1853 | select CPU_SUPPORTS_CPUFREQ |
Huacai Chen | b2edcfc | 2016-03-03 09:45:09 +0800 | [diff] [blame] | 1854 | select CPU_HAS_RIXI |
Huacai Chen | 0e476d9 | 2014-03-21 18:44:07 +0800 | [diff] [blame] | 1855 | |
Wu Zhangjin | 3702bba | 2009-07-02 23:27:41 +0800 | [diff] [blame] | 1856 | config SYS_HAS_CPU_LOONGSON2E |
Fuxin Zhang | 2a21c73 | 2007-06-06 14:52:43 +0800 | [diff] [blame] | 1857 | bool |
| 1858 | |
Wu Zhangjin | 6f7a251 | 2009-11-06 18:45:05 +0800 | [diff] [blame] | 1859 | config SYS_HAS_CPU_LOONGSON2F |
| 1860 | bool |
Wu Zhangjin | 55045ff | 2009-11-11 13:39:12 +0800 | [diff] [blame] | 1861 | select CPU_SUPPORTS_CPUFREQ |
| 1862 | select CPU_SUPPORTS_ADDRWINCFG if 64BIT |
Wu Zhangjin | 6f7a251 | 2009-11-06 18:45:05 +0800 | [diff] [blame] | 1863 | |
Kelvin Cheung | ca585cf | 2012-07-25 16:17:24 +0200 | [diff] [blame] | 1864 | config SYS_HAS_CPU_LOONGSON1B |
| 1865 | bool |
| 1866 | |
Yang Ling | 12e3280 | 2016-05-19 12:29:30 +0800 | [diff] [blame] | 1867 | config SYS_HAS_CPU_LOONGSON1C |
| 1868 | bool |
| 1869 | |
Ralf Baechle | 7cf8053 | 2005-10-20 22:33:09 +0100 | [diff] [blame] | 1870 | config SYS_HAS_CPU_MIPS32_R1 |
| 1871 | bool |
| 1872 | |
| 1873 | config SYS_HAS_CPU_MIPS32_R2 |
| 1874 | bool |
| 1875 | |
Leonid Yegoshin | a6e1878 | 2013-12-03 10:22:26 +0000 | [diff] [blame] | 1876 | config SYS_HAS_CPU_MIPS32_R3_5 |
| 1877 | bool |
| 1878 | |
Steven J. Hill | c5b3678 | 2015-02-26 18:16:38 -0600 | [diff] [blame] | 1879 | config SYS_HAS_CPU_MIPS32_R5 |
| 1880 | bool |
Paul Burton | 9ae1f26 | 2019-02-04 13:52:58 -0800 | [diff] [blame] | 1881 | select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT |
Steven J. Hill | c5b3678 | 2015-02-26 18:16:38 -0600 | [diff] [blame] | 1882 | |
Leonid Yegoshin | 7fd08ca | 2014-10-27 10:34:11 +0000 | [diff] [blame] | 1883 | config SYS_HAS_CPU_MIPS32_R6 |
| 1884 | bool |
Paul Burton | 9ae1f26 | 2019-02-04 13:52:58 -0800 | [diff] [blame] | 1885 | select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT |
Leonid Yegoshin | 7fd08ca | 2014-10-27 10:34:11 +0000 | [diff] [blame] | 1886 | |
Ralf Baechle | 7cf8053 | 2005-10-20 22:33:09 +0100 | [diff] [blame] | 1887 | config SYS_HAS_CPU_MIPS64_R1 |
| 1888 | bool |
| 1889 | |
| 1890 | config SYS_HAS_CPU_MIPS64_R2 |
| 1891 | bool |
| 1892 | |
Lukas Bulwahn | fd4eb90 | 2021-12-13 12:16:35 +0100 | [diff] [blame] | 1893 | config SYS_HAS_CPU_MIPS64_R5 |
| 1894 | bool |
| 1895 | select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT |
| 1896 | |
Leonid Yegoshin | 7fd08ca | 2014-10-27 10:34:11 +0000 | [diff] [blame] | 1897 | config SYS_HAS_CPU_MIPS64_R6 |
| 1898 | bool |
Paul Burton | 9ae1f26 | 2019-02-04 13:52:58 -0800 | [diff] [blame] | 1899 | select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT |
Leonid Yegoshin | 7fd08ca | 2014-10-27 10:34:11 +0000 | [diff] [blame] | 1900 | |
Serge Semin | 281e3ae | 2020-05-21 17:07:15 +0300 | [diff] [blame] | 1901 | config SYS_HAS_CPU_P5600 |
| 1902 | bool |
| 1903 | select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT |
| 1904 | |
Ralf Baechle | 7cf8053 | 2005-10-20 22:33:09 +0100 | [diff] [blame] | 1905 | config SYS_HAS_CPU_R3000 |
| 1906 | bool |
| 1907 | |
Ralf Baechle | 7cf8053 | 2005-10-20 22:33:09 +0100 | [diff] [blame] | 1908 | config SYS_HAS_CPU_VR41XX |
| 1909 | bool |
| 1910 | |
Lauri Kasanen | 65ce619 | 2021-01-13 17:10:07 +0200 | [diff] [blame] | 1911 | config SYS_HAS_CPU_R4300 |
| 1912 | bool |
| 1913 | |
Ralf Baechle | 7cf8053 | 2005-10-20 22:33:09 +0100 | [diff] [blame] | 1914 | config SYS_HAS_CPU_R4X00 |
| 1915 | bool |
| 1916 | |
| 1917 | config SYS_HAS_CPU_TX49XX |
| 1918 | bool |
| 1919 | |
| 1920 | config SYS_HAS_CPU_R5000 |
| 1921 | bool |
| 1922 | |
Shinya Kuribayashi | 542c102 | 2008-10-24 01:27:57 +0900 | [diff] [blame] | 1923 | config SYS_HAS_CPU_R5500 |
| 1924 | bool |
| 1925 | |
Ralf Baechle | 7cf8053 | 2005-10-20 22:33:09 +0100 | [diff] [blame] | 1926 | config SYS_HAS_CPU_NEVADA |
| 1927 | bool |
| 1928 | |
Ralf Baechle | 7cf8053 | 2005-10-20 22:33:09 +0100 | [diff] [blame] | 1929 | config SYS_HAS_CPU_R10000 |
| 1930 | bool |
Paul Burton | 9ae1f26 | 2019-02-04 13:52:58 -0800 | [diff] [blame] | 1931 | select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT |
Ralf Baechle | 7cf8053 | 2005-10-20 22:33:09 +0100 | [diff] [blame] | 1932 | |
| 1933 | config SYS_HAS_CPU_RM7000 |
| 1934 | bool |
| 1935 | |
Ralf Baechle | 7cf8053 | 2005-10-20 22:33:09 +0100 | [diff] [blame] | 1936 | config SYS_HAS_CPU_SB1 |
| 1937 | bool |
| 1938 | |
David Daney | 5e683389 | 2009-02-02 11:30:59 -0800 | [diff] [blame] | 1939 | config SYS_HAS_CPU_CAVIUM_OCTEON |
| 1940 | bool |
| 1941 | |
Jonas Gorski | cd74624 | 2013-12-18 14:12:02 +0100 | [diff] [blame] | 1942 | config SYS_HAS_CPU_BMIPS |
Kevin Cernekee | c1c0c46 | 2010-10-17 10:56:53 -0700 | [diff] [blame] | 1943 | bool |
| 1944 | |
Jonas Gorski | fe7f62c | 2013-12-18 14:12:05 +0100 | [diff] [blame] | 1945 | config SYS_HAS_CPU_BMIPS32_3300 |
Kevin Cernekee | c1c0c46 | 2010-10-17 10:56:53 -0700 | [diff] [blame] | 1946 | bool |
Jonas Gorski | cd74624 | 2013-12-18 14:12:02 +0100 | [diff] [blame] | 1947 | select SYS_HAS_CPU_BMIPS |
Kevin Cernekee | c1c0c46 | 2010-10-17 10:56:53 -0700 | [diff] [blame] | 1948 | |
| 1949 | config SYS_HAS_CPU_BMIPS4350 |
| 1950 | bool |
Jonas Gorski | cd74624 | 2013-12-18 14:12:02 +0100 | [diff] [blame] | 1951 | select SYS_HAS_CPU_BMIPS |
Kevin Cernekee | c1c0c46 | 2010-10-17 10:56:53 -0700 | [diff] [blame] | 1952 | |
| 1953 | config SYS_HAS_CPU_BMIPS4380 |
| 1954 | bool |
Jonas Gorski | cd74624 | 2013-12-18 14:12:02 +0100 | [diff] [blame] | 1955 | select SYS_HAS_CPU_BMIPS |
Kevin Cernekee | c1c0c46 | 2010-10-17 10:56:53 -0700 | [diff] [blame] | 1956 | |
| 1957 | config SYS_HAS_CPU_BMIPS5000 |
| 1958 | bool |
Jonas Gorski | cd74624 | 2013-12-18 14:12:02 +0100 | [diff] [blame] | 1959 | select SYS_HAS_CPU_BMIPS |
Hauke Mehrtens | f263f2a | 2018-12-09 16:49:57 +0100 | [diff] [blame] | 1960 | select ARCH_HAS_SYNC_DMA_FOR_CPU |
Kevin Cernekee | c1c0c46 | 2010-10-17 10:56:53 -0700 | [diff] [blame] | 1961 | |
Ralf Baechle | 17099b1 | 2007-07-14 13:24:05 +0100 | [diff] [blame] | 1962 | # |
| 1963 | # CPU may reorder R->R, R->W, W->R, W->W |
| 1964 | # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC |
| 1965 | # |
Ralf Baechle | 0004a9d | 2006-10-31 03:45:07 +0000 | [diff] [blame] | 1966 | config WEAK_ORDERING |
| 1967 | bool |
Ralf Baechle | 17099b1 | 2007-07-14 13:24:05 +0100 | [diff] [blame] | 1968 | |
| 1969 | # |
| 1970 | # CPU may reorder reads and writes beyond LL/SC |
| 1971 | # CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC |
| 1972 | # |
| 1973 | config WEAK_REORDERING_BEYOND_LLSC |
| 1974 | bool |
Ralf Baechle | 5e83d43 | 2005-10-29 19:32:41 +0100 | [diff] [blame] | 1975 | endmenu |
| 1976 | |
| 1977 | # |
Chris Dearman | c09b47d | 2006-06-20 17:15:20 +0100 | [diff] [blame] | 1978 | # These two indicate any level of the MIPS32 and MIPS64 architecture |
Ralf Baechle | 5e83d43 | 2005-10-29 19:32:41 +0100 | [diff] [blame] | 1979 | # |
| 1980 | config CPU_MIPS32 |
| 1981 | bool |
Serge Semin | ab7c01f | 2020-05-21 17:07:14 +0300 | [diff] [blame] | 1982 | default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R5 || \ |
Serge Semin | 281e3ae | 2020-05-21 17:07:15 +0300 | [diff] [blame] | 1983 | CPU_MIPS32_R6 || CPU_P5600 |
Ralf Baechle | 5e83d43 | 2005-10-29 19:32:41 +0100 | [diff] [blame] | 1984 | |
| 1985 | config CPU_MIPS64 |
| 1986 | bool |
Serge Semin | ab7c01f | 2020-05-21 17:07:14 +0300 | [diff] [blame] | 1987 | default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R5 || \ |
Jason A. Donenfeld | 5a4fa44 | 2021-02-28 00:02:36 +0100 | [diff] [blame] | 1988 | CPU_MIPS64_R6 || CPU_LOONGSON64 || CPU_CAVIUM_OCTEON |
Ralf Baechle | 5e83d43 | 2005-10-29 19:32:41 +0100 | [diff] [blame] | 1989 | |
| 1990 | # |
Paul Burton | 57eeaced | 2018-11-08 23:44:55 +0000 | [diff] [blame] | 1991 | # These indicate the revision of the architecture |
Ralf Baechle | 5e83d43 | 2005-10-29 19:32:41 +0100 | [diff] [blame] | 1992 | # |
| 1993 | config CPU_MIPSR1 |
| 1994 | bool |
| 1995 | default y if CPU_MIPS32_R1 || CPU_MIPS64_R1 |
| 1996 | |
| 1997 | config CPU_MIPSR2 |
| 1998 | bool |
David Daney | a86c7f7 | 2008-12-11 15:33:38 -0800 | [diff] [blame] | 1999 | default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON |
Florian Fainelli | 8256b17 | 2016-02-09 12:55:51 -0800 | [diff] [blame] | 2000 | select CPU_HAS_RIXI |
Jiaxun Yang | ba9196d | 2020-01-13 18:14:59 +0800 | [diff] [blame] | 2001 | select CPU_HAS_DIEI if !CPU_DIEI_BROKEN |
Markos Chandras | a7e07b1 | 2014-11-13 13:32:03 +0000 | [diff] [blame] | 2002 | select MIPS_SPRAM |
Ralf Baechle | 5e83d43 | 2005-10-29 19:32:41 +0100 | [diff] [blame] | 2003 | |
Serge Semin | ab7c01f | 2020-05-21 17:07:14 +0300 | [diff] [blame] | 2004 | config CPU_MIPSR5 |
| 2005 | bool |
Serge Semin | 281e3ae | 2020-05-21 17:07:15 +0300 | [diff] [blame] | 2006 | default y if CPU_MIPS32_R5 || CPU_MIPS64_R5 || CPU_P5600 |
Serge Semin | ab7c01f | 2020-05-21 17:07:14 +0300 | [diff] [blame] | 2007 | select CPU_HAS_RIXI |
| 2008 | select CPU_HAS_DIEI if !CPU_DIEI_BROKEN |
| 2009 | select MIPS_SPRAM |
| 2010 | |
Leonid Yegoshin | 7fd08ca | 2014-10-27 10:34:11 +0000 | [diff] [blame] | 2011 | config CPU_MIPSR6 |
| 2012 | bool |
| 2013 | default y if CPU_MIPS32_R6 || CPU_MIPS64_R6 |
Florian Fainelli | 8256b17 | 2016-02-09 12:55:51 -0800 | [diff] [blame] | 2014 | select CPU_HAS_RIXI |
Jiaxun Yang | ba9196d | 2020-01-13 18:14:59 +0800 | [diff] [blame] | 2015 | select CPU_HAS_DIEI if !CPU_DIEI_BROKEN |
Paul Burton | 87321fd | 2016-05-06 13:35:03 +0100 | [diff] [blame] | 2016 | select HAVE_ARCH_BITREVERSE |
Paul Burton | 2db003a | 2016-05-06 14:36:24 +0100 | [diff] [blame] | 2017 | select MIPS_ASID_BITS_VARIABLE |
Marcin Nowakowski | 4a5dc51e | 2018-02-09 22:11:06 +0000 | [diff] [blame] | 2018 | select MIPS_CRC_SUPPORT |
Markos Chandras | a7e07b1 | 2014-11-13 13:32:03 +0000 | [diff] [blame] | 2019 | select MIPS_SPRAM |
Ralf Baechle | 5e83d43 | 2005-10-29 19:32:41 +0100 | [diff] [blame] | 2020 | |
Paul Burton | 57eeaced | 2018-11-08 23:44:55 +0000 | [diff] [blame] | 2021 | config TARGET_ISA_REV |
| 2022 | int |
| 2023 | default 1 if CPU_MIPSR1 |
| 2024 | default 2 if CPU_MIPSR2 |
Serge Semin | ab7c01f | 2020-05-21 17:07:14 +0300 | [diff] [blame] | 2025 | default 5 if CPU_MIPSR5 |
Paul Burton | 57eeaced | 2018-11-08 23:44:55 +0000 | [diff] [blame] | 2026 | default 6 if CPU_MIPSR6 |
| 2027 | default 0 |
| 2028 | help |
| 2029 | Reflects the ISA revision being targeted by the kernel build. This |
| 2030 | is effectively the Kconfig equivalent of MIPS_ISA_REV. |
| 2031 | |
Leonid Yegoshin | a6e1878 | 2013-12-03 10:22:26 +0000 | [diff] [blame] | 2032 | config EVA |
| 2033 | bool |
| 2034 | |
Steven J. Hill | c5b3678 | 2015-02-26 18:16:38 -0600 | [diff] [blame] | 2035 | config XPA |
| 2036 | bool |
| 2037 | |
Ralf Baechle | 5e83d43 | 2005-10-29 19:32:41 +0100 | [diff] [blame] | 2038 | config SYS_SUPPORTS_32BIT_KERNEL |
| 2039 | bool |
| 2040 | config SYS_SUPPORTS_64BIT_KERNEL |
| 2041 | bool |
| 2042 | config CPU_SUPPORTS_32BIT_KERNEL |
| 2043 | bool |
| 2044 | config CPU_SUPPORTS_64BIT_KERNEL |
| 2045 | bool |
Wu Zhangjin | 55045ff | 2009-11-11 13:39:12 +0800 | [diff] [blame] | 2046 | config CPU_SUPPORTS_CPUFREQ |
| 2047 | bool |
| 2048 | config CPU_SUPPORTS_ADDRWINCFG |
| 2049 | bool |
David Daney | 9cffd154 | 2009-05-27 17:47:46 -0700 | [diff] [blame] | 2050 | config CPU_SUPPORTS_HUGEPAGES |
| 2051 | bool |
Lukas Bulwahn | a670c82d | 2021-12-13 12:16:42 +0100 | [diff] [blame] | 2052 | depends on !(32BIT && (PHYS_ADDR_T_64BIT || EVA)) |
David Daney | 8262228 | 2009-10-14 12:16:56 -0700 | [diff] [blame] | 2053 | config MIPS_PGD_C0_CONTEXT |
| 2054 | bool |
Huang Pei | c6972fb | 2021-03-13 09:39:27 +0800 | [diff] [blame] | 2055 | depends on 64BIT |
Thomas Bogendoerfer | 95b8a5e | 2021-10-20 14:49:13 +0200 | [diff] [blame] | 2056 | default y if (CPU_MIPSR2 || CPU_MIPSR6) |
Ralf Baechle | 5e83d43 | 2005-10-29 19:32:41 +0100 | [diff] [blame] | 2057 | |
David Daney | 8192c9e | 2008-09-23 00:04:26 -0700 | [diff] [blame] | 2058 | # |
| 2059 | # Set to y for ptrace access to watch registers. |
| 2060 | # |
| 2061 | config HARDWARE_WATCHPOINTS |
Enrico Weigelt, metux IT consult | 371a415 | 2019-03-11 16:54:27 +0100 | [diff] [blame] | 2062 | bool |
| 2063 | default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6 |
David Daney | 8192c9e | 2008-09-23 00:04:26 -0700 | [diff] [blame] | 2064 | |
Ralf Baechle | 5e83d43 | 2005-10-29 19:32:41 +0100 | [diff] [blame] | 2065 | menu "Kernel type" |
| 2066 | |
| 2067 | choice |
Ralf Baechle | 5e83d43 | 2005-10-29 19:32:41 +0100 | [diff] [blame] | 2068 | prompt "Kernel code model" |
| 2069 | help |
| 2070 | You should only select this option if you have a workload that |
| 2071 | actually benefits from 64-bit processing or if your machine has |
| 2072 | large memory. You will only be presented a single option in this |
| 2073 | menu if your system does not support both 32-bit and 64-bit kernels. |
| 2074 | |
| 2075 | config 32BIT |
| 2076 | bool "32-bit kernel" |
| 2077 | depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL |
| 2078 | select TRAD_SIGNALS |
| 2079 | help |
| 2080 | Select this option if you want to build a 32-bit kernel. |
Ralf Baechle | f17c4ca | 2015-07-23 12:02:09 +0200 | [diff] [blame] | 2081 | |
Ralf Baechle | 5e83d43 | 2005-10-29 19:32:41 +0100 | [diff] [blame] | 2082 | config 64BIT |
| 2083 | bool "64-bit kernel" |
| 2084 | depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL |
| 2085 | help |
| 2086 | Select this option if you want to build a 64-bit kernel. |
| 2087 | |
| 2088 | endchoice |
| 2089 | |
Leonid Yegoshin | 1e321fa | 2015-05-14 18:34:43 -0700 | [diff] [blame] | 2090 | config MIPS_VA_BITS_48 |
| 2091 | bool "48 bits virtual memory" |
| 2092 | depends on 64BIT |
| 2093 | help |
Alex Belits | 3377e22 | 2017-02-16 17:27:34 -0800 | [diff] [blame] | 2094 | Support a maximum at least 48 bits of application virtual |
| 2095 | memory. Default is 40 bits or less, depending on the CPU. |
| 2096 | For page sizes 16k and above, this option results in a small |
| 2097 | memory overhead for page tables. For 4k page size, a fourth |
| 2098 | level of page tables is added which imposes both a memory |
| 2099 | overhead as well as slower TLB fault handling. |
| 2100 | |
Leonid Yegoshin | 1e321fa | 2015-05-14 18:34:43 -0700 | [diff] [blame] | 2101 | If unsure, say N. |
| 2102 | |
YunQiang Su | 79876cc | 2021-12-22 13:43:46 +0000 | [diff] [blame] | 2103 | config ZBOOT_LOAD_ADDRESS |
| 2104 | hex "Compressed kernel load address" |
| 2105 | default 0xffffffff80400000 if BCM47XX |
| 2106 | default 0x0 |
| 2107 | depends on SYS_SUPPORTS_ZBOOT |
| 2108 | help |
| 2109 | The address to load compressed kernel, aka vmlinuz. |
| 2110 | |
| 2111 | This is only used if non-zero. |
| 2112 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2113 | choice |
| 2114 | prompt "Kernel page size" |
| 2115 | default PAGE_SIZE_4KB |
| 2116 | |
| 2117 | config PAGE_SIZE_4KB |
| 2118 | bool "4kB" |
Jiaxun Yang | 268a2d6 | 2019-10-20 22:43:13 +0800 | [diff] [blame] | 2119 | depends on !CPU_LOONGSON2EF && !CPU_LOONGSON64 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2120 | help |
Enrico Weigelt, metux IT consult | 371a415 | 2019-03-11 16:54:27 +0100 | [diff] [blame] | 2121 | This option select the standard 4kB Linux page size. On some |
| 2122 | R3000-family processors this is the only available page size. Using |
| 2123 | 4kB page size will minimize memory consumption and is therefore |
| 2124 | recommended for low memory systems. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2125 | |
| 2126 | config PAGE_SIZE_8KB |
| 2127 | bool "8kB" |
Paul Burton | c2aeaae | 2019-07-22 22:00:03 +0000 | [diff] [blame] | 2128 | depends on CPU_CAVIUM_OCTEON |
Leonid Yegoshin | 1e321fa | 2015-05-14 18:34:43 -0700 | [diff] [blame] | 2129 | depends on !MIPS_VA_BITS_48 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2130 | help |
| 2131 | Using 8kB page size will result in higher performance kernel at |
| 2132 | the price of higher memory consumption. This option is available |
Paul Burton | c2aeaae | 2019-07-22 22:00:03 +0000 | [diff] [blame] | 2133 | only on cnMIPS processors. Note that you will need a suitable Linux |
| 2134 | distribution to support this. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2135 | |
| 2136 | config PAGE_SIZE_16KB |
| 2137 | bool "16kB" |
Thomas Bogendoerfer | 455481f | 2022-02-22 10:04:28 +0100 | [diff] [blame] | 2138 | depends on !CPU_R3000 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2139 | help |
| 2140 | Using 16kB page size will result in higher performance kernel at |
| 2141 | the price of higher memory consumption. This option is available on |
Ralf Baechle | 714bfad | 2006-05-17 14:04:30 +0100 | [diff] [blame] | 2142 | all non-R3000 family processors. Note that you will need a suitable |
| 2143 | Linux distribution to support this. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2144 | |
Ralf Baechle | c52399b | 2009-04-02 14:07:10 +0200 | [diff] [blame] | 2145 | config PAGE_SIZE_32KB |
| 2146 | bool "32kB" |
| 2147 | depends on CPU_CAVIUM_OCTEON |
Leonid Yegoshin | 1e321fa | 2015-05-14 18:34:43 -0700 | [diff] [blame] | 2148 | depends on !MIPS_VA_BITS_48 |
Ralf Baechle | c52399b | 2009-04-02 14:07:10 +0200 | [diff] [blame] | 2149 | help |
| 2150 | Using 32kB page size will result in higher performance kernel at |
| 2151 | the price of higher memory consumption. This option is available |
| 2152 | only on cnMIPS cores. Note that you will need a suitable Linux |
| 2153 | distribution to support this. |
| 2154 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2155 | config PAGE_SIZE_64KB |
| 2156 | bool "64kB" |
Thomas Bogendoerfer | 455481f | 2022-02-22 10:04:28 +0100 | [diff] [blame] | 2157 | depends on !CPU_R3000 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2158 | help |
| 2159 | Using 64kB page size will result in higher performance kernel at |
| 2160 | the price of higher memory consumption. This option is available on |
| 2161 | all non-R3000 family processor. Not that at the time of this |
Ralf Baechle | 714bfad | 2006-05-17 14:04:30 +0100 | [diff] [blame] | 2162 | writing this option is still high experimental. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2163 | |
| 2164 | endchoice |
| 2165 | |
David Daney | c9bace7 | 2010-10-11 14:52:45 -0700 | [diff] [blame] | 2166 | config FORCE_MAX_ZONEORDER |
| 2167 | int "Maximum zone order" |
Alex Smith | e4362d1 | 2014-01-21 11:22:35 +0000 | [diff] [blame] | 2168 | range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB |
| 2169 | default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB |
| 2170 | range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB |
| 2171 | default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB |
| 2172 | range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB |
| 2173 | default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB |
Paul Cercueil | ef923a7 | 2020-09-17 15:35:28 +0200 | [diff] [blame] | 2174 | range 0 64 |
David Daney | c9bace7 | 2010-10-11 14:52:45 -0700 | [diff] [blame] | 2175 | default "11" |
| 2176 | help |
| 2177 | The kernel memory allocator divides physically contiguous memory |
| 2178 | blocks into "zones", where each zone is a power of two number of |
| 2179 | pages. This option selects the largest power of two that the kernel |
| 2180 | keeps in the memory allocator. If you need to allocate very large |
| 2181 | blocks of physically contiguous memory, then you may need to |
| 2182 | increase this value. |
| 2183 | |
| 2184 | This config option is actually maximum order plus one. For example, |
| 2185 | a value of 11 means that the largest free memory block is 2^10 pages. |
| 2186 | |
| 2187 | The page size is not necessarily 4KB. Keep this in mind |
| 2188 | when choosing a value for this option. |
| 2189 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2190 | config BOARD_SCACHE |
| 2191 | bool |
| 2192 | |
| 2193 | config IP22_CPU_SCACHE |
| 2194 | bool |
| 2195 | select BOARD_SCACHE |
| 2196 | |
Chris Dearman | 9318c51 | 2006-06-20 17:15:20 +0100 | [diff] [blame] | 2197 | # |
| 2198 | # Support for a MIPS32 / MIPS64 style S-caches |
| 2199 | # |
| 2200 | config MIPS_CPU_SCACHE |
| 2201 | bool |
| 2202 | select BOARD_SCACHE |
| 2203 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2204 | config R5000_CPU_SCACHE |
| 2205 | bool |
| 2206 | select BOARD_SCACHE |
| 2207 | |
| 2208 | config RM7000_CPU_SCACHE |
| 2209 | bool |
| 2210 | select BOARD_SCACHE |
| 2211 | |
| 2212 | config SIBYTE_DMA_PAGEOPS |
| 2213 | bool "Use DMA to clear/copy pages" |
| 2214 | depends on CPU_SB1 |
| 2215 | help |
| 2216 | Instead of using the CPU to zero and copy pages, use a Data Mover |
| 2217 | channel. These DMA channels are otherwise unused by the standard |
| 2218 | SiByte Linux port. Seems to give a small performance benefit. |
| 2219 | |
| 2220 | config CPU_HAS_PREFETCH |
Ralf Baechle | c8094b5 | 2005-08-05 14:28:54 +0000 | [diff] [blame] | 2221 | bool |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2222 | |
Florian Fainelli | 3165c84 | 2012-01-31 18:18:43 +0100 | [diff] [blame] | 2223 | config CPU_GENERIC_DUMP_TLB |
| 2224 | bool |
Thomas Bogendoerfer | 455481f | 2022-02-22 10:04:28 +0100 | [diff] [blame] | 2225 | default y if !CPU_R3000 |
Florian Fainelli | 3165c84 | 2012-01-31 18:18:43 +0100 | [diff] [blame] | 2226 | |
Paul Burton | c92e47e | 2018-11-07 23:14:02 +0000 | [diff] [blame] | 2227 | config MIPS_FP_SUPPORT |
Paul Burton | 183b40f | 2018-11-07 23:14:11 +0000 | [diff] [blame] | 2228 | bool "Floating Point support" if EXPERT |
| 2229 | default y |
| 2230 | help |
| 2231 | Select y to include support for floating point in the kernel |
| 2232 | including initialization of FPU hardware, FP context save & restore |
| 2233 | and emulation of an FPU where necessary. Without this support any |
| 2234 | userland program attempting to use floating point instructions will |
| 2235 | receive a SIGILL. |
| 2236 | |
| 2237 | If you know that your userland will not attempt to use floating point |
| 2238 | instructions then you can say n here to shrink the kernel a little. |
| 2239 | |
| 2240 | If unsure, say y. |
Paul Burton | c92e47e | 2018-11-07 23:14:02 +0000 | [diff] [blame] | 2241 | |
Paul Burton | 97f7dcb | 2018-11-07 23:14:02 +0000 | [diff] [blame] | 2242 | config CPU_R2300_FPU |
| 2243 | bool |
Paul Burton | c92e47e | 2018-11-07 23:14:02 +0000 | [diff] [blame] | 2244 | depends on MIPS_FP_SUPPORT |
Thomas Bogendoerfer | 455481f | 2022-02-22 10:04:28 +0100 | [diff] [blame] | 2245 | default y if CPU_R3000 |
Paul Burton | 97f7dcb | 2018-11-07 23:14:02 +0000 | [diff] [blame] | 2246 | |
Paul Burton | 5474682 | 2019-08-31 15:40:43 +0000 | [diff] [blame] | 2247 | config CPU_R3K_TLB |
| 2248 | bool |
| 2249 | |
Florian Fainelli | 91405eb | 2012-01-31 18:18:44 +0100 | [diff] [blame] | 2250 | config CPU_R4K_FPU |
| 2251 | bool |
Paul Burton | c92e47e | 2018-11-07 23:14:02 +0000 | [diff] [blame] | 2252 | depends on MIPS_FP_SUPPORT |
Paul Burton | 97f7dcb | 2018-11-07 23:14:02 +0000 | [diff] [blame] | 2253 | default y if !CPU_R2300_FPU |
Florian Fainelli | 91405eb | 2012-01-31 18:18:44 +0100 | [diff] [blame] | 2254 | |
Florian Fainelli | 62cedc4 | 2012-01-31 18:18:45 +0100 | [diff] [blame] | 2255 | config CPU_R4K_CACHE_TLB |
| 2256 | bool |
Paul Burton | 5474682 | 2019-08-31 15:40:43 +0000 | [diff] [blame] | 2257 | default y if !(CPU_R3K_TLB || CPU_SB1 || CPU_CAVIUM_OCTEON) |
Florian Fainelli | 62cedc4 | 2012-01-31 18:18:45 +0100 | [diff] [blame] | 2258 | |
Ralf Baechle | 59d6ab8 | 2006-10-06 17:36:20 +0100 | [diff] [blame] | 2259 | config MIPS_MT_SMP |
Markos Chandras | a92b7f8 | 2014-04-08 11:59:10 +0100 | [diff] [blame] | 2260 | bool "MIPS MT SMP support (1 TC on each available VPE)" |
Paul Burton | 5cbf968 | 2017-08-07 16:01:16 -0700 | [diff] [blame] | 2261 | default y |
Paul Burton | 527f102 | 2017-08-07 16:18:04 -0700 | [diff] [blame] | 2262 | depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS |
Ralf Baechle | 59d6ab8 | 2006-10-06 17:36:20 +0100 | [diff] [blame] | 2263 | select CPU_MIPSR2_IRQ_VI |
Chris Dearman | d725cf3 | 2007-05-08 14:05:39 +0100 | [diff] [blame] | 2264 | select CPU_MIPSR2_IRQ_EI |
Steven J. Hill | c080faa | 2013-10-04 16:23:28 -0500 | [diff] [blame] | 2265 | select SYNC_R4K |
Ralf Baechle | 59d6ab8 | 2006-10-06 17:36:20 +0100 | [diff] [blame] | 2266 | select MIPS_MT |
| 2267 | select SMP |
Ralf Baechle | 87353d8 | 2007-11-19 12:23:51 +0000 | [diff] [blame] | 2268 | select SMP_UP |
Steven J. Hill | c080faa | 2013-10-04 16:23:28 -0500 | [diff] [blame] | 2269 | select SYS_SUPPORTS_SMP |
| 2270 | select SYS_SUPPORTS_SCHED_SMT |
Al Cooper | 399aaa2 | 2012-07-13 16:44:53 -0400 | [diff] [blame] | 2271 | select MIPS_PERF_SHARED_TC_COUNTERS |
Ralf Baechle | 59d6ab8 | 2006-10-06 17:36:20 +0100 | [diff] [blame] | 2272 | help |
Steven J. Hill | c080faa | 2013-10-04 16:23:28 -0500 | [diff] [blame] | 2273 | This is a kernel model which is known as SMVP. This is supported |
| 2274 | on cores with the MT ASE and uses the available VPEs to implement |
| 2275 | virtual processors which supports SMP. This is equivalent to the |
| 2276 | Intel Hyperthreading feature. For further information go to |
| 2277 | <http://www.imgtec.com/mips/mips-multithreading.asp>. |
Ralf Baechle | 59d6ab8 | 2006-10-06 17:36:20 +0100 | [diff] [blame] | 2278 | |
Ralf Baechle | f41ae0b | 2006-06-05 17:24:46 +0100 | [diff] [blame] | 2279 | config MIPS_MT |
| 2280 | bool |
| 2281 | |
Ralf Baechle | 0ab7aef | 2007-03-02 20:42:04 +0000 | [diff] [blame] | 2282 | config SCHED_SMT |
| 2283 | bool "SMT (multithreading) scheduler support" |
| 2284 | depends on SYS_SUPPORTS_SCHED_SMT |
| 2285 | default n |
| 2286 | help |
| 2287 | SMT scheduler support improves the CPU scheduler's decision making |
| 2288 | when dealing with MIPS MT enabled cores at a cost of slightly |
| 2289 | increased overhead in some places. If unsure say N here. |
| 2290 | |
| 2291 | config SYS_SUPPORTS_SCHED_SMT |
| 2292 | bool |
| 2293 | |
Ralf Baechle | f41ae0b | 2006-06-05 17:24:46 +0100 | [diff] [blame] | 2294 | config SYS_SUPPORTS_MULTITHREADING |
| 2295 | bool |
| 2296 | |
Ralf Baechle | f088fc8 | 2006-04-05 09:45:47 +0100 | [diff] [blame] | 2297 | config MIPS_MT_FPAFF |
| 2298 | bool "Dynamic FPU affinity for FP-intensive threads" |
Ralf Baechle | f088fc8 | 2006-04-05 09:45:47 +0100 | [diff] [blame] | 2299 | default y |
Ralf Baechle | b633648 | 2014-05-23 16:29:44 +0200 | [diff] [blame] | 2300 | depends on MIPS_MT_SMP |
Ralf Baechle | 07cc0c9 | 2007-07-27 19:31:10 +0100 | [diff] [blame] | 2301 | |
Leonid Yegoshin | b0a668f | 2014-12-03 15:47:03 +0000 | [diff] [blame] | 2302 | config MIPSR2_TO_R6_EMULATOR |
| 2303 | bool "MIPS R2-to-R6 emulator" |
Paul Burton | 9eaa9a8 | 2016-10-17 15:34:37 +0100 | [diff] [blame] | 2304 | depends on CPU_MIPSR6 |
Paul Burton | c92e47e | 2018-11-07 23:14:02 +0000 | [diff] [blame] | 2305 | depends on MIPS_FP_SUPPORT |
Leonid Yegoshin | b0a668f | 2014-12-03 15:47:03 +0000 | [diff] [blame] | 2306 | default y |
| 2307 | help |
| 2308 | Choose this option if you want to run non-R6 MIPS userland code. |
| 2309 | Even if you say 'Y' here, the emulator will still be disabled by |
Markos Chandras | 07edf0d | 2015-03-10 12:30:56 +0000 | [diff] [blame] | 2310 | default. You can enable it using the 'mipsr2emu' kernel option. |
Leonid Yegoshin | b0a668f | 2014-12-03 15:47:03 +0000 | [diff] [blame] | 2311 | The only reason this is a build-time option is to save ~14K from the |
| 2312 | final kernel image. |
Leonid Yegoshin | b0a668f | 2014-12-03 15:47:03 +0000 | [diff] [blame] | 2313 | |
James Hogan | f35764e | 2018-01-15 20:54:35 +0000 | [diff] [blame] | 2314 | config SYS_SUPPORTS_VPE_LOADER |
| 2315 | bool |
| 2316 | depends on SYS_SUPPORTS_MULTITHREADING |
| 2317 | help |
| 2318 | Indicates that the platform supports the VPE loader, and provides |
| 2319 | physical_memsize. |
| 2320 | |
Ralf Baechle | 07cc0c9 | 2007-07-27 19:31:10 +0100 | [diff] [blame] | 2321 | config MIPS_VPE_LOADER |
| 2322 | bool "VPE loader support." |
James Hogan | f35764e | 2018-01-15 20:54:35 +0000 | [diff] [blame] | 2323 | depends on SYS_SUPPORTS_VPE_LOADER && MODULES |
Ralf Baechle | 07cc0c9 | 2007-07-27 19:31:10 +0100 | [diff] [blame] | 2324 | select CPU_MIPSR2_IRQ_VI |
| 2325 | select CPU_MIPSR2_IRQ_EI |
Ralf Baechle | 07cc0c9 | 2007-07-27 19:31:10 +0100 | [diff] [blame] | 2326 | select MIPS_MT |
| 2327 | help |
| 2328 | Includes a loader for loading an elf relocatable object |
| 2329 | onto another VPE and running it. |
Ralf Baechle | f088fc8 | 2006-04-05 09:45:47 +0100 | [diff] [blame] | 2330 | |
Deng-Cheng Zhu | 17a1d52 | 2013-10-30 15:52:07 -0500 | [diff] [blame] | 2331 | config MIPS_VPE_LOADER_CMP |
| 2332 | bool |
| 2333 | default "y" |
| 2334 | depends on MIPS_VPE_LOADER && MIPS_CMP |
| 2335 | |
Deng-Cheng Zhu | 1a2a6d7 | 2013-10-30 15:52:06 -0500 | [diff] [blame] | 2336 | config MIPS_VPE_LOADER_MT |
| 2337 | bool |
| 2338 | default "y" |
| 2339 | depends on MIPS_VPE_LOADER && !MIPS_CMP |
| 2340 | |
Ralf Baechle | e01402b | 2005-07-14 15:57:16 +0000 | [diff] [blame] | 2341 | config MIPS_VPE_LOADER_TOM |
| 2342 | bool "Load VPE program into memory hidden from linux" |
| 2343 | depends on MIPS_VPE_LOADER |
| 2344 | default y |
| 2345 | help |
| 2346 | The loader can use memory that is present but has been hidden from |
| 2347 | Linux using the kernel command line option "mem=xxMB". It's up to |
| 2348 | you to ensure the amount you put in the option and the space your |
| 2349 | program requires is less or equal to the amount physically present. |
| 2350 | |
Ralf Baechle | e01402b | 2005-07-14 15:57:16 +0000 | [diff] [blame] | 2351 | config MIPS_VPE_APSP_API |
Ralf Baechle | 5e83d43 | 2005-10-29 19:32:41 +0100 | [diff] [blame] | 2352 | bool "Enable support for AP/SP API (RTLX)" |
| 2353 | depends on MIPS_VPE_LOADER |
Ralf Baechle | e01402b | 2005-07-14 15:57:16 +0000 | [diff] [blame] | 2354 | |
Deng-Cheng Zhu | da615cf | 2014-01-01 16:29:03 +0100 | [diff] [blame] | 2355 | config MIPS_VPE_APSP_API_CMP |
| 2356 | bool |
| 2357 | default "y" |
| 2358 | depends on MIPS_VPE_APSP_API && MIPS_CMP |
| 2359 | |
Deng-Cheng Zhu | 2c973ef | 2014-01-01 16:26:46 +0100 | [diff] [blame] | 2360 | config MIPS_VPE_APSP_API_MT |
| 2361 | bool |
| 2362 | default "y" |
| 2363 | depends on MIPS_VPE_APSP_API && !MIPS_CMP |
| 2364 | |
Ralf Baechle | 4a16ff4 | 2008-10-04 00:06:29 +0100 | [diff] [blame] | 2365 | config MIPS_CMP |
Paul Burton | 5cac93b | 2014-01-15 10:32:00 +0000 | [diff] [blame] | 2366 | bool "MIPS CMP framework support (DEPRECATED)" |
Markos Chandras | 5676319 | 2015-07-09 10:40:38 +0100 | [diff] [blame] | 2367 | depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6 |
Markos Chandras | b10b43b | 2014-07-22 09:29:34 +0100 | [diff] [blame] | 2368 | select SMP |
Tim Anderson | eb9b514 | 2009-06-17 16:40:34 -0700 | [diff] [blame] | 2369 | select SYNC_R4K |
Markos Chandras | b10b43b | 2014-07-22 09:29:34 +0100 | [diff] [blame] | 2370 | select SYS_SUPPORTS_SMP |
Ralf Baechle | 4a16ff4 | 2008-10-04 00:06:29 +0100 | [diff] [blame] | 2371 | select WEAK_ORDERING |
| 2372 | default n |
| 2373 | help |
Paul Burton | 044505c | 2014-01-15 10:31:58 +0000 | [diff] [blame] | 2374 | Select this if you are using a bootloader which implements the "CMP |
| 2375 | framework" protocol (ie. YAMON) and want your kernel to make use of |
| 2376 | its ability to start secondary CPUs. |
Ralf Baechle | 4a16ff4 | 2008-10-04 00:06:29 +0100 | [diff] [blame] | 2377 | |
Paul Burton | 5cac93b | 2014-01-15 10:32:00 +0000 | [diff] [blame] | 2378 | Unless you have a specific need, you should use CONFIG_MIPS_CPS |
| 2379 | instead of this. |
| 2380 | |
Paul Burton | 0ee958e | 2014-01-15 10:31:53 +0000 | [diff] [blame] | 2381 | config MIPS_CPS |
| 2382 | bool "MIPS Coherent Processing System support" |
Paul Burton | 5a3e7c0 | 2016-02-03 03:15:33 +0000 | [diff] [blame] | 2383 | depends on SYS_SUPPORTS_MIPS_CPS |
Paul Burton | 0ee958e | 2014-01-15 10:31:53 +0000 | [diff] [blame] | 2384 | select MIPS_CM |
Paul Burton | 1d8f1f5 | 2014-04-14 14:13:57 +0100 | [diff] [blame] | 2385 | select MIPS_CPS_PM if HOTPLUG_CPU |
Paul Burton | 0ee958e | 2014-01-15 10:31:53 +0000 | [diff] [blame] | 2386 | select SMP |
| 2387 | select SYNC_R4K if (CEVT_R4K || CSRC_R4K) |
Paul Burton | 1d8f1f5 | 2014-04-14 14:13:57 +0100 | [diff] [blame] | 2388 | select SYS_SUPPORTS_HOTPLUG_CPU |
Paul Burton | c8b7712 | 2017-06-02 14:48:52 -0700 | [diff] [blame] | 2389 | select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6 |
Paul Burton | 0ee958e | 2014-01-15 10:31:53 +0000 | [diff] [blame] | 2390 | select SYS_SUPPORTS_SMP |
| 2391 | select WEAK_ORDERING |
Wei Li | d8d3276 | 2020-12-03 14:54:43 +0800 | [diff] [blame] | 2392 | select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU |
Paul Burton | 0ee958e | 2014-01-15 10:31:53 +0000 | [diff] [blame] | 2393 | help |
| 2394 | Select this if you wish to run an SMP kernel across multiple cores |
| 2395 | within a MIPS Coherent Processing System. When this option is |
| 2396 | enabled the kernel will probe for other cores and boot them with |
| 2397 | no external assistance. It is safe to enable this when hardware |
| 2398 | support is unavailable. |
| 2399 | |
Paul Burton | 3179d37 | 2014-04-14 11:00:56 +0100 | [diff] [blame] | 2400 | config MIPS_CPS_PM |
Markos Chandras | 39a5959 | 2014-09-18 16:09:49 +0100 | [diff] [blame] | 2401 | depends on MIPS_CPS |
Paul Burton | 3179d37 | 2014-04-14 11:00:56 +0100 | [diff] [blame] | 2402 | bool |
| 2403 | |
Paul Burton | 9f98f3d | 2014-01-15 10:31:51 +0000 | [diff] [blame] | 2404 | config MIPS_CM |
| 2405 | bool |
Paul Burton | 3c9b416 | 2017-08-12 19:49:42 -0700 | [diff] [blame] | 2406 | select MIPS_CPC |
Paul Burton | 9f98f3d | 2014-01-15 10:31:51 +0000 | [diff] [blame] | 2407 | |
Paul Burton | 9c38cf4 | 2014-01-15 10:31:52 +0000 | [diff] [blame] | 2408 | config MIPS_CPC |
| 2409 | bool |
Ralf Baechle | 2600990 | 2006-04-05 09:45:45 +0100 | [diff] [blame] | 2410 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2411 | config SB1_PASS_2_WORKAROUNDS |
| 2412 | bool |
| 2413 | depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2) |
| 2414 | default y |
| 2415 | |
| 2416 | config SB1_PASS_2_1_WORKAROUNDS |
| 2417 | bool |
| 2418 | depends on CPU_SB1 && CPU_SB1_PASS_2 |
| 2419 | default y |
| 2420 | |
Markos Chandras | 9e2b537 | 2014-07-21 08:46:14 +0100 | [diff] [blame] | 2421 | choice |
| 2422 | prompt "SmartMIPS or microMIPS ASE support" |
| 2423 | |
| 2424 | config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS |
| 2425 | bool "None" |
| 2426 | help |
| 2427 | Select this if you want neither microMIPS nor SmartMIPS support |
| 2428 | |
Franck Bui-Huu | 9693a85 | 2007-02-02 17:41:47 +0100 | [diff] [blame] | 2429 | config CPU_HAS_SMARTMIPS |
| 2430 | depends on SYS_SUPPORTS_SMARTMIPS |
Markos Chandras | 9e2b537 | 2014-07-21 08:46:14 +0100 | [diff] [blame] | 2431 | bool "SmartMIPS" |
Franck Bui-Huu | 9693a85 | 2007-02-02 17:41:47 +0100 | [diff] [blame] | 2432 | help |
| 2433 | SmartMIPS is a extension of the MIPS32 architecture aimed at |
| 2434 | increased security at both hardware and software level for |
| 2435 | smartcards. Enabling this option will allow proper use of the |
| 2436 | SmartMIPS instructions by Linux applications. However a kernel with |
| 2437 | this option will not work on a MIPS core without SmartMIPS core. If |
| 2438 | you don't know you probably don't have SmartMIPS and should say N |
| 2439 | here. |
| 2440 | |
Steven J. Hill | bce8608 | 2013-03-25 13:27:11 -0500 | [diff] [blame] | 2441 | config CPU_MICROMIPS |
Leonid Yegoshin | 7fd08ca | 2014-10-27 10:34:11 +0000 | [diff] [blame] | 2442 | depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6 |
Markos Chandras | 9e2b537 | 2014-07-21 08:46:14 +0100 | [diff] [blame] | 2443 | bool "microMIPS" |
Steven J. Hill | bce8608 | 2013-03-25 13:27:11 -0500 | [diff] [blame] | 2444 | help |
| 2445 | When this option is enabled the kernel will be built using the |
| 2446 | microMIPS ISA |
| 2447 | |
Markos Chandras | 9e2b537 | 2014-07-21 08:46:14 +0100 | [diff] [blame] | 2448 | endchoice |
| 2449 | |
Paul Burton | a5e9a69 | 2014-01-27 15:23:10 +0000 | [diff] [blame] | 2450 | config CPU_HAS_MSA |
Paul Burton | 0ce3417 | 2015-07-27 12:58:27 -0700 | [diff] [blame] | 2451 | bool "Support for the MIPS SIMD Architecture" |
Paul Burton | a5e9a69 | 2014-01-27 15:23:10 +0000 | [diff] [blame] | 2452 | depends on CPU_SUPPORTS_MSA |
Paul Burton | c92e47e | 2018-11-07 23:14:02 +0000 | [diff] [blame] | 2453 | depends on MIPS_FP_SUPPORT |
Paul Burton | 2a6cb669 | 2014-07-11 16:47:14 +0100 | [diff] [blame] | 2454 | depends on 64BIT || MIPS_O32_FP64_SUPPORT |
Paul Burton | a5e9a69 | 2014-01-27 15:23:10 +0000 | [diff] [blame] | 2455 | help |
| 2456 | MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers |
| 2457 | and a set of SIMD instructions to operate on them. When this option |
Paul Burton | 1db1af8 | 2014-01-27 15:23:11 +0000 | [diff] [blame] | 2458 | is enabled the kernel will support allocating & switching MSA |
| 2459 | vector register contexts. If you know that your kernel will only be |
| 2460 | running on CPUs which do not support MSA or that your userland will |
| 2461 | not be making use of it then you may wish to say N here to reduce |
| 2462 | the size & complexity of your kernel. |
Paul Burton | a5e9a69 | 2014-01-27 15:23:10 +0000 | [diff] [blame] | 2463 | |
| 2464 | If unsure, say Y. |
| 2465 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2466 | config CPU_HAS_WB |
Ralf Baechle | f7062dd | 2006-04-24 14:58:53 +0100 | [diff] [blame] | 2467 | bool |
Ralf Baechle | e01402b | 2005-07-14 15:57:16 +0000 | [diff] [blame] | 2468 | |
Kevin Cernekee | df0ac8a | 2011-11-16 01:25:45 +0000 | [diff] [blame] | 2469 | config XKS01 |
| 2470 | bool |
| 2471 | |
Jiaxun Yang | ba9196d | 2020-01-13 18:14:59 +0800 | [diff] [blame] | 2472 | config CPU_HAS_DIEI |
| 2473 | depends on !CPU_DIEI_BROKEN |
| 2474 | bool |
| 2475 | |
| 2476 | config CPU_DIEI_BROKEN |
| 2477 | bool |
| 2478 | |
Florian Fainelli | 8256b17 | 2016-02-09 12:55:51 -0800 | [diff] [blame] | 2479 | config CPU_HAS_RIXI |
| 2480 | bool |
| 2481 | |
Alexander Lobakin | 18d84e2e | 2020-01-22 13:58:50 +0300 | [diff] [blame] | 2482 | config CPU_NO_LOAD_STORE_LR |
Yasha Cherikovsky | 932afde | 2018-09-26 14:16:15 +0300 | [diff] [blame] | 2483 | bool |
| 2484 | help |
Alexander Lobakin | 18d84e2e | 2020-01-22 13:58:50 +0300 | [diff] [blame] | 2485 | CPU lacks support for unaligned load and store instructions: |
Yasha Cherikovsky | 932afde | 2018-09-26 14:16:15 +0300 | [diff] [blame] | 2486 | LWL, LWR, SWL, SWR (Load/store word left/right). |
Alexander Lobakin | 18d84e2e | 2020-01-22 13:58:50 +0300 | [diff] [blame] | 2487 | LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit |
| 2488 | systems). |
Yasha Cherikovsky | 932afde | 2018-09-26 14:16:15 +0300 | [diff] [blame] | 2489 | |
Ralf Baechle | f41ae0b | 2006-06-05 17:24:46 +0100 | [diff] [blame] | 2490 | # |
| 2491 | # Vectored interrupt mode is an R2 feature |
| 2492 | # |
Ralf Baechle | e01402b | 2005-07-14 15:57:16 +0000 | [diff] [blame] | 2493 | config CPU_MIPSR2_IRQ_VI |
Ralf Baechle | f41ae0b | 2006-06-05 17:24:46 +0100 | [diff] [blame] | 2494 | bool |
Ralf Baechle | e01402b | 2005-07-14 15:57:16 +0000 | [diff] [blame] | 2495 | |
Ralf Baechle | f41ae0b | 2006-06-05 17:24:46 +0100 | [diff] [blame] | 2496 | # |
| 2497 | # Extended interrupt mode is an R2 feature |
| 2498 | # |
Ralf Baechle | e01402b | 2005-07-14 15:57:16 +0000 | [diff] [blame] | 2499 | config CPU_MIPSR2_IRQ_EI |
Ralf Baechle | f41ae0b | 2006-06-05 17:24:46 +0100 | [diff] [blame] | 2500 | bool |
Ralf Baechle | e01402b | 2005-07-14 15:57:16 +0000 | [diff] [blame] | 2501 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2502 | config CPU_HAS_SYNC |
| 2503 | bool |
| 2504 | depends on !CPU_R3000 |
| 2505 | default y |
| 2506 | |
| 2507 | # |
Maciej W. Rozycki | 20d60d9 | 2007-10-23 12:43:11 +0100 | [diff] [blame] | 2508 | # CPU non-features |
| 2509 | # |
Thomas Bogendoerfer | b56d1ca | 2022-02-18 11:04:39 +0100 | [diff] [blame] | 2510 | |
| 2511 | # Work around the "daddi" and "daddiu" CPU errata: |
| 2512 | # |
| 2513 | # - The `daddi' instruction fails to trap on overflow. |
| 2514 | # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0", |
| 2515 | # erratum #23 |
| 2516 | # |
| 2517 | # - The `daddiu' instruction can produce an incorrect result. |
| 2518 | # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0", |
| 2519 | # erratum #41 |
| 2520 | # "MIPS R4000MC Errata, Processor Revision 2.2 and 3.0", erratum |
| 2521 | # #15 |
| 2522 | # "MIPS R4400PC/SC Errata, Processor Revision 1.0", erratum #7 |
| 2523 | # "MIPS R4400MC Errata, Processor Revision 1.0", erratum #5 |
Maciej W. Rozycki | 20d60d9 | 2007-10-23 12:43:11 +0100 | [diff] [blame] | 2524 | config CPU_DADDI_WORKAROUNDS |
| 2525 | bool |
| 2526 | |
Thomas Bogendoerfer | b56d1ca | 2022-02-18 11:04:39 +0100 | [diff] [blame] | 2527 | # Work around certain R4000 CPU errata (as implemented by GCC): |
| 2528 | # |
| 2529 | # - A double-word or a variable shift may give an incorrect result |
| 2530 | # if executed immediately after starting an integer division: |
| 2531 | # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0", |
| 2532 | # erratum #28 |
| 2533 | # "MIPS R4000MC Errata, Processor Revision 2.2 and 3.0", erratum |
| 2534 | # #19 |
| 2535 | # |
| 2536 | # - A double-word or a variable shift may give an incorrect result |
| 2537 | # if executed while an integer multiplication is in progress: |
| 2538 | # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0", |
| 2539 | # errata #16 & #28 |
| 2540 | # |
| 2541 | # - An integer division may give an incorrect result if started in |
| 2542 | # a delay slot of a taken branch or a jump: |
| 2543 | # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0", |
| 2544 | # erratum #52 |
Maciej W. Rozycki | 20d60d9 | 2007-10-23 12:43:11 +0100 | [diff] [blame] | 2545 | config CPU_R4000_WORKAROUNDS |
| 2546 | bool |
| 2547 | select CPU_R4400_WORKAROUNDS |
| 2548 | |
Thomas Bogendoerfer | b56d1ca | 2022-02-18 11:04:39 +0100 | [diff] [blame] | 2549 | # Work around certain R4400 CPU errata (as implemented by GCC): |
| 2550 | # |
| 2551 | # - A double-word or a variable shift may give an incorrect result |
| 2552 | # if executed immediately after starting an integer division: |
| 2553 | # "MIPS R4400MC Errata, Processor Revision 1.0", erratum #10 |
| 2554 | # "MIPS R4400MC Errata, Processor Revision 2.0 & 3.0", erratum #4 |
Maciej W. Rozycki | 20d60d9 | 2007-10-23 12:43:11 +0100 | [diff] [blame] | 2555 | config CPU_R4400_WORKAROUNDS |
| 2556 | bool |
| 2557 | |
Paul Burton | 071d2f0 | 2019-10-01 23:04:32 +0000 | [diff] [blame] | 2558 | config CPU_R4X00_BUGS64 |
| 2559 | bool |
| 2560 | default y if SYS_HAS_CPU_R4X00 && 64BIT && (TARGET_ISA_REV < 1) |
| 2561 | |
Paul Burton | 4edf00a | 2016-05-06 14:36:23 +0100 | [diff] [blame] | 2562 | config MIPS_ASID_SHIFT |
| 2563 | int |
Thomas Bogendoerfer | 455481f | 2022-02-22 10:04:28 +0100 | [diff] [blame] | 2564 | default 6 if CPU_R3000 |
Paul Burton | 4edf00a | 2016-05-06 14:36:23 +0100 | [diff] [blame] | 2565 | default 0 |
| 2566 | |
| 2567 | config MIPS_ASID_BITS |
| 2568 | int |
Paul Burton | 2db003a | 2016-05-06 14:36:24 +0100 | [diff] [blame] | 2569 | default 0 if MIPS_ASID_BITS_VARIABLE |
Thomas Bogendoerfer | 455481f | 2022-02-22 10:04:28 +0100 | [diff] [blame] | 2570 | default 6 if CPU_R3000 |
Paul Burton | 4edf00a | 2016-05-06 14:36:23 +0100 | [diff] [blame] | 2571 | default 8 |
| 2572 | |
Paul Burton | 2db003a | 2016-05-06 14:36:24 +0100 | [diff] [blame] | 2573 | config MIPS_ASID_BITS_VARIABLE |
| 2574 | bool |
| 2575 | |
Marcin Nowakowski | 4a5dc51e | 2018-02-09 22:11:06 +0000 | [diff] [blame] | 2576 | config MIPS_CRC_SUPPORT |
| 2577 | bool |
| 2578 | |
Thomas Bogendoerfer | 802b8362 | 2020-08-24 18:32:43 +0200 | [diff] [blame] | 2579 | # R4600 erratum. Due to the lack of errata information the exact |
| 2580 | # technical details aren't known. I've experimentally found that disabling |
| 2581 | # interrupts during indexed I-cache flushes seems to be sufficient to deal |
| 2582 | # with the issue. |
| 2583 | config WAR_R4600_V1_INDEX_ICACHEOP |
| 2584 | bool |
| 2585 | |
Thomas Bogendoerfer | 5e5b652 | 2020-08-24 18:32:44 +0200 | [diff] [blame] | 2586 | # Pleasures of the R4600 V1.x. Cite from the IDT R4600 V1.7 errata: |
| 2587 | # |
| 2588 | # 18. The CACHE instructions Hit_Writeback_Invalidate_D, Hit_Writeback_D, |
| 2589 | # Hit_Invalidate_D and Create_Dirty_Excl_D should only be |
| 2590 | # executed if there is no other dcache activity. If the dcache is |
Colin Ian King | 18ff14c | 2020-10-27 18:34:30 +0000 | [diff] [blame] | 2591 | # accessed for another instruction immediately preceding when these |
Thomas Bogendoerfer | 5e5b652 | 2020-08-24 18:32:44 +0200 | [diff] [blame] | 2592 | # cache instructions are executing, it is possible that the dcache |
| 2593 | # tag match outputs used by these cache instructions will be |
| 2594 | # incorrect. These cache instructions should be preceded by at least |
| 2595 | # four instructions that are not any kind of load or store |
| 2596 | # instruction. |
| 2597 | # |
| 2598 | # This is not allowed: lw |
| 2599 | # nop |
| 2600 | # nop |
| 2601 | # nop |
| 2602 | # cache Hit_Writeback_Invalidate_D |
| 2603 | # |
| 2604 | # This is allowed: lw |
| 2605 | # nop |
| 2606 | # nop |
| 2607 | # nop |
| 2608 | # nop |
| 2609 | # cache Hit_Writeback_Invalidate_D |
| 2610 | config WAR_R4600_V1_HIT_CACHEOP |
| 2611 | bool |
| 2612 | |
Thomas Bogendoerfer | 44def34 | 2020-08-24 18:32:45 +0200 | [diff] [blame] | 2613 | # Writeback and invalidate the primary cache dcache before DMA. |
| 2614 | # |
| 2615 | # R4600 v2.0 bug: "The CACHE instructions Hit_Writeback_Inv_D, |
| 2616 | # Hit_Writeback_D, Hit_Invalidate_D and Create_Dirty_Exclusive_D will only |
| 2617 | # operate correctly if the internal data cache refill buffer is empty. These |
| 2618 | # CACHE instructions should be separated from any potential data cache miss |
| 2619 | # by a load instruction to an uncached address to empty the response buffer." |
| 2620 | # (Revision 2.0 device errata from IDT available on https://www.idt.com/ |
| 2621 | # in .pdf format.) |
| 2622 | config WAR_R4600_V2_HIT_CACHEOP |
| 2623 | bool |
| 2624 | |
Thomas Bogendoerfer | 24a1c02 | 2020-08-24 18:32:47 +0200 | [diff] [blame] | 2625 | # From TX49/H2 manual: "If the instruction (i.e. CACHE) is issued for |
| 2626 | # the line which this instruction itself exists, the following |
| 2627 | # operation is not guaranteed." |
| 2628 | # |
| 2629 | # Workaround: do two phase flushing for Index_Invalidate_I |
| 2630 | config WAR_TX49XX_ICACHE_INDEX_INV |
| 2631 | bool |
| 2632 | |
Thomas Bogendoerfer | 886ee13 | 2020-08-24 18:32:48 +0200 | [diff] [blame] | 2633 | # The RM7000 processors and the E9000 cores have a bug (though PMC-Sierra |
| 2634 | # opposes it being called that) where invalid instructions in the same |
| 2635 | # I-cache line worth of instructions being fetched may case spurious |
| 2636 | # exceptions. |
| 2637 | config WAR_ICACHE_REFILLS |
| 2638 | bool |
| 2639 | |
Thomas Bogendoerfer | 256ec48 | 2020-08-24 18:32:49 +0200 | [diff] [blame] | 2640 | # On the R10000 up to version 2.6 (not sure about 2.7) there is a bug that |
| 2641 | # may cause ll / sc and lld / scd sequences to execute non-atomically. |
| 2642 | config WAR_R10000_LLSC |
| 2643 | bool |
| 2644 | |
Thomas Bogendoerfer | a7fbed9 | 2020-08-24 18:32:50 +0200 | [diff] [blame] | 2645 | # 34K core erratum: "Problems Executing the TLBR Instruction" |
| 2646 | config WAR_MIPS34K_MISSED_ITLB |
| 2647 | bool |
| 2648 | |
Maciej W. Rozycki | 20d60d9 | 2007-10-23 12:43:11 +0100 | [diff] [blame] | 2649 | # |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2650 | # - Highmem only makes sense for the 32-bit kernel. |
| 2651 | # - The current highmem code will only work properly on physically indexed |
| 2652 | # caches such as R3000, SB1, R7000 or those that look like they're virtually |
| 2653 | # indexed such as R4000/R4400 SC and MC versions or R10000. So for the |
| 2654 | # moment we protect the user and offer the highmem option only on machines |
| 2655 | # where it's known to be safe. This will not offer highmem on a few systems |
| 2656 | # such as MIPS32 and MIPS64 CPUs which may have virtual and physically |
| 2657 | # indexed CPUs but we're playing safe. |
Ralf Baechle | 797798c | 2005-08-10 15:17:11 +0000 | [diff] [blame] | 2658 | # - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we |
| 2659 | # know they might have memory configurations that could make use of highmem |
| 2660 | # support. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2661 | # |
| 2662 | config HIGHMEM |
| 2663 | bool "High Memory Support" |
Leonid Yegoshin | a6e1878 | 2013-12-03 10:22:26 +0000 | [diff] [blame] | 2664 | depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA |
Thomas Gleixner | a4c33e8 | 2020-11-03 10:27:25 +0100 | [diff] [blame] | 2665 | select KMAP_LOCAL |
Ralf Baechle | 797798c | 2005-08-10 15:17:11 +0000 | [diff] [blame] | 2666 | |
| 2667 | config CPU_SUPPORTS_HIGHMEM |
| 2668 | bool |
| 2669 | |
| 2670 | config SYS_SUPPORTS_HIGHMEM |
| 2671 | bool |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2672 | |
Franck Bui-Huu | 9693a85 | 2007-02-02 17:41:47 +0100 | [diff] [blame] | 2673 | config SYS_SUPPORTS_SMARTMIPS |
| 2674 | bool |
| 2675 | |
Steven J. Hill | a6a4834 | 2013-02-05 16:52:02 -0600 | [diff] [blame] | 2676 | config SYS_SUPPORTS_MICROMIPS |
| 2677 | bool |
| 2678 | |
Ralf Baechle | 377cb1b | 2014-04-29 01:49:24 +0200 | [diff] [blame] | 2679 | config SYS_SUPPORTS_MIPS16 |
| 2680 | bool |
| 2681 | help |
| 2682 | This option must be set if a kernel might be executed on a MIPS16- |
| 2683 | enabled CPU even if MIPS16 is not actually being used. In other |
| 2684 | words, it makes the kernel MIPS16-tolerant. |
| 2685 | |
Paul Burton | a5e9a69 | 2014-01-27 15:23:10 +0000 | [diff] [blame] | 2686 | config CPU_SUPPORTS_MSA |
| 2687 | bool |
| 2688 | |
Yoichi Yuasa | b4819b5 | 2005-06-25 14:54:31 -0700 | [diff] [blame] | 2689 | config ARCH_FLATMEM_ENABLE |
| 2690 | def_bool y |
Jiaxun Yang | 268a2d6 | 2019-10-20 22:43:13 +0800 | [diff] [blame] | 2691 | depends on !NUMA && !CPU_LOONGSON2EF |
Yoichi Yuasa | b4819b5 | 2005-06-25 14:54:31 -0700 | [diff] [blame] | 2692 | |
Atsushi Nemoto | b1c6cd4 | 2006-07-03 00:09:47 +0900 | [diff] [blame] | 2693 | config ARCH_SPARSEMEM_ENABLE |
| 2694 | bool |
Mike Rapoport | 397dc00 | 2019-09-16 14:13:10 +0300 | [diff] [blame] | 2695 | select SPARSEMEM_STATIC if !SGI_IP27 |
Atsushi Nemoto | 3147374 | 2006-07-03 00:09:47 +0900 | [diff] [blame] | 2696 | |
Ralf Baechle | d8cb4e1 | 2006-06-11 23:03:08 +0100 | [diff] [blame] | 2697 | config NUMA |
| 2698 | bool "NUMA Support" |
| 2699 | depends on SYS_SUPPORTS_NUMA |
Tiezhu Yang | cf8194e | 2020-12-03 20:32:52 +0800 | [diff] [blame] | 2700 | select SMP |
Kefeng Wang | 7ecd19c | 2022-01-19 18:07:41 -0800 | [diff] [blame] | 2701 | select HAVE_SETUP_PER_CPU_AREA |
| 2702 | select NEED_PER_CPU_EMBED_FIRST_CHUNK |
Ralf Baechle | d8cb4e1 | 2006-06-11 23:03:08 +0100 | [diff] [blame] | 2703 | help |
| 2704 | Say Y to compile the kernel to support NUMA (Non-Uniform Memory |
| 2705 | Access). This option improves performance on systems with more |
| 2706 | than two nodes; on two node systems it is generally better to |
Randy Dunlap | 172a37e | 2020-01-31 17:55:43 -0800 | [diff] [blame] | 2707 | leave it disabled; on single node systems leave this option |
Ralf Baechle | d8cb4e1 | 2006-06-11 23:03:08 +0100 | [diff] [blame] | 2708 | disabled. |
| 2709 | |
| 2710 | config SYS_SUPPORTS_NUMA |
| 2711 | bool |
| 2712 | |
Feiyang Chen | f8f9f21 | 2022-03-19 17:40:02 +0800 | [diff] [blame] | 2713 | config HAVE_ARCH_NODEDATA_EXTENSION |
| 2714 | bool |
| 2715 | |
Matt Redfearn | 8c530ea | 2016-03-31 10:05:39 +0100 | [diff] [blame] | 2716 | config RELOCATABLE |
| 2717 | bool "Relocatable kernel" |
Serge Semin | ab7c01f | 2020-05-21 17:07:14 +0300 | [diff] [blame] | 2718 | depends on SYS_SUPPORTS_RELOCATABLE |
| 2719 | depends on CPU_MIPS32_R2 || CPU_MIPS64_R2 || \ |
| 2720 | CPU_MIPS32_R5 || CPU_MIPS64_R5 || \ |
| 2721 | CPU_MIPS32_R6 || CPU_MIPS64_R6 || \ |
Jinyang He | a307a4c | 2020-11-25 18:07:46 +0800 | [diff] [blame] | 2722 | CPU_P5600 || CAVIUM_OCTEON_SOC || \ |
| 2723 | CPU_LOONGSON64 |
Matt Redfearn | 8c530ea | 2016-03-31 10:05:39 +0100 | [diff] [blame] | 2724 | help |
| 2725 | This builds a kernel image that retains relocation information |
| 2726 | so it can be loaded someplace besides the default 1MB. |
| 2727 | The relocations make the kernel binary about 15% larger, |
| 2728 | but are discarded at runtime |
| 2729 | |
Matt Redfearn | 069fd76 | 2016-03-31 10:05:34 +0100 | [diff] [blame] | 2730 | config RELOCATION_TABLE_SIZE |
| 2731 | hex "Relocation table size" |
| 2732 | depends on RELOCATABLE |
| 2733 | range 0x0 0x01000000 |
Jinyang He | a307a4c | 2020-11-25 18:07:46 +0800 | [diff] [blame] | 2734 | default "0x00200000" if CPU_LOONGSON64 |
Matt Redfearn | 069fd76 | 2016-03-31 10:05:34 +0100 | [diff] [blame] | 2735 | default "0x00100000" |
Masahiro Yamada | a7f7f62 | 2020-06-14 01:50:22 +0900 | [diff] [blame] | 2736 | help |
Matt Redfearn | 069fd76 | 2016-03-31 10:05:34 +0100 | [diff] [blame] | 2737 | A table of relocation data will be appended to the kernel binary |
| 2738 | and parsed at boot to fix up the relocated kernel. |
| 2739 | |
| 2740 | This option allows the amount of space reserved for the table to be |
| 2741 | adjusted, although the default of 1Mb should be ok in most cases. |
| 2742 | |
| 2743 | The build will fail and a valid size suggested if this is too small. |
| 2744 | |
| 2745 | If unsure, leave at the default value. |
| 2746 | |
Matt Redfearn | 405bc8f | 2016-03-31 10:05:41 +0100 | [diff] [blame] | 2747 | config RANDOMIZE_BASE |
| 2748 | bool "Randomize the address of the kernel image" |
| 2749 | depends on RELOCATABLE |
Masahiro Yamada | a7f7f62 | 2020-06-14 01:50:22 +0900 | [diff] [blame] | 2750 | help |
Enrico Weigelt, metux IT consult | 371a415 | 2019-03-11 16:54:27 +0100 | [diff] [blame] | 2751 | Randomizes the physical and virtual address at which the |
| 2752 | kernel image is loaded, as a security feature that |
| 2753 | deters exploit attempts relying on knowledge of the location |
| 2754 | of kernel internals. |
Matt Redfearn | 405bc8f | 2016-03-31 10:05:41 +0100 | [diff] [blame] | 2755 | |
Enrico Weigelt, metux IT consult | 371a415 | 2019-03-11 16:54:27 +0100 | [diff] [blame] | 2756 | Entropy is generated using any coprocessor 0 registers available. |
Matt Redfearn | 405bc8f | 2016-03-31 10:05:41 +0100 | [diff] [blame] | 2757 | |
Enrico Weigelt, metux IT consult | 371a415 | 2019-03-11 16:54:27 +0100 | [diff] [blame] | 2758 | The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET. |
Matt Redfearn | 405bc8f | 2016-03-31 10:05:41 +0100 | [diff] [blame] | 2759 | |
Enrico Weigelt, metux IT consult | 371a415 | 2019-03-11 16:54:27 +0100 | [diff] [blame] | 2760 | If unsure, say N. |
Matt Redfearn | 405bc8f | 2016-03-31 10:05:41 +0100 | [diff] [blame] | 2761 | |
| 2762 | config RANDOMIZE_BASE_MAX_OFFSET |
| 2763 | hex "Maximum kASLR offset" if EXPERT |
| 2764 | depends on RANDOMIZE_BASE |
| 2765 | range 0x0 0x40000000 if EVA || 64BIT |
| 2766 | range 0x0 0x08000000 |
| 2767 | default "0x01000000" |
Masahiro Yamada | a7f7f62 | 2020-06-14 01:50:22 +0900 | [diff] [blame] | 2768 | help |
Matt Redfearn | 405bc8f | 2016-03-31 10:05:41 +0100 | [diff] [blame] | 2769 | When kASLR is active, this provides the maximum offset that will |
| 2770 | be applied to the kernel image. It should be set according to the |
| 2771 | amount of physical RAM available in the target system minus |
| 2772 | PHYSICAL_START and must be a power of 2. |
| 2773 | |
| 2774 | This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with |
| 2775 | EVA or 64-bit. The default is 16Mb. |
| 2776 | |
Yasunori Goto | c80d79d | 2006-04-10 22:53:53 -0700 | [diff] [blame] | 2777 | config NODES_SHIFT |
| 2778 | int |
| 2779 | default "6" |
Mike Rapoport | a9ee6cf | 2021-06-28 19:43:01 -0700 | [diff] [blame] | 2780 | depends on NUMA |
Yasunori Goto | c80d79d | 2006-04-10 22:53:53 -0700 | [diff] [blame] | 2781 | |
Deng-Cheng Zhu | 14f7001 | 2010-10-12 19:37:22 +0800 | [diff] [blame] | 2782 | config HW_PERF_EVENTS |
| 2783 | bool "Enable hardware performance counter support for perf events" |
Thomas Bogendoerfer | 95b8a5e | 2021-10-20 14:49:13 +0200 | [diff] [blame] | 2784 | depends on PERF_EVENTS && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_LOONGSON64) |
Deng-Cheng Zhu | 14f7001 | 2010-10-12 19:37:22 +0800 | [diff] [blame] | 2785 | default y |
| 2786 | help |
| 2787 | Enable hardware performance counter support for perf events. If |
| 2788 | disabled, perf events will use software events only. |
| 2789 | |
Tiezhu Yang | be8fa1c | 2020-02-05 12:08:33 +0800 | [diff] [blame] | 2790 | config DMI |
| 2791 | bool "Enable DMI scanning" |
| 2792 | depends on MACH_LOONGSON64 |
| 2793 | select DMI_SCAN_MACHINE_NON_EFI_FALLBACK |
| 2794 | default y |
| 2795 | help |
| 2796 | Enabled scanning of DMI to identify machine quirks. Say Y |
| 2797 | here unless you have verified that your setup is not |
| 2798 | affected by entries in the DMI blacklist. Required by PNP |
| 2799 | BIOS code. |
| 2800 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2801 | config SMP |
| 2802 | bool "Multi-Processing support" |
Ralf Baechle | e73ea27 | 2006-06-04 11:51:46 +0100 | [diff] [blame] | 2803 | depends on SYS_SUPPORTS_SMP |
| 2804 | help |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2805 | This enables support for systems with more than one CPU. If you have |
Robert Graffham | 4a47415 | 2014-01-23 15:55:29 -0800 | [diff] [blame] | 2806 | a system with only one CPU, say N. If you have a system with more |
| 2807 | than one CPU, say Y. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2808 | |
Robert Graffham | 4a47415 | 2014-01-23 15:55:29 -0800 | [diff] [blame] | 2809 | If you say N here, the kernel will run on uni- and multiprocessor |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2810 | machines, but will use only one CPU of a multiprocessor machine. If |
| 2811 | you say Y here, the kernel will run on many, but not all, |
Robert Graffham | 4a47415 | 2014-01-23 15:55:29 -0800 | [diff] [blame] | 2812 | uniprocessor machines. On a uniprocessor machine, the kernel |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2813 | will run faster if you say N here. |
| 2814 | |
| 2815 | People using multiprocessor machines who say Y here should also say |
| 2816 | Y to "Enhanced Real Time Clock Support", below. |
| 2817 | |
Adrian Bunk | 03502fa | 2008-02-03 15:50:21 +0200 | [diff] [blame] | 2818 | See also the SMP-HOWTO available at |
Alexander A. Klimov | ef054ad | 2020-07-14 21:12:26 +0200 | [diff] [blame] | 2819 | <https://www.tldp.org/docs.html#howto>. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2820 | |
| 2821 | If you don't know what to do here, say N. |
| 2822 | |
Matt Redfearn | 7840d61 | 2016-07-07 08:50:40 +0100 | [diff] [blame] | 2823 | config HOTPLUG_CPU |
| 2824 | bool "Support for hot-pluggable CPUs" |
| 2825 | depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU |
| 2826 | help |
| 2827 | Say Y here to allow turning CPUs off and on. CPUs can be |
| 2828 | controlled through /sys/devices/system/cpu. |
| 2829 | (Note: power management support will enable this option |
| 2830 | automatically on SMP systems. ) |
| 2831 | Say N if you want to disable CPU hotplug. |
| 2832 | |
Ralf Baechle | 87353d8 | 2007-11-19 12:23:51 +0000 | [diff] [blame] | 2833 | config SMP_UP |
| 2834 | bool |
| 2835 | |
Ralf Baechle | 4a16ff4 | 2008-10-04 00:06:29 +0100 | [diff] [blame] | 2836 | config SYS_SUPPORTS_MIPS_CMP |
| 2837 | bool |
| 2838 | |
Paul Burton | 0ee958e | 2014-01-15 10:31:53 +0000 | [diff] [blame] | 2839 | config SYS_SUPPORTS_MIPS_CPS |
| 2840 | bool |
| 2841 | |
Ralf Baechle | e73ea27 | 2006-06-04 11:51:46 +0100 | [diff] [blame] | 2842 | config SYS_SUPPORTS_SMP |
| 2843 | bool |
| 2844 | |
Ralf Baechle | 130e2fb | 2007-02-06 16:53:15 +0000 | [diff] [blame] | 2845 | config NR_CPUS_DEFAULT_4 |
| 2846 | bool |
| 2847 | |
| 2848 | config NR_CPUS_DEFAULT_8 |
| 2849 | bool |
| 2850 | |
| 2851 | config NR_CPUS_DEFAULT_16 |
| 2852 | bool |
| 2853 | |
| 2854 | config NR_CPUS_DEFAULT_32 |
| 2855 | bool |
| 2856 | |
| 2857 | config NR_CPUS_DEFAULT_64 |
| 2858 | bool |
| 2859 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2860 | config NR_CPUS |
Jayachandran C | a91796a | 2014-04-29 20:07:40 +0530 | [diff] [blame] | 2861 | int "Maximum number of CPUs (2-256)" |
| 2862 | range 2 256 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2863 | depends on SMP |
Ralf Baechle | 130e2fb | 2007-02-06 16:53:15 +0000 | [diff] [blame] | 2864 | default "4" if NR_CPUS_DEFAULT_4 |
| 2865 | default "8" if NR_CPUS_DEFAULT_8 |
| 2866 | default "16" if NR_CPUS_DEFAULT_16 |
| 2867 | default "32" if NR_CPUS_DEFAULT_32 |
| 2868 | default "64" if NR_CPUS_DEFAULT_64 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2869 | help |
| 2870 | This allows you to specify the maximum number of CPUs which this |
| 2871 | kernel will support. The maximum supported value is 32 for 32-bit |
| 2872 | kernel and 64 for 64-bit kernels; the minimum value which makes |
Atsushi Nemoto | 72ede9b | 2007-03-18 01:01:39 +0900 | [diff] [blame] | 2873 | sense is 1 for Qemu (useful only for kernel debugging purposes) |
| 2874 | and 2 for all others. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2875 | |
| 2876 | This is purely to save memory - each supported CPU adds |
Atsushi Nemoto | 72ede9b | 2007-03-18 01:01:39 +0900 | [diff] [blame] | 2877 | approximately eight kilobytes to the kernel image. For best |
| 2878 | performance should round up your number of processors to the next |
| 2879 | power of two. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2880 | |
Al Cooper | 399aaa2 | 2012-07-13 16:44:53 -0400 | [diff] [blame] | 2881 | config MIPS_PERF_SHARED_TC_COUNTERS |
| 2882 | bool |
| 2883 | |
David Daney | 7820b84 | 2017-09-28 12:34:04 -0500 | [diff] [blame] | 2884 | config MIPS_NR_CPU_NR_MAP_1024 |
| 2885 | bool |
| 2886 | |
| 2887 | config MIPS_NR_CPU_NR_MAP |
| 2888 | int |
| 2889 | depends on SMP |
| 2890 | default 1024 if MIPS_NR_CPU_NR_MAP_1024 |
| 2891 | default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024 |
| 2892 | |
Atsushi Nemoto | 1723b4a | 2006-06-20 00:19:13 +0900 | [diff] [blame] | 2893 | # |
| 2894 | # Timer Interrupt Frequency Configuration |
| 2895 | # |
| 2896 | |
| 2897 | choice |
| 2898 | prompt "Timer frequency" |
| 2899 | default HZ_250 |
| 2900 | help |
Enrico Weigelt, metux IT consult | 371a415 | 2019-03-11 16:54:27 +0100 | [diff] [blame] | 2901 | Allows the configuration of the timer frequency. |
Atsushi Nemoto | 1723b4a | 2006-06-20 00:19:13 +0900 | [diff] [blame] | 2902 | |
Paul Burton | 6759657 | 2015-09-22 10:16:39 -0700 | [diff] [blame] | 2903 | config HZ_24 |
| 2904 | bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ |
| 2905 | |
Atsushi Nemoto | 1723b4a | 2006-06-20 00:19:13 +0900 | [diff] [blame] | 2906 | config HZ_48 |
Ralf Baechle | 0f87358 | 2008-02-25 16:55:29 +0000 | [diff] [blame] | 2907 | bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ |
Atsushi Nemoto | 1723b4a | 2006-06-20 00:19:13 +0900 | [diff] [blame] | 2908 | |
| 2909 | config HZ_100 |
| 2910 | bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ |
| 2911 | |
| 2912 | config HZ_128 |
| 2913 | bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ |
| 2914 | |
| 2915 | config HZ_250 |
| 2916 | bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ |
| 2917 | |
| 2918 | config HZ_256 |
| 2919 | bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ |
| 2920 | |
| 2921 | config HZ_1000 |
| 2922 | bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ |
| 2923 | |
| 2924 | config HZ_1024 |
| 2925 | bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ |
| 2926 | |
| 2927 | endchoice |
| 2928 | |
Paul Burton | 6759657 | 2015-09-22 10:16:39 -0700 | [diff] [blame] | 2929 | config SYS_SUPPORTS_24HZ |
| 2930 | bool |
| 2931 | |
Atsushi Nemoto | 1723b4a | 2006-06-20 00:19:13 +0900 | [diff] [blame] | 2932 | config SYS_SUPPORTS_48HZ |
| 2933 | bool |
| 2934 | |
| 2935 | config SYS_SUPPORTS_100HZ |
| 2936 | bool |
| 2937 | |
| 2938 | config SYS_SUPPORTS_128HZ |
| 2939 | bool |
| 2940 | |
| 2941 | config SYS_SUPPORTS_250HZ |
| 2942 | bool |
| 2943 | |
| 2944 | config SYS_SUPPORTS_256HZ |
| 2945 | bool |
| 2946 | |
| 2947 | config SYS_SUPPORTS_1000HZ |
| 2948 | bool |
| 2949 | |
| 2950 | config SYS_SUPPORTS_1024HZ |
| 2951 | bool |
| 2952 | |
| 2953 | config SYS_SUPPORTS_ARBIT_HZ |
| 2954 | bool |
Paul Burton | 6759657 | 2015-09-22 10:16:39 -0700 | [diff] [blame] | 2955 | default y if !SYS_SUPPORTS_24HZ && \ |
| 2956 | !SYS_SUPPORTS_48HZ && \ |
| 2957 | !SYS_SUPPORTS_100HZ && \ |
| 2958 | !SYS_SUPPORTS_128HZ && \ |
| 2959 | !SYS_SUPPORTS_250HZ && \ |
| 2960 | !SYS_SUPPORTS_256HZ && \ |
| 2961 | !SYS_SUPPORTS_1000HZ && \ |
Atsushi Nemoto | 1723b4a | 2006-06-20 00:19:13 +0900 | [diff] [blame] | 2962 | !SYS_SUPPORTS_1024HZ |
| 2963 | |
| 2964 | config HZ |
| 2965 | int |
Paul Burton | 6759657 | 2015-09-22 10:16:39 -0700 | [diff] [blame] | 2966 | default 24 if HZ_24 |
Atsushi Nemoto | 1723b4a | 2006-06-20 00:19:13 +0900 | [diff] [blame] | 2967 | default 48 if HZ_48 |
| 2968 | default 100 if HZ_100 |
| 2969 | default 128 if HZ_128 |
| 2970 | default 250 if HZ_250 |
| 2971 | default 256 if HZ_256 |
| 2972 | default 1000 if HZ_1000 |
| 2973 | default 1024 if HZ_1024 |
| 2974 | |
Deng-Cheng Zhu | 96685b1 | 2015-03-07 10:30:19 -0800 | [diff] [blame] | 2975 | config SCHED_HRTICK |
| 2976 | def_bool HIGH_RES_TIMERS |
| 2977 | |
Atsushi Nemoto | ea6e942 | 2007-01-16 23:29:11 +0900 | [diff] [blame] | 2978 | config KEXEC |
Kees Cook | 7d60717 | 2013-01-16 18:53:19 -0800 | [diff] [blame] | 2979 | bool "Kexec system call" |
Dave Young | 2965faa | 2015-09-09 15:38:55 -0700 | [diff] [blame] | 2980 | select KEXEC_CORE |
Atsushi Nemoto | ea6e942 | 2007-01-16 23:29:11 +0900 | [diff] [blame] | 2981 | help |
| 2982 | kexec is a system call that implements the ability to shutdown your |
| 2983 | current kernel, and to start another kernel. It is like a reboot |
David Sterba | 3dde6ad | 2007-05-09 07:12:20 +0200 | [diff] [blame] | 2984 | but it is independent of the system firmware. And like a reboot |
Atsushi Nemoto | ea6e942 | 2007-01-16 23:29:11 +0900 | [diff] [blame] | 2985 | you can start any kernel with it, not just Linux. |
| 2986 | |
Matt LaPlante | 01dd2fb | 2007-10-20 01:34:40 +0200 | [diff] [blame] | 2987 | The name comes from the similarity to the exec system call. |
Atsushi Nemoto | ea6e942 | 2007-01-16 23:29:11 +0900 | [diff] [blame] | 2988 | |
| 2989 | It is an ongoing process to be certain the hardware in a machine |
| 2990 | is properly shutdown, so do not be surprised if this code does not |
Geert Uytterhoeven | bf22069 | 2013-08-20 21:38:03 +0200 | [diff] [blame] | 2991 | initially work for you. As of this writing the exact hardware |
| 2992 | interface is strongly in flux, so no good recommendation can be |
| 2993 | made. |
Atsushi Nemoto | ea6e942 | 2007-01-16 23:29:11 +0900 | [diff] [blame] | 2994 | |
Ralf Baechle | 7aa1c8f | 2012-10-11 18:14:58 +0200 | [diff] [blame] | 2995 | config CRASH_DUMP |
Marcin Nowakowski | bff323d | 2016-12-02 09:58:29 +0100 | [diff] [blame] | 2996 | bool "Kernel crash dumps" |
| 2997 | help |
Ralf Baechle | 7aa1c8f | 2012-10-11 18:14:58 +0200 | [diff] [blame] | 2998 | Generate crash dump after being started by kexec. |
| 2999 | This should be normally only set in special crash dump kernels |
| 3000 | which are loaded in the main kernel with kexec-tools into |
| 3001 | a specially reserved region and then later executed after |
| 3002 | a crash by kdump/kexec. The crash dump kernel must be compiled |
| 3003 | to a memory address not used by the main kernel or firmware using |
| 3004 | PHYSICAL_START. |
| 3005 | |
| 3006 | config PHYSICAL_START |
Marcin Nowakowski | bff323d | 2016-12-02 09:58:29 +0100 | [diff] [blame] | 3007 | hex "Physical address where the kernel is loaded" |
Maciej W. Rozycki | 8bda3e2 | 2018-03-26 19:11:51 +0100 | [diff] [blame] | 3008 | default "0xffffffff84000000" |
Marcin Nowakowski | bff323d | 2016-12-02 09:58:29 +0100 | [diff] [blame] | 3009 | depends on CRASH_DUMP |
| 3010 | help |
Ralf Baechle | 7aa1c8f | 2012-10-11 18:14:58 +0200 | [diff] [blame] | 3011 | This gives the CKSEG0 or KSEG0 address where the kernel is loaded. |
| 3012 | If you plan to use kernel for capturing the crash dump change |
| 3013 | this value to start of the reserved region (the "X" value as |
| 3014 | specified in the "crashkernel=YM@XM" command line boot parameter |
| 3015 | passed to the panic-ed kernel). |
| 3016 | |
Paul Burton | 597ce17 | 2013-11-22 13:12:07 +0000 | [diff] [blame] | 3017 | config MIPS_O32_FP64_SUPPORT |
Paul Burton | b7f1e27 | 2018-11-07 23:13:58 +0000 | [diff] [blame] | 3018 | bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6 |
Paul Burton | 597ce17 | 2013-11-22 13:12:07 +0000 | [diff] [blame] | 3019 | depends on 32BIT || MIPS32_O32 |
Paul Burton | 597ce17 | 2013-11-22 13:12:07 +0000 | [diff] [blame] | 3020 | help |
| 3021 | When this is enabled, the kernel will support use of 64-bit floating |
| 3022 | point registers with binaries using the O32 ABI along with the |
| 3023 | EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On |
| 3024 | 32-bit MIPS systems this support is at the cost of increasing the |
| 3025 | size and complexity of the compiled FPU emulator. Thus if you are |
| 3026 | running a MIPS32 system and know that none of your userland binaries |
| 3027 | will require 64-bit floating point, you may wish to reduce the size |
| 3028 | of your kernel & potentially improve FP emulation performance by |
| 3029 | saying N here. |
| 3030 | |
Paul Burton | 06e2e88 | 2014-02-14 17:55:18 +0000 | [diff] [blame] | 3031 | Although binutils currently supports use of this flag the details |
| 3032 | concerning its effect upon the O32 ABI in userland are still being |
Colin Ian King | 18ff14c | 2020-10-27 18:34:30 +0000 | [diff] [blame] | 3033 | worked on. In order to avoid userland becoming dependent upon current |
Paul Burton | 06e2e88 | 2014-02-14 17:55:18 +0000 | [diff] [blame] | 3034 | behaviour before the details have been finalised, this option should |
| 3035 | be considered experimental and only enabled by those working upon |
| 3036 | said details. |
| 3037 | |
| 3038 | If unsure, say N. |
Paul Burton | 597ce17 | 2013-11-22 13:12:07 +0000 | [diff] [blame] | 3039 | |
Dezhong Diao | f2ffa5a | 2010-10-13 00:52:46 -0600 | [diff] [blame] | 3040 | config USE_OF |
Jonas Gorski | 0b3e06f | 2012-09-18 11:28:54 +0200 | [diff] [blame] | 3041 | bool |
Dezhong Diao | f2ffa5a | 2010-10-13 00:52:46 -0600 | [diff] [blame] | 3042 | select OF |
Stephen Neuendorffer | e6ce132 | 2010-11-18 15:54:56 -0800 | [diff] [blame] | 3043 | select OF_EARLY_FLATTREE |
Grant Likely | abd2363 | 2012-02-24 08:07:06 -0700 | [diff] [blame] | 3044 | select IRQ_DOMAIN |
Dezhong Diao | f2ffa5a | 2010-10-13 00:52:46 -0600 | [diff] [blame] | 3045 | |
Dengcheng Zhu | 2fe8ea3 | 2018-09-11 14:49:24 -0700 | [diff] [blame] | 3046 | config UHI_BOOT |
| 3047 | bool |
| 3048 | |
Andrew Bresticker | 7fafb06 | 2014-08-21 13:04:20 -0700 | [diff] [blame] | 3049 | config BUILTIN_DTB |
| 3050 | bool |
| 3051 | |
Jonas Gorski | 1da8f17 | 2015-04-12 12:24:58 +0200 | [diff] [blame] | 3052 | choice |
Jonas Gorski | 5b24d52 | 2015-10-12 13:13:01 +0200 | [diff] [blame] | 3053 | prompt "Kernel appended dtb support" if USE_OF |
Jonas Gorski | 1da8f17 | 2015-04-12 12:24:58 +0200 | [diff] [blame] | 3054 | default MIPS_NO_APPENDED_DTB |
| 3055 | |
| 3056 | config MIPS_NO_APPENDED_DTB |
| 3057 | bool "None" |
| 3058 | help |
| 3059 | Do not enable appended dtb support. |
| 3060 | |
Aaro Koskinen | 87db537 | 2015-09-11 17:46:14 +0300 | [diff] [blame] | 3061 | config MIPS_ELF_APPENDED_DTB |
| 3062 | bool "vmlinux" |
| 3063 | help |
| 3064 | With this option, the boot code will look for a device tree binary |
| 3065 | DTB) included in the vmlinux ELF section .appended_dtb. By default |
| 3066 | it is empty and the DTB can be appended using binutils command |
| 3067 | objcopy: |
| 3068 | |
| 3069 | objcopy --update-section .appended_dtb=<filename>.dtb vmlinux |
| 3070 | |
Colin Ian King | 18ff14c | 2020-10-27 18:34:30 +0000 | [diff] [blame] | 3071 | This is meant as a backward compatibility convenience for those |
Aaro Koskinen | 87db537 | 2015-09-11 17:46:14 +0300 | [diff] [blame] | 3072 | systems with a bootloader that can't be upgraded to accommodate |
| 3073 | the documented boot protocol using a device tree. |
| 3074 | |
Jonas Gorski | 1da8f17 | 2015-04-12 12:24:58 +0200 | [diff] [blame] | 3075 | config MIPS_RAW_APPENDED_DTB |
Jonas Gorski | b8f54f2 | 2016-06-20 11:27:36 +0200 | [diff] [blame] | 3076 | bool "vmlinux.bin or vmlinuz.bin" |
Jonas Gorski | 1da8f17 | 2015-04-12 12:24:58 +0200 | [diff] [blame] | 3077 | help |
| 3078 | With this option, the boot code will look for a device tree binary |
Jonas Gorski | b8f54f2 | 2016-06-20 11:27:36 +0200 | [diff] [blame] | 3079 | DTB) appended to raw vmlinux.bin or vmlinuz.bin. |
Jonas Gorski | 1da8f17 | 2015-04-12 12:24:58 +0200 | [diff] [blame] | 3080 | (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb). |
| 3081 | |
| 3082 | This is meant as a backward compatibility convenience for those |
| 3083 | systems with a bootloader that can't be upgraded to accommodate |
| 3084 | the documented boot protocol using a device tree. |
| 3085 | |
| 3086 | Beware that there is very little in terms of protection against |
| 3087 | this option being confused by leftover garbage in memory that might |
| 3088 | look like a DTB header after a reboot if no actual DTB is appended |
| 3089 | to vmlinux.bin. Do not leave this option active in a production kernel |
| 3090 | if you don't intend to always append a DTB. |
| 3091 | endchoice |
| 3092 | |
Jonas Gorski | 2024972 | 2015-10-12 13:13:02 +0200 | [diff] [blame] | 3093 | choice |
| 3094 | prompt "Kernel command line type" if !CMDLINE_OVERRIDE |
Jonas Gorski | 2bcef9b | 2015-10-12 13:13:03 +0200 | [diff] [blame] | 3095 | default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \ |
Jiaxun Yang | 87fcfa7 | 2020-03-25 11:55:02 +0800 | [diff] [blame] | 3096 | !MACH_LOONGSON64 && !MIPS_MALTA && \ |
Jonas Gorski | 2bcef9b | 2015-10-12 13:13:03 +0200 | [diff] [blame] | 3097 | !CAVIUM_OCTEON_SOC |
Jonas Gorski | 2024972 | 2015-10-12 13:13:02 +0200 | [diff] [blame] | 3098 | default MIPS_CMDLINE_FROM_BOOTLOADER |
| 3099 | |
| 3100 | config MIPS_CMDLINE_FROM_DTB |
| 3101 | depends on USE_OF |
| 3102 | bool "Dtb kernel arguments if available" |
| 3103 | |
| 3104 | config MIPS_CMDLINE_DTB_EXTEND |
| 3105 | depends on USE_OF |
| 3106 | bool "Extend dtb kernel arguments with bootloader arguments" |
| 3107 | |
| 3108 | config MIPS_CMDLINE_FROM_BOOTLOADER |
| 3109 | bool "Bootloader kernel arguments if available" |
Rabin Vincent | ed47e15 | 2016-04-28 11:03:09 +0200 | [diff] [blame] | 3110 | |
| 3111 | config MIPS_CMDLINE_BUILTIN_EXTEND |
| 3112 | depends on CMDLINE_BOOL |
| 3113 | bool "Extend builtin kernel arguments with bootloader arguments" |
Jonas Gorski | 2024972 | 2015-10-12 13:13:02 +0200 | [diff] [blame] | 3114 | endchoice |
| 3115 | |
Ralf Baechle | 5e83d43 | 2005-10-29 19:32:41 +0100 | [diff] [blame] | 3116 | endmenu |
| 3117 | |
Atsushi Nemoto | 1df0f0f | 2006-09-26 23:44:01 +0900 | [diff] [blame] | 3118 | config LOCKDEP_SUPPORT |
| 3119 | bool |
| 3120 | default y |
| 3121 | |
| 3122 | config STACKTRACE_SUPPORT |
| 3123 | bool |
| 3124 | default y |
| 3125 | |
Kirill A. Shutemov | a728ab5 | 2015-04-14 15:45:51 -0700 | [diff] [blame] | 3126 | config PGTABLE_LEVELS |
| 3127 | int |
Alex Belits | 3377e22 | 2017-02-16 17:27:34 -0800 | [diff] [blame] | 3128 | default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48 |
Huang Pei | 41ce097 | 2021-11-25 18:59:48 +0800 | [diff] [blame] | 3129 | default 3 if 64BIT && (!PAGE_SIZE_64KB || MIPS_VA_BITS_48) |
Kirill A. Shutemov | a728ab5 | 2015-04-14 15:45:51 -0700 | [diff] [blame] | 3130 | default 2 |
| 3131 | |
Paul Burton | 6c359eb | 2018-07-27 18:23:20 -0700 | [diff] [blame] | 3132 | config MIPS_AUTO_PFN_OFFSET |
| 3133 | bool |
| 3134 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3135 | menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)" |
| 3136 | |
Paul Burton | c5611df | 2016-10-05 18:18:12 +0100 | [diff] [blame] | 3137 | config PCI_DRIVERS_GENERIC |
Christoph Hellwig | 2eac9c2 | 2018-11-15 20:05:33 +0100 | [diff] [blame] | 3138 | select PCI_DOMAINS_GENERIC if PCI |
Paul Burton | c5611df | 2016-10-05 18:18:12 +0100 | [diff] [blame] | 3139 | bool |
| 3140 | |
| 3141 | config PCI_DRIVERS_LEGACY |
| 3142 | def_bool !PCI_DRIVERS_GENERIC |
| 3143 | select NO_GENERIC_PCI_IOPORT_MAP |
Christoph Hellwig | 2eac9c2 | 2018-11-15 20:05:33 +0100 | [diff] [blame] | 3144 | select PCI_DOMAINS if PCI |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3145 | |
| 3146 | # |
| 3147 | # ISA support is now enabled via select. Too many systems still have the one |
| 3148 | # or other ISA chip on the board that users don't know about so don't expect |
| 3149 | # users to choose the right thing ... |
| 3150 | # |
| 3151 | config ISA |
| 3152 | bool |
| 3153 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3154 | config TC |
| 3155 | bool "TURBOchannel support" |
| 3156 | depends on MACH_DECSTATION |
| 3157 | help |
Justin P. Mattock | 50a23e6 | 2010-10-16 10:36:23 -0700 | [diff] [blame] | 3158 | TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS |
| 3159 | processors. TURBOchannel programming specifications are available |
| 3160 | at: |
| 3161 | <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/> |
| 3162 | and: |
| 3163 | <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/> |
| 3164 | Linux driver support status is documented at: |
| 3165 | <http://www.linux-mips.org/wiki/DECstation> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3166 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3167 | config MMU |
| 3168 | bool |
| 3169 | default y |
| 3170 | |
Matt Redfearn | 109c32f | 2016-11-24 17:32:45 +0000 | [diff] [blame] | 3171 | config ARCH_MMAP_RND_BITS_MIN |
| 3172 | default 12 if 64BIT |
| 3173 | default 8 |
| 3174 | |
| 3175 | config ARCH_MMAP_RND_BITS_MAX |
| 3176 | default 18 if 64BIT |
| 3177 | default 15 |
| 3178 | |
| 3179 | config ARCH_MMAP_RND_COMPAT_BITS_MIN |
Enrico Weigelt, metux IT consult | 371a415 | 2019-03-11 16:54:27 +0100 | [diff] [blame] | 3180 | default 8 |
Matt Redfearn | 109c32f | 2016-11-24 17:32:45 +0000 | [diff] [blame] | 3181 | |
| 3182 | config ARCH_MMAP_RND_COMPAT_BITS_MAX |
Enrico Weigelt, metux IT consult | 371a415 | 2019-03-11 16:54:27 +0100 | [diff] [blame] | 3183 | default 15 |
Matt Redfearn | 109c32f | 2016-11-24 17:32:45 +0000 | [diff] [blame] | 3184 | |
Ralf Baechle | d865bea | 2007-10-11 23:46:10 +0100 | [diff] [blame] | 3185 | config I8253 |
| 3186 | bool |
Russell King | 798778b | 2011-05-08 19:03:03 +0100 | [diff] [blame] | 3187 | select CLKSRC_I8253 |
Thomas Gleixner | 2d02612 | 2011-06-09 13:08:27 +0000 | [diff] [blame] | 3188 | select CLKEVT_I8253 |
Wu Zhangjin | 9726b43 | 2009-11-17 01:32:58 +0800 | [diff] [blame] | 3189 | select MIPS_EXTERNAL_TIMER |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3190 | endmenu |
| 3191 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3192 | config TRAD_SIGNALS |
| 3193 | bool |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3194 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3195 | config MIPS32_COMPAT |
Ralf Baechle | 78aaf95 | 2014-12-19 01:18:03 +0100 | [diff] [blame] | 3196 | bool |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3197 | |
| 3198 | config COMPAT |
| 3199 | bool |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3200 | |
Atsushi Nemoto | 05e4396 | 2006-11-07 18:02:44 +0900 | [diff] [blame] | 3201 | config SYSVIPC_COMPAT |
| 3202 | bool |
Atsushi Nemoto | 05e4396 | 2006-11-07 18:02:44 +0900 | [diff] [blame] | 3203 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3204 | config MIPS32_O32 |
| 3205 | bool "Kernel support for o32 binaries" |
Ralf Baechle | 78aaf95 | 2014-12-19 01:18:03 +0100 | [diff] [blame] | 3206 | depends on 64BIT |
| 3207 | select ARCH_WANT_OLD_COMPAT_IPC |
| 3208 | select COMPAT |
| 3209 | select MIPS32_COMPAT |
| 3210 | select SYSVIPC_COMPAT if SYSVIPC |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3211 | help |
| 3212 | Select this option if you want to run o32 binaries. These are pure |
| 3213 | 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of |
| 3214 | existing binaries are in this format. |
| 3215 | |
| 3216 | If unsure, say Y. |
| 3217 | |
| 3218 | config MIPS32_N32 |
| 3219 | bool "Kernel support for n32 binaries" |
Ralf Baechle | c22eacfe | 2015-01-03 12:10:23 +0100 | [diff] [blame] | 3220 | depends on 64BIT |
Arnd Bergmann | 5a9372f | 2019-01-10 17:24:31 +0100 | [diff] [blame] | 3221 | select ARCH_WANT_COMPAT_IPC_PARSE_VERSION |
Ralf Baechle | 78aaf95 | 2014-12-19 01:18:03 +0100 | [diff] [blame] | 3222 | select COMPAT |
| 3223 | select MIPS32_COMPAT |
| 3224 | select SYSVIPC_COMPAT if SYSVIPC |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3225 | help |
| 3226 | Select this option if you want to run n32 binaries. These are |
| 3227 | 64-bit binaries using 32-bit quantities for addressing and certain |
| 3228 | data that would normally be 64-bit. They are used in special |
| 3229 | cases. |
| 3230 | |
| 3231 | If unsure, say N. |
| 3232 | |
Nathan Chancellor | d49fc69 | 2022-01-25 15:19:25 -0700 | [diff] [blame] | 3233 | config CC_HAS_MNO_BRANCH_LIKELY |
| 3234 | def_bool y |
| 3235 | depends on $(cc-option,-mno-branch-likely) |
| 3236 | |
Ralf Baechle | 2116245 | 2007-02-09 17:08:58 +0000 | [diff] [blame] | 3237 | menu "Power management options" |
Rodolfo Giometti | 952fa95 | 2006-06-05 17:43:10 +0200 | [diff] [blame] | 3238 | |
Wu Zhangjin | 363c55c | 2009-06-04 20:27:10 +0800 | [diff] [blame] | 3239 | config ARCH_HIBERNATION_POSSIBLE |
| 3240 | def_bool y |
Ralf Baechle | 3f5b3e1 | 2009-07-02 11:48:07 +0100 | [diff] [blame] | 3241 | depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP |
Wu Zhangjin | 363c55c | 2009-06-04 20:27:10 +0800 | [diff] [blame] | 3242 | |
Johannes Berg | f4cb570 | 2007-12-08 02:14:00 +0100 | [diff] [blame] | 3243 | config ARCH_SUSPEND_POSSIBLE |
| 3244 | def_bool y |
Ralf Baechle | 3f5b3e1 | 2009-07-02 11:48:07 +0100 | [diff] [blame] | 3245 | depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP |
Johannes Berg | f4cb570 | 2007-12-08 02:14:00 +0100 | [diff] [blame] | 3246 | |
Ralf Baechle | 2116245 | 2007-02-09 17:08:58 +0000 | [diff] [blame] | 3247 | source "kernel/power/Kconfig" |
Rodolfo Giometti | 952fa95 | 2006-06-05 17:43:10 +0200 | [diff] [blame] | 3248 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3249 | endmenu |
| 3250 | |
Viresh Kumar | 7a99893 | 2013-04-04 12:54:21 +0000 | [diff] [blame] | 3251 | config MIPS_EXTERNAL_TIMER |
| 3252 | bool |
| 3253 | |
Viresh Kumar | 7a99893 | 2013-04-04 12:54:21 +0000 | [diff] [blame] | 3254 | menu "CPU Power Management" |
Paul Burton | c095eba | 2014-04-14 16:24:22 +0100 | [diff] [blame] | 3255 | |
| 3256 | if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER |
Viresh Kumar | 7a99893 | 2013-04-04 12:54:21 +0000 | [diff] [blame] | 3257 | source "drivers/cpufreq/Kconfig" |
Viresh Kumar | 7a99893 | 2013-04-04 12:54:21 +0000 | [diff] [blame] | 3258 | endif |
Wu Zhangjin | 9726b43 | 2009-11-17 01:32:58 +0800 | [diff] [blame] | 3259 | |
Paul Burton | c095eba | 2014-04-14 16:24:22 +0100 | [diff] [blame] | 3260 | source "drivers/cpuidle/Kconfig" |
| 3261 | |
| 3262 | endmenu |
| 3263 | |
Sanjay Lal | 2235a54 | 2012-11-21 18:33:59 -0800 | [diff] [blame] | 3264 | source "arch/mips/kvm/Kconfig" |
Nathan Chancellor | e91946d | 2020-04-28 15:14:16 -0700 | [diff] [blame] | 3265 | |
| 3266 | source "arch/mips/vdso/Kconfig" |